diff options
Diffstat (limited to 'arch/arm/mach-omap2/mcbsp.c')
-rw-r--r-- | arch/arm/mach-omap2/mcbsp.c | 146 |
1 files changed, 26 insertions, 120 deletions
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index acdc709901cd..a9e631fc1134 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -17,112 +17,14 @@ | |||
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
19 | 19 | ||
20 | #include <mach/irqs.h> | ||
20 | #include <mach/dma.h> | 21 | #include <mach/dma.h> |
21 | #include <mach/irqs.h> | 22 | #include <mach/irqs.h> |
22 | #include <mach/mux.h> | 23 | #include <mach/mux.h> |
23 | #include <mach/cpu.h> | 24 | #include <mach/cpu.h> |
24 | #include <mach/mcbsp.h> | 25 | #include <mach/mcbsp.h> |
25 | 26 | ||
26 | struct mcbsp_internal_clk { | 27 | const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" }; |
27 | struct clk clk; | ||
28 | struct clk **childs; | ||
29 | int n_childs; | ||
30 | }; | ||
31 | |||
32 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
33 | static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) | ||
34 | { | ||
35 | const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" }; | ||
36 | int i; | ||
37 | |||
38 | mclk->n_childs = ARRAY_SIZE(clk_names); | ||
39 | mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *), | ||
40 | GFP_KERNEL); | ||
41 | |||
42 | for (i = 0; i < mclk->n_childs; i++) { | ||
43 | /* We fake a platform device to get correct device id */ | ||
44 | struct platform_device pdev; | ||
45 | |||
46 | pdev.dev.bus = &platform_bus_type; | ||
47 | pdev.id = mclk->clk.id; | ||
48 | mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]); | ||
49 | if (IS_ERR(mclk->childs[i])) | ||
50 | printk(KERN_ERR "Could not get clock %s (%d).\n", | ||
51 | clk_names[i], mclk->clk.id); | ||
52 | } | ||
53 | } | ||
54 | |||
55 | static int omap_mcbsp_clk_enable(struct clk *clk) | ||
56 | { | ||
57 | struct mcbsp_internal_clk *mclk = container_of(clk, | ||
58 | struct mcbsp_internal_clk, clk); | ||
59 | int i; | ||
60 | |||
61 | for (i = 0; i < mclk->n_childs; i++) | ||
62 | clk_enable(mclk->childs[i]); | ||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | static void omap_mcbsp_clk_disable(struct clk *clk) | ||
67 | { | ||
68 | struct mcbsp_internal_clk *mclk = container_of(clk, | ||
69 | struct mcbsp_internal_clk, clk); | ||
70 | int i; | ||
71 | |||
72 | for (i = 0; i < mclk->n_childs; i++) | ||
73 | clk_disable(mclk->childs[i]); | ||
74 | } | ||
75 | |||
76 | static struct mcbsp_internal_clk omap_mcbsp_clks[] = { | ||
77 | { | ||
78 | .clk = { | ||
79 | .name = "mcbsp_clk", | ||
80 | .id = 1, | ||
81 | .enable = omap_mcbsp_clk_enable, | ||
82 | .disable = omap_mcbsp_clk_disable, | ||
83 | }, | ||
84 | }, | ||
85 | { | ||
86 | .clk = { | ||
87 | .name = "mcbsp_clk", | ||
88 | .id = 2, | ||
89 | .enable = omap_mcbsp_clk_enable, | ||
90 | .disable = omap_mcbsp_clk_disable, | ||
91 | }, | ||
92 | }, | ||
93 | { | ||
94 | .clk = { | ||
95 | .name = "mcbsp_clk", | ||
96 | .id = 3, | ||
97 | .enable = omap_mcbsp_clk_enable, | ||
98 | .disable = omap_mcbsp_clk_disable, | ||
99 | }, | ||
100 | }, | ||
101 | { | ||
102 | .clk = { | ||
103 | .name = "mcbsp_clk", | ||
104 | .id = 4, | ||
105 | .enable = omap_mcbsp_clk_enable, | ||
106 | .disable = omap_mcbsp_clk_disable, | ||
107 | }, | ||
108 | }, | ||
109 | { | ||
110 | .clk = { | ||
111 | .name = "mcbsp_clk", | ||
112 | .id = 5, | ||
113 | .enable = omap_mcbsp_clk_enable, | ||
114 | .disable = omap_mcbsp_clk_disable, | ||
115 | }, | ||
116 | }, | ||
117 | }; | ||
118 | |||
119 | #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) | ||
120 | #else | ||
121 | #define omap_mcbsp_clks_size 0 | ||
122 | static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks; | ||
123 | static inline void omap_mcbsp_clk_init(struct clk *clk) | ||
124 | { } | ||
125 | #endif | ||
126 | 28 | ||
127 | static void omap2_mcbsp2_mux_setup(void) | 29 | static void omap2_mcbsp2_mux_setup(void) |
128 | { | 30 | { |
@@ -155,7 +57,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { | |||
155 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 57 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
156 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | 58 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, |
157 | .ops = &omap2_mcbsp_ops, | 59 | .ops = &omap2_mcbsp_ops, |
158 | .clk_name = "mcbsp_clk", | 60 | .clk_names = clk_names, |
61 | .num_clks = 2, | ||
159 | }, | 62 | }, |
160 | { | 63 | { |
161 | .phys_base = OMAP24XX_MCBSP2_BASE, | 64 | .phys_base = OMAP24XX_MCBSP2_BASE, |
@@ -164,7 +67,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { | |||
164 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 67 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
165 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | 68 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, |
166 | .ops = &omap2_mcbsp_ops, | 69 | .ops = &omap2_mcbsp_ops, |
167 | .clk_name = "mcbsp_clk", | 70 | .clk_names = clk_names, |
71 | .num_clks = 2, | ||
168 | }, | 72 | }, |
169 | }; | 73 | }; |
170 | #define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) | 74 | #define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) |
@@ -182,7 +86,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
182 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 86 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
183 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | 87 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, |
184 | .ops = &omap2_mcbsp_ops, | 88 | .ops = &omap2_mcbsp_ops, |
185 | .clk_name = "mcbsp_clk", | 89 | .clk_names = clk_names, |
90 | .num_clks = 2, | ||
186 | }, | 91 | }, |
187 | { | 92 | { |
188 | .phys_base = OMAP24XX_MCBSP2_BASE, | 93 | .phys_base = OMAP24XX_MCBSP2_BASE, |
@@ -191,7 +96,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
191 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 96 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
192 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | 97 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, |
193 | .ops = &omap2_mcbsp_ops, | 98 | .ops = &omap2_mcbsp_ops, |
194 | .clk_name = "mcbsp_clk", | 99 | .clk_names = clk_names, |
100 | .num_clks = 2, | ||
195 | }, | 101 | }, |
196 | { | 102 | { |
197 | .phys_base = OMAP2430_MCBSP3_BASE, | 103 | .phys_base = OMAP2430_MCBSP3_BASE, |
@@ -200,7 +106,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
200 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, | 106 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, |
201 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, | 107 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, |
202 | .ops = &omap2_mcbsp_ops, | 108 | .ops = &omap2_mcbsp_ops, |
203 | .clk_name = "mcbsp_clk", | 109 | .clk_names = clk_names, |
110 | .num_clks = 2, | ||
204 | }, | 111 | }, |
205 | { | 112 | { |
206 | .phys_base = OMAP2430_MCBSP4_BASE, | 113 | .phys_base = OMAP2430_MCBSP4_BASE, |
@@ -209,7 +116,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
209 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, | 116 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, |
210 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, | 117 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, |
211 | .ops = &omap2_mcbsp_ops, | 118 | .ops = &omap2_mcbsp_ops, |
212 | .clk_name = "mcbsp_clk", | 119 | .clk_names = clk_names, |
120 | .num_clks = 2, | ||
213 | }, | 121 | }, |
214 | { | 122 | { |
215 | .phys_base = OMAP2430_MCBSP5_BASE, | 123 | .phys_base = OMAP2430_MCBSP5_BASE, |
@@ -218,7 +126,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
218 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, | 126 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, |
219 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, | 127 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, |
220 | .ops = &omap2_mcbsp_ops, | 128 | .ops = &omap2_mcbsp_ops, |
221 | .clk_name = "mcbsp_clk", | 129 | .clk_names = clk_names, |
130 | .num_clks = 2, | ||
222 | }, | 131 | }, |
223 | }; | 132 | }; |
224 | #define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) | 133 | #define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) |
@@ -236,7 +145,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
236 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 145 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
237 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | 146 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, |
238 | .ops = &omap2_mcbsp_ops, | 147 | .ops = &omap2_mcbsp_ops, |
239 | .clk_name = "mcbsp_clk", | 148 | .clk_names = clk_names, |
149 | .num_clks = 2, | ||
240 | }, | 150 | }, |
241 | { | 151 | { |
242 | .phys_base = OMAP34XX_MCBSP2_BASE, | 152 | .phys_base = OMAP34XX_MCBSP2_BASE, |
@@ -245,7 +155,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
245 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 155 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
246 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | 156 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, |
247 | .ops = &omap2_mcbsp_ops, | 157 | .ops = &omap2_mcbsp_ops, |
248 | .clk_name = "mcbsp_clk", | 158 | .clk_names = clk_names, |
159 | .num_clks = 2, | ||
249 | }, | 160 | }, |
250 | { | 161 | { |
251 | .phys_base = OMAP34XX_MCBSP3_BASE, | 162 | .phys_base = OMAP34XX_MCBSP3_BASE, |
@@ -254,7 +165,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
254 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, | 165 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, |
255 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, | 166 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, |
256 | .ops = &omap2_mcbsp_ops, | 167 | .ops = &omap2_mcbsp_ops, |
257 | .clk_name = "mcbsp_clk", | 168 | .clk_names = clk_names, |
169 | .num_clks = 2, | ||
258 | }, | 170 | }, |
259 | { | 171 | { |
260 | .phys_base = OMAP34XX_MCBSP4_BASE, | 172 | .phys_base = OMAP34XX_MCBSP4_BASE, |
@@ -263,7 +175,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
263 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, | 175 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, |
264 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, | 176 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, |
265 | .ops = &omap2_mcbsp_ops, | 177 | .ops = &omap2_mcbsp_ops, |
266 | .clk_name = "mcbsp_clk", | 178 | .clk_names = clk_names, |
179 | .num_clks = 2, | ||
267 | }, | 180 | }, |
268 | { | 181 | { |
269 | .phys_base = OMAP34XX_MCBSP5_BASE, | 182 | .phys_base = OMAP34XX_MCBSP5_BASE, |
@@ -272,7 +185,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
272 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, | 185 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, |
273 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, | 186 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, |
274 | .ops = &omap2_mcbsp_ops, | 187 | .ops = &omap2_mcbsp_ops, |
275 | .clk_name = "mcbsp_clk", | 188 | .clk_names = clk_names, |
189 | .num_clks = 2, | ||
276 | }, | 190 | }, |
277 | }; | 191 | }; |
278 | #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) | 192 | #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) |
@@ -283,14 +197,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
283 | 197 | ||
284 | static int __init omap2_mcbsp_init(void) | 198 | static int __init omap2_mcbsp_init(void) |
285 | { | 199 | { |
286 | int i; | ||
287 | |||
288 | for (i = 0; i < omap_mcbsp_clks_size; i++) { | ||
289 | /* Once we call clk_get inside init, we do not register it */ | ||
290 | omap_mcbsp_clk_init(&omap_mcbsp_clks[i]); | ||
291 | clk_register(&omap_mcbsp_clks[i].clk); | ||
292 | } | ||
293 | |||
294 | if (cpu_is_omap2420()) | 200 | if (cpu_is_omap2420()) |
295 | omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; | 201 | omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; |
296 | if (cpu_is_omap2430()) | 202 | if (cpu_is_omap2430()) |