diff options
Diffstat (limited to 'arch/arm/mach-omap2/id.c')
-rw-r--r-- | arch/arm/mach-omap2/id.c | 191 |
1 files changed, 51 insertions, 140 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 37efb8696927..d27daf921c7e 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
@@ -28,7 +28,6 @@ | |||
28 | 28 | ||
29 | #include "control.h" | 29 | #include "control.h" |
30 | 30 | ||
31 | static struct omap_chip_id omap_chip; | ||
32 | static unsigned int omap_revision; | 31 | static unsigned int omap_revision; |
33 | 32 | ||
34 | u32 omap_features; | 33 | u32 omap_features; |
@@ -39,19 +38,6 @@ unsigned int omap_rev(void) | |||
39 | } | 38 | } |
40 | EXPORT_SYMBOL(omap_rev); | 39 | EXPORT_SYMBOL(omap_rev); |
41 | 40 | ||
42 | /** | ||
43 | * omap_chip_is - test whether currently running OMAP matches a chip type | ||
44 | * @oc: omap_chip_t to test against | ||
45 | * | ||
46 | * Test whether the currently-running OMAP chip matches the supplied | ||
47 | * chip type 'oc'. Returns 1 upon a match; 0 upon failure. | ||
48 | */ | ||
49 | int omap_chip_is(struct omap_chip_id oci) | ||
50 | { | ||
51 | return (oci.oc & omap_chip.oc) ? 1 : 0; | ||
52 | } | ||
53 | EXPORT_SYMBOL(omap_chip_is); | ||
54 | |||
55 | int omap_type(void) | 41 | int omap_type(void) |
56 | { | 42 | { |
57 | u32 val = 0; | 43 | u32 val = 0; |
@@ -242,14 +228,12 @@ static void __init ti816x_check_features(void) | |||
242 | omap_features = OMAP3_HAS_NEON; | 228 | omap_features = OMAP3_HAS_NEON; |
243 | } | 229 | } |
244 | 230 | ||
245 | static void __init omap3_check_revision(void) | 231 | static void __init omap3_check_revision(const char **cpu_rev) |
246 | { | 232 | { |
247 | u32 cpuid, idcode; | 233 | u32 cpuid, idcode; |
248 | u16 hawkeye; | 234 | u16 hawkeye; |
249 | u8 rev; | 235 | u8 rev; |
250 | 236 | ||
251 | omap_chip.oc = CHIP_IS_OMAP3430; | ||
252 | |||
253 | /* | 237 | /* |
254 | * We cannot access revision registers on ES1.0. | 238 | * We cannot access revision registers on ES1.0. |
255 | * If the processor type is Cortex-A8 and the revision is 0x0 | 239 | * If the processor type is Cortex-A8 and the revision is 0x0 |
@@ -258,7 +242,7 @@ static void __init omap3_check_revision(void) | |||
258 | cpuid = read_cpuid(CPUID_ID); | 242 | cpuid = read_cpuid(CPUID_ID); |
259 | if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { | 243 | if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { |
260 | omap_revision = OMAP3430_REV_ES1_0; | 244 | omap_revision = OMAP3430_REV_ES1_0; |
261 | omap_chip.oc |= CHIP_IS_OMAP3430ES1; | 245 | *cpu_rev = "1.0"; |
262 | return; | 246 | return; |
263 | } | 247 | } |
264 | 248 | ||
@@ -279,77 +263,85 @@ static void __init omap3_check_revision(void) | |||
279 | case 0: /* Take care of early samples */ | 263 | case 0: /* Take care of early samples */ |
280 | case 1: | 264 | case 1: |
281 | omap_revision = OMAP3430_REV_ES2_0; | 265 | omap_revision = OMAP3430_REV_ES2_0; |
282 | omap_chip.oc |= CHIP_IS_OMAP3430ES2; | 266 | *cpu_rev = "2.0"; |
283 | break; | 267 | break; |
284 | case 2: | 268 | case 2: |
285 | omap_revision = OMAP3430_REV_ES2_1; | 269 | omap_revision = OMAP3430_REV_ES2_1; |
286 | omap_chip.oc |= CHIP_IS_OMAP3430ES2; | 270 | *cpu_rev = "2.1"; |
287 | break; | 271 | break; |
288 | case 3: | 272 | case 3: |
289 | omap_revision = OMAP3430_REV_ES3_0; | 273 | omap_revision = OMAP3430_REV_ES3_0; |
290 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; | 274 | *cpu_rev = "3.0"; |
291 | break; | 275 | break; |
292 | case 4: | 276 | case 4: |
293 | omap_revision = OMAP3430_REV_ES3_1; | 277 | omap_revision = OMAP3430_REV_ES3_1; |
294 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; | 278 | *cpu_rev = "3.1"; |
295 | break; | 279 | break; |
296 | case 7: | 280 | case 7: |
297 | /* FALLTHROUGH */ | 281 | /* FALLTHROUGH */ |
298 | default: | 282 | default: |
299 | /* Use the latest known revision as default */ | 283 | /* Use the latest known revision as default */ |
300 | omap_revision = OMAP3430_REV_ES3_1_2; | 284 | omap_revision = OMAP3430_REV_ES3_1_2; |
301 | 285 | *cpu_rev = "3.1.2"; | |
302 | /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */ | ||
303 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; | ||
304 | } | 286 | } |
305 | break; | 287 | break; |
306 | case 0xb868: | 288 | case 0xb868: |
307 | /* Handle OMAP35xx/AM35xx devices | 289 | /* |
290 | * Handle OMAP/AM 3505/3517 devices | ||
308 | * | 291 | * |
309 | * Set the device to be OMAP3505 here. Actual device | 292 | * Set the device to be OMAP3517 here. Actual device |
310 | * is identified later based on the features. | 293 | * is identified later based on the features. |
311 | * | ||
312 | * REVISIT: AM3505/AM3517 should have their own CHIP_IS | ||
313 | */ | 294 | */ |
314 | omap_revision = OMAP3505_REV(rev); | 295 | switch (rev) { |
315 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; | 296 | case 0: |
297 | omap_revision = OMAP3517_REV_ES1_0; | ||
298 | *cpu_rev = "1.0"; | ||
299 | break; | ||
300 | case 1: | ||
301 | /* FALLTHROUGH */ | ||
302 | default: | ||
303 | omap_revision = OMAP3517_REV_ES1_1; | ||
304 | *cpu_rev = "1.1"; | ||
305 | } | ||
316 | break; | 306 | break; |
317 | case 0xb891: | 307 | case 0xb891: |
318 | /* Handle 36xx devices */ | 308 | /* Handle 36xx devices */ |
319 | omap_chip.oc |= CHIP_IS_OMAP3630ES1; | ||
320 | 309 | ||
321 | switch(rev) { | 310 | switch(rev) { |
322 | case 0: /* Take care of early samples */ | 311 | case 0: /* Take care of early samples */ |
323 | omap_revision = OMAP3630_REV_ES1_0; | 312 | omap_revision = OMAP3630_REV_ES1_0; |
313 | *cpu_rev = "1.0"; | ||
324 | break; | 314 | break; |
325 | case 1: | 315 | case 1: |
326 | omap_revision = OMAP3630_REV_ES1_1; | 316 | omap_revision = OMAP3630_REV_ES1_1; |
327 | omap_chip.oc |= CHIP_IS_OMAP3630ES1_1; | 317 | *cpu_rev = "1.1"; |
328 | break; | 318 | break; |
329 | case 2: | 319 | case 2: |
320 | /* FALLTHROUGH */ | ||
330 | default: | 321 | default: |
331 | omap_revision = OMAP3630_REV_ES1_2; | 322 | omap_revision = OMAP3630_REV_ES1_2; |
332 | omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; | 323 | *cpu_rev = "1.2"; |
333 | } | 324 | } |
334 | break; | 325 | break; |
335 | case 0xb81e: | 326 | case 0xb81e: |
336 | omap_chip.oc = CHIP_IS_TI816X; | ||
337 | |||
338 | switch (rev) { | 327 | switch (rev) { |
339 | case 0: | 328 | case 0: |
340 | omap_revision = TI8168_REV_ES1_0; | 329 | omap_revision = TI8168_REV_ES1_0; |
330 | *cpu_rev = "1.0"; | ||
341 | break; | 331 | break; |
342 | case 1: | 332 | case 1: |
333 | /* FALLTHROUGH */ | ||
334 | default: | ||
343 | omap_revision = TI8168_REV_ES1_1; | 335 | omap_revision = TI8168_REV_ES1_1; |
336 | *cpu_rev = "1.1"; | ||
344 | break; | 337 | break; |
345 | default: | ||
346 | omap_revision = TI8168_REV_ES1_1; | ||
347 | } | 338 | } |
348 | break; | 339 | break; |
349 | default: | 340 | default: |
350 | /* Unknown default to latest silicon rev as default*/ | 341 | /* Unknown default to latest silicon rev as default */ |
351 | omap_revision = OMAP3630_REV_ES1_2; | 342 | omap_revision = OMAP3630_REV_ES1_2; |
352 | omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; | 343 | *cpu_rev = "1.2"; |
344 | pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); | ||
353 | } | 345 | } |
354 | } | 346 | } |
355 | 347 | ||
@@ -382,24 +374,20 @@ static void __init omap4_check_revision(void) | |||
382 | switch (rev) { | 374 | switch (rev) { |
383 | case 0: | 375 | case 0: |
384 | omap_revision = OMAP4430_REV_ES1_0; | 376 | omap_revision = OMAP4430_REV_ES1_0; |
385 | omap_chip.oc |= CHIP_IS_OMAP4430ES1; | ||
386 | break; | 377 | break; |
387 | case 1: | 378 | case 1: |
388 | default: | 379 | default: |
389 | omap_revision = OMAP4430_REV_ES2_0; | 380 | omap_revision = OMAP4430_REV_ES2_0; |
390 | omap_chip.oc |= CHIP_IS_OMAP4430ES2; | ||
391 | } | 381 | } |
392 | break; | 382 | break; |
393 | case 0xb95c: | 383 | case 0xb95c: |
394 | switch (rev) { | 384 | switch (rev) { |
395 | case 3: | 385 | case 3: |
396 | omap_revision = OMAP4430_REV_ES2_1; | 386 | omap_revision = OMAP4430_REV_ES2_1; |
397 | omap_chip.oc |= CHIP_IS_OMAP4430ES2_1; | ||
398 | break; | 387 | break; |
399 | case 4: | 388 | case 4: |
400 | default: | 389 | default: |
401 | omap_revision = OMAP4430_REV_ES2_2; | 390 | omap_revision = OMAP4430_REV_ES2_2; |
402 | omap_chip.oc |= CHIP_IS_OMAP4430ES2_2; | ||
403 | } | 391 | } |
404 | break; | 392 | break; |
405 | case 0xb94e: | 393 | case 0xb94e: |
@@ -407,14 +395,12 @@ static void __init omap4_check_revision(void) | |||
407 | case 0: | 395 | case 0: |
408 | default: | 396 | default: |
409 | omap_revision = OMAP4460_REV_ES1_0; | 397 | omap_revision = OMAP4460_REV_ES1_0; |
410 | omap_chip.oc |= CHIP_IS_OMAP4460ES1_0; | ||
411 | break; | 398 | break; |
412 | } | 399 | } |
413 | break; | 400 | break; |
414 | default: | 401 | default: |
415 | /* Unknown default to latest silicon rev as default */ | 402 | /* Unknown default to latest silicon rev as default */ |
416 | omap_revision = OMAP4430_REV_ES2_2; | 403 | omap_revision = OMAP4430_REV_ES2_2; |
417 | omap_chip.oc |= CHIP_IS_OMAP4430ES2_2; | ||
418 | } | 404 | } |
419 | 405 | ||
420 | pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, | 406 | pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, |
@@ -425,94 +411,33 @@ static void __init omap4_check_revision(void) | |||
425 | if (omap3_has_ ##feat()) \ | 411 | if (omap3_has_ ##feat()) \ |
426 | printk(#feat" "); | 412 | printk(#feat" "); |
427 | 413 | ||
428 | static void __init omap3_cpuinfo(void) | 414 | static void __init omap3_cpuinfo(const char *cpu_rev) |
429 | { | 415 | { |
430 | u8 rev = GET_OMAP_REVISION(); | 416 | const char *cpu_name; |
431 | char cpu_name[16], cpu_rev[16]; | ||
432 | 417 | ||
433 | /* OMAP3430 and OMAP3530 are assumed to be same. | 418 | /* |
419 | * OMAP3430 and OMAP3530 are assumed to be same. | ||
434 | * | 420 | * |
435 | * OMAP3525, OMAP3515 and OMAP3503 can be detected only based | 421 | * OMAP3525, OMAP3515 and OMAP3503 can be detected only based |
436 | * on available features. Upon detection, update the CPU id | 422 | * on available features. Upon detection, update the CPU id |
437 | * and CPU class bits. | 423 | * and CPU class bits. |
438 | */ | 424 | */ |
439 | if (cpu_is_omap3630()) { | 425 | if (cpu_is_omap3630()) { |
440 | strcpy(cpu_name, "OMAP3630"); | 426 | cpu_name = "OMAP3630"; |
441 | } else if (cpu_is_omap3505()) { | 427 | } else if (cpu_is_omap3517()) { |
442 | /* | 428 | /* AM35xx devices */ |
443 | * AM35xx devices | 429 | cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; |
444 | */ | ||
445 | if (omap3_has_sgx()) { | ||
446 | omap_revision = OMAP3517_REV(rev); | ||
447 | strcpy(cpu_name, "AM3517"); | ||
448 | } else { | ||
449 | /* Already set in omap3_check_revision() */ | ||
450 | strcpy(cpu_name, "AM3505"); | ||
451 | } | ||
452 | } else if (cpu_is_ti816x()) { | 430 | } else if (cpu_is_ti816x()) { |
453 | strcpy(cpu_name, "TI816X"); | 431 | cpu_name = "TI816X"; |
454 | } else if (omap3_has_iva() && omap3_has_sgx()) { | 432 | } else if (omap3_has_iva() && omap3_has_sgx()) { |
455 | /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ | 433 | /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ |
456 | strcpy(cpu_name, "OMAP3430/3530"); | 434 | cpu_name = "OMAP3430/3530"; |
457 | } else if (omap3_has_iva()) { | 435 | } else if (omap3_has_iva()) { |
458 | omap_revision = OMAP3525_REV(rev); | 436 | cpu_name = "OMAP3525"; |
459 | strcpy(cpu_name, "OMAP3525"); | ||
460 | } else if (omap3_has_sgx()) { | 437 | } else if (omap3_has_sgx()) { |
461 | omap_revision = OMAP3515_REV(rev); | 438 | cpu_name = "OMAP3515"; |
462 | strcpy(cpu_name, "OMAP3515"); | ||
463 | } else { | 439 | } else { |
464 | omap_revision = OMAP3503_REV(rev); | 440 | cpu_name = "OMAP3503"; |
465 | strcpy(cpu_name, "OMAP3503"); | ||
466 | } | ||
467 | |||
468 | if (cpu_is_omap3630() || cpu_is_ti816x()) { | ||
469 | switch (rev) { | ||
470 | case OMAP_REVBITS_00: | ||
471 | strcpy(cpu_rev, "1.0"); | ||
472 | break; | ||
473 | case OMAP_REVBITS_01: | ||
474 | strcpy(cpu_rev, "1.1"); | ||
475 | break; | ||
476 | case OMAP_REVBITS_02: | ||
477 | /* FALLTHROUGH */ | ||
478 | default: | ||
479 | /* Use the latest known revision as default */ | ||
480 | strcpy(cpu_rev, "1.2"); | ||
481 | } | ||
482 | } else if (cpu_is_omap3505() || cpu_is_omap3517()) { | ||
483 | switch (rev) { | ||
484 | case OMAP_REVBITS_00: | ||
485 | strcpy(cpu_rev, "1.0"); | ||
486 | break; | ||
487 | case OMAP_REVBITS_01: | ||
488 | /* FALLTHROUGH */ | ||
489 | default: | ||
490 | /* Use the latest known revision as default */ | ||
491 | strcpy(cpu_rev, "1.1"); | ||
492 | } | ||
493 | } else { | ||
494 | switch (rev) { | ||
495 | case OMAP_REVBITS_00: | ||
496 | strcpy(cpu_rev, "1.0"); | ||
497 | break; | ||
498 | case OMAP_REVBITS_01: | ||
499 | strcpy(cpu_rev, "2.0"); | ||
500 | break; | ||
501 | case OMAP_REVBITS_02: | ||
502 | strcpy(cpu_rev, "2.1"); | ||
503 | break; | ||
504 | case OMAP_REVBITS_03: | ||
505 | strcpy(cpu_rev, "3.0"); | ||
506 | break; | ||
507 | case OMAP_REVBITS_04: | ||
508 | strcpy(cpu_rev, "3.1"); | ||
509 | break; | ||
510 | case OMAP_REVBITS_05: | ||
511 | /* FALLTHROUGH */ | ||
512 | default: | ||
513 | /* Use the latest known revision as default */ | ||
514 | strcpy(cpu_rev, "3.1.2"); | ||
515 | } | ||
516 | } | 441 | } |
517 | 442 | ||
518 | /* Print verbose information */ | 443 | /* Print verbose information */ |
@@ -533,6 +458,8 @@ static void __init omap3_cpuinfo(void) | |||
533 | */ | 458 | */ |
534 | void __init omap2_check_revision(void) | 459 | void __init omap2_check_revision(void) |
535 | { | 460 | { |
461 | const char *cpu_rev; | ||
462 | |||
536 | /* | 463 | /* |
537 | * At this point we have an idea about the processor revision set | 464 | * At this point we have an idea about the processor revision set |
538 | * earlier with omap2_set_globals_tap(). | 465 | * earlier with omap2_set_globals_tap(). |
@@ -540,7 +467,7 @@ void __init omap2_check_revision(void) | |||
540 | if (cpu_is_omap24xx()) { | 467 | if (cpu_is_omap24xx()) { |
541 | omap24xx_check_revision(); | 468 | omap24xx_check_revision(); |
542 | } else if (cpu_is_omap34xx()) { | 469 | } else if (cpu_is_omap34xx()) { |
543 | omap3_check_revision(); | 470 | omap3_check_revision(&cpu_rev); |
544 | 471 | ||
545 | /* TI816X doesn't have feature register */ | 472 | /* TI816X doesn't have feature register */ |
546 | if (!cpu_is_ti816x()) | 473 | if (!cpu_is_ti816x()) |
@@ -548,7 +475,7 @@ void __init omap2_check_revision(void) | |||
548 | else | 475 | else |
549 | ti816x_check_features(); | 476 | ti816x_check_features(); |
550 | 477 | ||
551 | omap3_cpuinfo(); | 478 | omap3_cpuinfo(cpu_rev); |
552 | return; | 479 | return; |
553 | } else if (cpu_is_omap44xx()) { | 480 | } else if (cpu_is_omap44xx()) { |
554 | omap4_check_revision(); | 481 | omap4_check_revision(); |
@@ -557,22 +484,6 @@ void __init omap2_check_revision(void) | |||
557 | } else { | 484 | } else { |
558 | pr_err("OMAP revision unknown, please fix!\n"); | 485 | pr_err("OMAP revision unknown, please fix!\n"); |
559 | } | 486 | } |
560 | |||
561 | /* | ||
562 | * OK, now we know the exact revision. Initialize omap_chip bits | ||
563 | * for powerdowmain and clockdomain code. | ||
564 | */ | ||
565 | if (cpu_is_omap243x()) { | ||
566 | /* Currently only supports 2430ES2.1 and 2430-all */ | ||
567 | omap_chip.oc |= CHIP_IS_OMAP2430; | ||
568 | return; | ||
569 | } else if (cpu_is_omap242x()) { | ||
570 | /* Currently only supports 2420ES2.1.1 and 2420-all */ | ||
571 | omap_chip.oc |= CHIP_IS_OMAP2420; | ||
572 | return; | ||
573 | } | ||
574 | |||
575 | pr_err("Uninitialized omap_chip, please fix!\n"); | ||
576 | } | 487 | } |
577 | 488 | ||
578 | /* | 489 | /* |