diff options
Diffstat (limited to 'arch/arm/mach-omap2/id.c')
-rw-r--r-- | arch/arm/mach-omap2/id.c | 77 |
1 files changed, 64 insertions, 13 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 5f9086c65e48..2537090aa33a 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * Copyright (C) 2005 Nokia Corporation | 6 | * Copyright (C) 2005 Nokia Corporation |
7 | * Written by Tony Lindgren <tony@atomide.com> | 7 | * Written by Tony Lindgren <tony@atomide.com> |
8 | * | 8 | * |
9 | * Copyright (C) 2009 Texas Instruments | 9 | * Copyright (C) 2009-11 Texas Instruments |
10 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | 10 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or modify | 12 | * This program is free software; you can redistribute it and/or modify |
@@ -84,6 +84,11 @@ EXPORT_SYMBOL(omap_type); | |||
84 | #define OMAP_TAP_DIE_ID_2 0x0220 | 84 | #define OMAP_TAP_DIE_ID_2 0x0220 |
85 | #define OMAP_TAP_DIE_ID_3 0x0224 | 85 | #define OMAP_TAP_DIE_ID_3 0x0224 |
86 | 86 | ||
87 | #define OMAP_TAP_DIE_ID_44XX_0 0x0200 | ||
88 | #define OMAP_TAP_DIE_ID_44XX_1 0x0208 | ||
89 | #define OMAP_TAP_DIE_ID_44XX_2 0x020c | ||
90 | #define OMAP_TAP_DIE_ID_44XX_3 0x0210 | ||
91 | |||
87 | #define read_tap_reg(reg) __raw_readl(tap_base + (reg)) | 92 | #define read_tap_reg(reg) __raw_readl(tap_base + (reg)) |
88 | 93 | ||
89 | struct omap_id { | 94 | struct omap_id { |
@@ -107,6 +112,14 @@ static u16 tap_prod_id; | |||
107 | 112 | ||
108 | void omap_get_die_id(struct omap_die_id *odi) | 113 | void omap_get_die_id(struct omap_die_id *odi) |
109 | { | 114 | { |
115 | if (cpu_is_omap44xx()) { | ||
116 | odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0); | ||
117 | odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1); | ||
118 | odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2); | ||
119 | odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_3); | ||
120 | |||
121 | return; | ||
122 | } | ||
110 | odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0); | 123 | odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0); |
111 | odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1); | 124 | odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1); |
112 | odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2); | 125 | odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2); |
@@ -191,12 +204,19 @@ static void __init omap3_check_features(void) | |||
191 | if (!cpu_is_omap3505() && !cpu_is_omap3517()) | 204 | if (!cpu_is_omap3505() && !cpu_is_omap3517()) |
192 | omap3_features |= OMAP3_HAS_IO_WAKEUP; | 205 | omap3_features |= OMAP3_HAS_IO_WAKEUP; |
193 | 206 | ||
207 | omap3_features |= OMAP3_HAS_SDRC; | ||
208 | |||
194 | /* | 209 | /* |
195 | * TODO: Get additional info (where applicable) | 210 | * TODO: Get additional info (where applicable) |
196 | * e.g. Size of L2 cache. | 211 | * e.g. Size of L2 cache. |
197 | */ | 212 | */ |
198 | } | 213 | } |
199 | 214 | ||
215 | static void __init ti816x_check_features(void) | ||
216 | { | ||
217 | omap3_features = OMAP3_HAS_NEON; | ||
218 | } | ||
219 | |||
200 | static void __init omap3_check_revision(void) | 220 | static void __init omap3_check_revision(void) |
201 | { | 221 | { |
202 | u32 cpuid, idcode; | 222 | u32 cpuid, idcode; |
@@ -287,6 +307,20 @@ static void __init omap3_check_revision(void) | |||
287 | omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; | 307 | omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; |
288 | } | 308 | } |
289 | break; | 309 | break; |
310 | case 0xb81e: | ||
311 | omap_chip.oc = CHIP_IS_TI816X; | ||
312 | |||
313 | switch (rev) { | ||
314 | case 0: | ||
315 | omap_revision = TI8168_REV_ES1_0; | ||
316 | break; | ||
317 | case 1: | ||
318 | omap_revision = TI8168_REV_ES1_1; | ||
319 | break; | ||
320 | default: | ||
321 | omap_revision = TI8168_REV_ES1_1; | ||
322 | } | ||
323 | break; | ||
290 | default: | 324 | default: |
291 | /* Unknown default to latest silicon rev as default*/ | 325 | /* Unknown default to latest silicon rev as default*/ |
292 | omap_revision = OMAP3630_REV_ES1_2; | 326 | omap_revision = OMAP3630_REV_ES1_2; |
@@ -307,7 +341,7 @@ static void __init omap4_check_revision(void) | |||
307 | */ | 341 | */ |
308 | idcode = read_tap_reg(OMAP_TAP_IDCODE); | 342 | idcode = read_tap_reg(OMAP_TAP_IDCODE); |
309 | hawkeye = (idcode >> 12) & 0xffff; | 343 | hawkeye = (idcode >> 12) & 0xffff; |
310 | rev = (idcode >> 28) & 0xff; | 344 | rev = (idcode >> 28) & 0xf; |
311 | 345 | ||
312 | /* | 346 | /* |
313 | * Few initial ES2.0 samples IDCODE is same as ES1.0 | 347 | * Few initial ES2.0 samples IDCODE is same as ES1.0 |
@@ -326,22 +360,31 @@ static void __init omap4_check_revision(void) | |||
326 | omap_chip.oc |= CHIP_IS_OMAP4430ES1; | 360 | omap_chip.oc |= CHIP_IS_OMAP4430ES1; |
327 | break; | 361 | break; |
328 | case 1: | 362 | case 1: |
363 | default: | ||
329 | omap_revision = OMAP4430_REV_ES2_0; | 364 | omap_revision = OMAP4430_REV_ES2_0; |
330 | omap_chip.oc |= CHIP_IS_OMAP4430ES2; | 365 | omap_chip.oc |= CHIP_IS_OMAP4430ES2; |
366 | } | ||
367 | break; | ||
368 | case 0xb95c: | ||
369 | switch (rev) { | ||
370 | case 3: | ||
371 | omap_revision = OMAP4430_REV_ES2_1; | ||
372 | omap_chip.oc |= CHIP_IS_OMAP4430ES2_1; | ||
331 | break; | 373 | break; |
374 | case 4: | ||
332 | default: | 375 | default: |
333 | omap_revision = OMAP4430_REV_ES2_0; | 376 | omap_revision = OMAP4430_REV_ES2_2; |
334 | omap_chip.oc |= CHIP_IS_OMAP4430ES2; | 377 | omap_chip.oc |= CHIP_IS_OMAP4430ES2_2; |
335 | } | 378 | } |
336 | break; | 379 | break; |
337 | default: | 380 | default: |
338 | /* Unknown default to latest silicon rev as default*/ | 381 | /* Unknown default to latest silicon rev as default */ |
339 | omap_revision = OMAP4430_REV_ES2_0; | 382 | omap_revision = OMAP4430_REV_ES2_2; |
340 | omap_chip.oc |= CHIP_IS_OMAP4430ES2; | 383 | omap_chip.oc |= CHIP_IS_OMAP4430ES2_2; |
341 | } | 384 | } |
342 | 385 | ||
343 | pr_info("OMAP%04x ES%d.0\n", | 386 | pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, |
344 | omap_rev() >> 16, ((omap_rev() >> 12) & 0xf) + 1); | 387 | ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf)); |
345 | } | 388 | } |
346 | 389 | ||
347 | #define OMAP3_SHOW_FEATURE(feat) \ | 390 | #define OMAP3_SHOW_FEATURE(feat) \ |
@@ -372,6 +415,8 @@ static void __init omap3_cpuinfo(void) | |||
372 | /* Already set in omap3_check_revision() */ | 415 | /* Already set in omap3_check_revision() */ |
373 | strcpy(cpu_name, "AM3505"); | 416 | strcpy(cpu_name, "AM3505"); |
374 | } | 417 | } |
418 | } else if (cpu_is_ti816x()) { | ||
419 | strcpy(cpu_name, "TI816X"); | ||
375 | } else if (omap3_has_iva() && omap3_has_sgx()) { | 420 | } else if (omap3_has_iva() && omap3_has_sgx()) { |
376 | /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ | 421 | /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ |
377 | strcpy(cpu_name, "OMAP3430/3530"); | 422 | strcpy(cpu_name, "OMAP3430/3530"); |
@@ -386,7 +431,7 @@ static void __init omap3_cpuinfo(void) | |||
386 | strcpy(cpu_name, "OMAP3503"); | 431 | strcpy(cpu_name, "OMAP3503"); |
387 | } | 432 | } |
388 | 433 | ||
389 | if (cpu_is_omap3630()) { | 434 | if (cpu_is_omap3630() || cpu_is_ti816x()) { |
390 | switch (rev) { | 435 | switch (rev) { |
391 | case OMAP_REVBITS_00: | 436 | case OMAP_REVBITS_00: |
392 | strcpy(cpu_rev, "1.0"); | 437 | strcpy(cpu_rev, "1.0"); |
@@ -462,7 +507,13 @@ void __init omap2_check_revision(void) | |||
462 | omap24xx_check_revision(); | 507 | omap24xx_check_revision(); |
463 | } else if (cpu_is_omap34xx()) { | 508 | } else if (cpu_is_omap34xx()) { |
464 | omap3_check_revision(); | 509 | omap3_check_revision(); |
465 | omap3_check_features(); | 510 | |
511 | /* TI816X doesn't have feature register */ | ||
512 | if (!cpu_is_ti816x()) | ||
513 | omap3_check_features(); | ||
514 | else | ||
515 | ti816x_check_features(); | ||
516 | |||
466 | omap3_cpuinfo(); | 517 | omap3_cpuinfo(); |
467 | return; | 518 | return; |
468 | } else if (cpu_is_omap44xx()) { | 519 | } else if (cpu_is_omap44xx()) { |