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-rw-r--r--arch/arm/mach-omap2/id.c191
1 files changed, 51 insertions, 140 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a1ccb66fbe75..7f47092a193f 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -28,7 +28,6 @@
28 28
29#include "control.h" 29#include "control.h"
30 30
31static struct omap_chip_id omap_chip;
32static unsigned int omap_revision; 31static unsigned int omap_revision;
33 32
34u32 omap_features; 33u32 omap_features;
@@ -39,19 +38,6 @@ unsigned int omap_rev(void)
39} 38}
40EXPORT_SYMBOL(omap_rev); 39EXPORT_SYMBOL(omap_rev);
41 40
42/**
43 * omap_chip_is - test whether currently running OMAP matches a chip type
44 * @oc: omap_chip_t to test against
45 *
46 * Test whether the currently-running OMAP chip matches the supplied
47 * chip type 'oc'. Returns 1 upon a match; 0 upon failure.
48 */
49int omap_chip_is(struct omap_chip_id oci)
50{
51 return (oci.oc & omap_chip.oc) ? 1 : 0;
52}
53EXPORT_SYMBOL(omap_chip_is);
54
55int omap_type(void) 41int omap_type(void)
56{ 42{
57 u32 val = 0; 43 u32 val = 0;
@@ -245,14 +231,12 @@ static void __init ti816x_check_features(void)
245 omap_features = OMAP3_HAS_NEON; 231 omap_features = OMAP3_HAS_NEON;
246} 232}
247 233
248static void __init omap3_check_revision(void) 234static void __init omap3_check_revision(const char **cpu_rev)
249{ 235{
250 u32 cpuid, idcode; 236 u32 cpuid, idcode;
251 u16 hawkeye; 237 u16 hawkeye;
252 u8 rev; 238 u8 rev;
253 239
254 omap_chip.oc = CHIP_IS_OMAP3430;
255
256 /* 240 /*
257 * We cannot access revision registers on ES1.0. 241 * We cannot access revision registers on ES1.0.
258 * If the processor type is Cortex-A8 and the revision is 0x0 242 * If the processor type is Cortex-A8 and the revision is 0x0
@@ -261,7 +245,7 @@ static void __init omap3_check_revision(void)
261 cpuid = read_cpuid(CPUID_ID); 245 cpuid = read_cpuid(CPUID_ID);
262 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { 246 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
263 omap_revision = OMAP3430_REV_ES1_0; 247 omap_revision = OMAP3430_REV_ES1_0;
264 omap_chip.oc |= CHIP_IS_OMAP3430ES1; 248 *cpu_rev = "1.0";
265 return; 249 return;
266 } 250 }
267 251
@@ -282,77 +266,85 @@ static void __init omap3_check_revision(void)
282 case 0: /* Take care of early samples */ 266 case 0: /* Take care of early samples */
283 case 1: 267 case 1:
284 omap_revision = OMAP3430_REV_ES2_0; 268 omap_revision = OMAP3430_REV_ES2_0;
285 omap_chip.oc |= CHIP_IS_OMAP3430ES2; 269 *cpu_rev = "2.0";
286 break; 270 break;
287 case 2: 271 case 2:
288 omap_revision = OMAP3430_REV_ES2_1; 272 omap_revision = OMAP3430_REV_ES2_1;
289 omap_chip.oc |= CHIP_IS_OMAP3430ES2; 273 *cpu_rev = "2.1";
290 break; 274 break;
291 case 3: 275 case 3:
292 omap_revision = OMAP3430_REV_ES3_0; 276 omap_revision = OMAP3430_REV_ES3_0;
293 omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; 277 *cpu_rev = "3.0";
294 break; 278 break;
295 case 4: 279 case 4:
296 omap_revision = OMAP3430_REV_ES3_1; 280 omap_revision = OMAP3430_REV_ES3_1;
297 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; 281 *cpu_rev = "3.1";
298 break; 282 break;
299 case 7: 283 case 7:
300 /* FALLTHROUGH */ 284 /* FALLTHROUGH */
301 default: 285 default:
302 /* Use the latest known revision as default */ 286 /* Use the latest known revision as default */
303 omap_revision = OMAP3430_REV_ES3_1_2; 287 omap_revision = OMAP3430_REV_ES3_1_2;
304 288 *cpu_rev = "3.1.2";
305 /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
306 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
307 } 289 }
308 break; 290 break;
309 case 0xb868: 291 case 0xb868:
310 /* Handle OMAP35xx/AM35xx devices 292 /*
293 * Handle OMAP/AM 3505/3517 devices
311 * 294 *
312 * Set the device to be OMAP3505 here. Actual device 295 * Set the device to be OMAP3517 here. Actual device
313 * is identified later based on the features. 296 * is identified later based on the features.
314 *
315 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
316 */ 297 */
317 omap_revision = OMAP3505_REV(rev); 298 switch (rev) {
318 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; 299 case 0:
300 omap_revision = OMAP3517_REV_ES1_0;
301 *cpu_rev = "1.0";
302 break;
303 case 1:
304 /* FALLTHROUGH */
305 default:
306 omap_revision = OMAP3517_REV_ES1_1;
307 *cpu_rev = "1.1";
308 }
319 break; 309 break;
320 case 0xb891: 310 case 0xb891:
321 /* Handle 36xx devices */ 311 /* Handle 36xx devices */
322 omap_chip.oc |= CHIP_IS_OMAP3630ES1;
323 312
324 switch(rev) { 313 switch(rev) {
325 case 0: /* Take care of early samples */ 314 case 0: /* Take care of early samples */
326 omap_revision = OMAP3630_REV_ES1_0; 315 omap_revision = OMAP3630_REV_ES1_0;
316 *cpu_rev = "1.0";
327 break; 317 break;
328 case 1: 318 case 1:
329 omap_revision = OMAP3630_REV_ES1_1; 319 omap_revision = OMAP3630_REV_ES1_1;
330 omap_chip.oc |= CHIP_IS_OMAP3630ES1_1; 320 *cpu_rev = "1.1";
331 break; 321 break;
332 case 2: 322 case 2:
323 /* FALLTHROUGH */
333 default: 324 default:
334 omap_revision = OMAP3630_REV_ES1_2; 325 omap_revision = OMAP3630_REV_ES1_2;
335 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; 326 *cpu_rev = "1.2";
336 } 327 }
337 break; 328 break;
338 case 0xb81e: 329 case 0xb81e:
339 omap_chip.oc = CHIP_IS_TI816X;
340
341 switch (rev) { 330 switch (rev) {
342 case 0: 331 case 0:
343 omap_revision = TI8168_REV_ES1_0; 332 omap_revision = TI8168_REV_ES1_0;
333 *cpu_rev = "1.0";
344 break; 334 break;
345 case 1: 335 case 1:
336 /* FALLTHROUGH */
337 default:
346 omap_revision = TI8168_REV_ES1_1; 338 omap_revision = TI8168_REV_ES1_1;
339 *cpu_rev = "1.1";
347 break; 340 break;
348 default:
349 omap_revision = TI8168_REV_ES1_1;
350 } 341 }
351 break; 342 break;
352 default: 343 default:
353 /* Unknown default to latest silicon rev as default*/ 344 /* Unknown default to latest silicon rev as default */
354 omap_revision = OMAP3630_REV_ES1_2; 345 omap_revision = OMAP3630_REV_ES1_2;
355 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; 346 *cpu_rev = "1.2";
347 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
356 } 348 }
357} 349}
358 350
@@ -385,24 +377,20 @@ static void __init omap4_check_revision(void)
385 switch (rev) { 377 switch (rev) {
386 case 0: 378 case 0:
387 omap_revision = OMAP4430_REV_ES1_0; 379 omap_revision = OMAP4430_REV_ES1_0;
388 omap_chip.oc |= CHIP_IS_OMAP4430ES1;
389 break; 380 break;
390 case 1: 381 case 1:
391 default: 382 default:
392 omap_revision = OMAP4430_REV_ES2_0; 383 omap_revision = OMAP4430_REV_ES2_0;
393 omap_chip.oc |= CHIP_IS_OMAP4430ES2;
394 } 384 }
395 break; 385 break;
396 case 0xb95c: 386 case 0xb95c:
397 switch (rev) { 387 switch (rev) {
398 case 3: 388 case 3:
399 omap_revision = OMAP4430_REV_ES2_1; 389 omap_revision = OMAP4430_REV_ES2_1;
400 omap_chip.oc |= CHIP_IS_OMAP4430ES2_1;
401 break; 390 break;
402 case 4: 391 case 4:
403 default: 392 default:
404 omap_revision = OMAP4430_REV_ES2_2; 393 omap_revision = OMAP4430_REV_ES2_2;
405 omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
406 } 394 }
407 break; 395 break;
408 case 0xb94e: 396 case 0xb94e:
@@ -410,14 +398,12 @@ static void __init omap4_check_revision(void)
410 case 0: 398 case 0:
411 default: 399 default:
412 omap_revision = OMAP4460_REV_ES1_0; 400 omap_revision = OMAP4460_REV_ES1_0;
413 omap_chip.oc |= CHIP_IS_OMAP4460ES1_0;
414 break; 401 break;
415 } 402 }
416 break; 403 break;
417 default: 404 default:
418 /* Unknown default to latest silicon rev as default */ 405 /* Unknown default to latest silicon rev as default */
419 omap_revision = OMAP4430_REV_ES2_2; 406 omap_revision = OMAP4430_REV_ES2_2;
420 omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
421 } 407 }
422 408
423 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, 409 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
@@ -428,94 +414,33 @@ static void __init omap4_check_revision(void)
428 if (omap3_has_ ##feat()) \ 414 if (omap3_has_ ##feat()) \
429 printk(#feat" "); 415 printk(#feat" ");
430 416
431static void __init omap3_cpuinfo(void) 417static void __init omap3_cpuinfo(const char *cpu_rev)
432{ 418{
433 u8 rev = GET_OMAP_REVISION(); 419 const char *cpu_name;
434 char cpu_name[16], cpu_rev[16];
435 420
436 /* OMAP3430 and OMAP3530 are assumed to be same. 421 /*
422 * OMAP3430 and OMAP3530 are assumed to be same.
437 * 423 *
438 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based 424 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
439 * on available features. Upon detection, update the CPU id 425 * on available features. Upon detection, update the CPU id
440 * and CPU class bits. 426 * and CPU class bits.
441 */ 427 */
442 if (cpu_is_omap3630()) { 428 if (cpu_is_omap3630()) {
443 strcpy(cpu_name, "OMAP3630"); 429 cpu_name = "OMAP3630";
444 } else if (cpu_is_omap3505()) { 430 } else if (cpu_is_omap3517()) {
445 /* 431 /* AM35xx devices */
446 * AM35xx devices 432 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
447 */
448 if (omap3_has_sgx()) {
449 omap_revision = OMAP3517_REV(rev);
450 strcpy(cpu_name, "AM3517");
451 } else {
452 /* Already set in omap3_check_revision() */
453 strcpy(cpu_name, "AM3505");
454 }
455 } else if (cpu_is_ti816x()) { 433 } else if (cpu_is_ti816x()) {
456 strcpy(cpu_name, "TI816X"); 434 cpu_name = "TI816X";
457 } else if (omap3_has_iva() && omap3_has_sgx()) { 435 } else if (omap3_has_iva() && omap3_has_sgx()) {
458 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ 436 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
459 strcpy(cpu_name, "OMAP3430/3530"); 437 cpu_name = "OMAP3430/3530";
460 } else if (omap3_has_iva()) { 438 } else if (omap3_has_iva()) {
461 omap_revision = OMAP3525_REV(rev); 439 cpu_name = "OMAP3525";
462 strcpy(cpu_name, "OMAP3525");
463 } else if (omap3_has_sgx()) { 440 } else if (omap3_has_sgx()) {
464 omap_revision = OMAP3515_REV(rev); 441 cpu_name = "OMAP3515";
465 strcpy(cpu_name, "OMAP3515");
466 } else { 442 } else {
467 omap_revision = OMAP3503_REV(rev); 443 cpu_name = "OMAP3503";
468 strcpy(cpu_name, "OMAP3503");
469 }
470
471 if (cpu_is_omap3630() || cpu_is_ti816x()) {
472 switch (rev) {
473 case OMAP_REVBITS_00:
474 strcpy(cpu_rev, "1.0");
475 break;
476 case OMAP_REVBITS_01:
477 strcpy(cpu_rev, "1.1");
478 break;
479 case OMAP_REVBITS_02:
480 /* FALLTHROUGH */
481 default:
482 /* Use the latest known revision as default */
483 strcpy(cpu_rev, "1.2");
484 }
485 } else if (cpu_is_omap3505() || cpu_is_omap3517()) {
486 switch (rev) {
487 case OMAP_REVBITS_00:
488 strcpy(cpu_rev, "1.0");
489 break;
490 case OMAP_REVBITS_01:
491 /* FALLTHROUGH */
492 default:
493 /* Use the latest known revision as default */
494 strcpy(cpu_rev, "1.1");
495 }
496 } else {
497 switch (rev) {
498 case OMAP_REVBITS_00:
499 strcpy(cpu_rev, "1.0");
500 break;
501 case OMAP_REVBITS_01:
502 strcpy(cpu_rev, "2.0");
503 break;
504 case OMAP_REVBITS_02:
505 strcpy(cpu_rev, "2.1");
506 break;
507 case OMAP_REVBITS_03:
508 strcpy(cpu_rev, "3.0");
509 break;
510 case OMAP_REVBITS_04:
511 strcpy(cpu_rev, "3.1");
512 break;
513 case OMAP_REVBITS_05:
514 /* FALLTHROUGH */
515 default:
516 /* Use the latest known revision as default */
517 strcpy(cpu_rev, "3.1.2");
518 }
519 } 444 }
520 445
521 /* Print verbose information */ 446 /* Print verbose information */
@@ -536,6 +461,8 @@ static void __init omap3_cpuinfo(void)
536 */ 461 */
537void __init omap2_check_revision(void) 462void __init omap2_check_revision(void)
538{ 463{
464 const char *cpu_rev;
465
539 /* 466 /*
540 * At this point we have an idea about the processor revision set 467 * At this point we have an idea about the processor revision set
541 * earlier with omap2_set_globals_tap(). 468 * earlier with omap2_set_globals_tap().
@@ -543,7 +470,7 @@ void __init omap2_check_revision(void)
543 if (cpu_is_omap24xx()) { 470 if (cpu_is_omap24xx()) {
544 omap24xx_check_revision(); 471 omap24xx_check_revision();
545 } else if (cpu_is_omap34xx()) { 472 } else if (cpu_is_omap34xx()) {
546 omap3_check_revision(); 473 omap3_check_revision(&cpu_rev);
547 474
548 /* TI816X doesn't have feature register */ 475 /* TI816X doesn't have feature register */
549 if (!cpu_is_ti816x()) 476 if (!cpu_is_ti816x())
@@ -551,7 +478,7 @@ void __init omap2_check_revision(void)
551 else 478 else
552 ti816x_check_features(); 479 ti816x_check_features();
553 480
554 omap3_cpuinfo(); 481 omap3_cpuinfo(cpu_rev);
555 return; 482 return;
556 } else if (cpu_is_omap44xx()) { 483 } else if (cpu_is_omap44xx()) {
557 omap4_check_revision(); 484 omap4_check_revision();
@@ -560,22 +487,6 @@ void __init omap2_check_revision(void)
560 } else { 487 } else {
561 pr_err("OMAP revision unknown, please fix!\n"); 488 pr_err("OMAP revision unknown, please fix!\n");
562 } 489 }
563
564 /*
565 * OK, now we know the exact revision. Initialize omap_chip bits
566 * for powerdowmain and clockdomain code.
567 */
568 if (cpu_is_omap243x()) {
569 /* Currently only supports 2430ES2.1 and 2430-all */
570 omap_chip.oc |= CHIP_IS_OMAP2430;
571 return;
572 } else if (cpu_is_omap242x()) {
573 /* Currently only supports 2420ES2.1.1 and 2420-all */
574 omap_chip.oc |= CHIP_IS_OMAP2420;
575 return;
576 }
577
578 pr_err("Uninitialized omap_chip, please fix!\n");
579} 490}
580 491
581/* 492/*