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-rw-r--r--arch/arm/mach-omap2/hsmmc.c266
1 files changed, 266 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
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index 000000000000..9ad229594b46
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+++ b/arch/arm/mach-omap2/hsmmc.c
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1/*
2 * linux/arch/arm/mach-omap2/hsmmc.c
3 *
4 * Copyright (C) 2007-2008 Texas Instruments
5 * Copyright (C) 2008 Nokia Corporation
6 * Author: Texas Instruments
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/string.h>
15#include <linux/delay.h>
16#include <mach/hardware.h>
17#include <plat/control.h>
18#include <plat/mmc.h>
19#include <plat/omap-pm.h>
20
21#include "hsmmc.h"
22
23#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
24
25static u16 control_pbias_offset;
26static u16 control_devconf1_offset;
27
28#define HSMMC_NAME_LEN 9
29
30static struct hsmmc_controller {
31 char name[HSMMC_NAME_LEN + 1];
32} hsmmc[OMAP34XX_NR_MMC];
33
34#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
35
36static int hsmmc_get_context_loss(struct device *dev)
37{
38 return omap_pm_get_dev_context_loss_count(dev);
39}
40
41#else
42#define hsmmc_get_context_loss NULL
43#endif
44
45static void hsmmc1_before_set_reg(struct device *dev, int slot,
46 int power_on, int vdd)
47{
48 u32 reg, prog_io;
49 struct omap_mmc_platform_data *mmc = dev->platform_data;
50
51 if (mmc->slots[0].remux)
52 mmc->slots[0].remux(dev, slot, power_on);
53
54 /*
55 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
56 * card with Vcc regulator (from twl4030 or whatever). OMAP has both
57 * 1.8V and 3.0V modes, controlled by the PBIAS register.
58 *
59 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
60 * is most naturally TWL VSIM; those pins also use PBIAS.
61 *
62 * FIXME handle VMMC1A as needed ...
63 */
64 if (power_on) {
65 if (cpu_is_omap2430()) {
66 reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
67 if ((1 << vdd) >= MMC_VDD_30_31)
68 reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE;
69 else
70 reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE;
71 omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
72 }
73
74 if (mmc->slots[0].internal_clock) {
75 reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
76 reg |= OMAP2_MMCSDIO1ADPCLKISEL;
77 omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
78 }
79
80 reg = omap_ctrl_readl(control_pbias_offset);
81 if (cpu_is_omap3630()) {
82 /* Set MMC I/O to 52Mhz */
83 prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1);
84 prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL;
85 omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1);
86 } else {
87 reg |= OMAP2_PBIASSPEEDCTRL0;
88 }
89 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
90 omap_ctrl_writel(reg, control_pbias_offset);
91 } else {
92 reg = omap_ctrl_readl(control_pbias_offset);
93 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
94 omap_ctrl_writel(reg, control_pbias_offset);
95 }
96}
97
98static void hsmmc1_after_set_reg(struct device *dev, int slot,
99 int power_on, int vdd)
100{
101 u32 reg;
102
103 /* 100ms delay required for PBIAS configuration */
104 msleep(100);
105
106 if (power_on) {
107 reg = omap_ctrl_readl(control_pbias_offset);
108 reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
109 if ((1 << vdd) <= MMC_VDD_165_195)
110 reg &= ~OMAP2_PBIASLITEVMODE0;
111 else
112 reg |= OMAP2_PBIASLITEVMODE0;
113 omap_ctrl_writel(reg, control_pbias_offset);
114 } else {
115 reg = omap_ctrl_readl(control_pbias_offset);
116 reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
117 OMAP2_PBIASLITEVMODE0);
118 omap_ctrl_writel(reg, control_pbias_offset);
119 }
120}
121
122static void hsmmc23_before_set_reg(struct device *dev, int slot,
123 int power_on, int vdd)
124{
125 struct omap_mmc_platform_data *mmc = dev->platform_data;
126
127 if (mmc->slots[0].remux)
128 mmc->slots[0].remux(dev, slot, power_on);
129
130 if (power_on) {
131 /* Only MMC2 supports a CLKIN */
132 if (mmc->slots[0].internal_clock) {
133 u32 reg;
134
135 reg = omap_ctrl_readl(control_devconf1_offset);
136 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
137 omap_ctrl_writel(reg, control_devconf1_offset);
138 }
139 }
140}
141
142static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
143
144void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
145{
146 struct omap2_hsmmc_info *c;
147 int nr_hsmmc = ARRAY_SIZE(hsmmc_data);
148 int i;
149
150 if (cpu_is_omap2430()) {
151 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
152 control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
153 } else {
154 control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
155 control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
156 }
157
158 for (c = controllers; c->mmc; c++) {
159 struct hsmmc_controller *hc = hsmmc + c->mmc - 1;
160 struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
161
162 if (!c->mmc || c->mmc > nr_hsmmc) {
163 pr_debug("MMC%d: no such controller\n", c->mmc);
164 continue;
165 }
166 if (mmc) {
167 pr_debug("MMC%d: already configured\n", c->mmc);
168 continue;
169 }
170
171 mmc = kzalloc(sizeof(struct omap_mmc_platform_data),
172 GFP_KERNEL);
173 if (!mmc) {
174 pr_err("Cannot allocate memory for mmc device!\n");
175 goto done;
176 }
177
178 if (c->name)
179 strncpy(hc->name, c->name, HSMMC_NAME_LEN);
180 else
181 snprintf(hc->name, ARRAY_SIZE(hc->name),
182 "mmc%islot%i", c->mmc, 1);
183 mmc->slots[0].name = hc->name;
184 mmc->nr_slots = 1;
185 mmc->slots[0].wires = c->wires;
186 mmc->slots[0].internal_clock = !c->ext_clock;
187 mmc->dma_mask = 0xffffffff;
188
189 mmc->get_context_loss_count = hsmmc_get_context_loss;
190
191 mmc->slots[0].switch_pin = c->gpio_cd;
192 mmc->slots[0].gpio_wp = c->gpio_wp;
193
194 mmc->slots[0].remux = c->remux;
195
196 if (c->cover_only)
197 mmc->slots[0].cover = 1;
198
199 if (c->nonremovable)
200 mmc->slots[0].nonremovable = 1;
201
202 if (c->power_saving)
203 mmc->slots[0].power_saving = 1;
204
205 if (c->no_off)
206 mmc->slots[0].no_off = 1;
207
208 if (c->vcc_aux_disable_is_sleep)
209 mmc->slots[0].vcc_aux_disable_is_sleep = 1;
210
211 /* NOTE: MMC slots should have a Vcc regulator set up.
212 * This may be from a TWL4030-family chip, another
213 * controllable regulator, or a fixed supply.
214 *
215 * temporary HACK: ocr_mask instead of fixed supply
216 */
217 mmc->slots[0].ocr_mask = c->ocr_mask;
218
219 switch (c->mmc) {
220 case 1:
221 /* on-chip level shifting via PBIAS0/PBIAS1 */
222 mmc->slots[0].before_set_reg = hsmmc1_before_set_reg;
223 mmc->slots[0].after_set_reg = hsmmc1_after_set_reg;
224
225 /* Omap3630 HSMMC1 supports only 4-bit */
226 if (cpu_is_omap3630() && c->wires > 4) {
227 c->wires = 4;
228 mmc->slots[0].wires = c->wires;
229 }
230 break;
231 case 2:
232 if (c->ext_clock)
233 c->transceiver = 1;
234 if (c->transceiver && c->wires > 4)
235 c->wires = 4;
236 /* FALLTHROUGH */
237 case 3:
238 /* off-chip level shifting, or none */
239 mmc->slots[0].before_set_reg = hsmmc23_before_set_reg;
240 mmc->slots[0].after_set_reg = NULL;
241 break;
242 default:
243 pr_err("MMC%d configuration not supported!\n", c->mmc);
244 kfree(mmc);
245 continue;
246 }
247 hsmmc_data[c->mmc - 1] = mmc;
248 }
249
250 omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
251
252 /* pass the device nodes back to board setup code */
253 for (c = controllers; c->mmc; c++) {
254 struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
255
256 if (!c->mmc || c->mmc > nr_hsmmc)
257 continue;
258 c->dev = mmc->dev;
259 }
260
261done:
262 for (i = 0; i < nr_hsmmc; i++)
263 kfree(hsmmc_data[i]);
264}
265
266#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-17 15:20:29 -0500