1 files changed, 3 insertions, 13 deletions

diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 77085847e4e7..f4a1020559a7 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -129,15 +129,11 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
          * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
          * card with Vcc regulator (from twl4030 or whatever).  OMAP has both
          * 1.8V and 3.0V modes, controlled by the PBIAS register.
-         *
-         * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
-         * is most naturally TWL VSIM; those pins also use PBIAS.
-         *
-         * FIXME handle VMMC1A as needed ...
          */
         reg = omap4_ctrl_pad_readl(control_pbias_offset);
         reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-                OMAP4_MMC1_PWRDNZ_MASK);
+                OMAP4_MMC1_PWRDNZ_MASK |
+                OMAP4_MMC1_PBIASLITE_VMODE_MASK);
         omap4_ctrl_pad_writel(reg, control_pbias_offset);
 }
 
@@ -172,12 +168,6 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
                         reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
                         omap4_ctrl_pad_writel(reg, control_pbias_offset);
                 }
-        } else {
-                reg = omap4_ctrl_pad_readl(control_pbias_offset);
-                reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-                        OMAP4_MMC1_PWRDNZ_MASK |
-                        OMAP4_MMC1_PBIASLITE_VMODE_MASK);
-                omap4_ctrl_pad_writel(reg, control_pbias_offset);
         }
 }
 
@@ -489,7 +479,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
                         OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK);
                 reg &= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK |
                         OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK);
-                reg |= (OMAP4_USBC1_DR0_SPEEDCTRL_MASK|
+                reg |= (OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK |
                         OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK |
                         OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK);
                 omap4_ctrl_pad_writel(reg, control_mmc1);