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-rw-r--r--arch/arm/mach-omap2/gpmc.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 9fe8c949305c..852b19a367f0 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -170,12 +170,12 @@ static irqreturn_t gpmc_handle_irq(int irq, void *dev);
170 170
171static void gpmc_write_reg(int idx, u32 val) 171static void gpmc_write_reg(int idx, u32 val)
172{ 172{
173 __raw_writel(val, gpmc_base + idx); 173 writel_relaxed(val, gpmc_base + idx);
174} 174}
175 175
176static u32 gpmc_read_reg(int idx) 176static u32 gpmc_read_reg(int idx)
177{ 177{
178 return __raw_readl(gpmc_base + idx); 178 return readl_relaxed(gpmc_base + idx);
179} 179}
180 180
181void gpmc_cs_write_reg(int cs, int idx, u32 val) 181void gpmc_cs_write_reg(int cs, int idx, u32 val)
@@ -183,7 +183,7 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val)
183 void __iomem *reg_addr; 183 void __iomem *reg_addr;
184 184
185 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; 185 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
186 __raw_writel(val, reg_addr); 186 writel_relaxed(val, reg_addr);
187} 187}
188 188
189static u32 gpmc_cs_read_reg(int cs, int idx) 189static u32 gpmc_cs_read_reg(int cs, int idx)
@@ -191,7 +191,7 @@ static u32 gpmc_cs_read_reg(int cs, int idx)
191 void __iomem *reg_addr; 191 void __iomem *reg_addr;
192 192
193 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; 193 reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
194 return __raw_readl(reg_addr); 194 return readl_relaxed(reg_addr);
195} 195}
196 196
197/* TODO: Add support for gpmc_fck to clock framework and use it */ 197/* TODO: Add support for gpmc_fck to clock framework and use it */