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Diffstat (limited to 'arch/arm/mach-omap2/gpmc-nand.c')
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c37
1 files changed, 9 insertions, 28 deletions
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index e57fb29ff855..722209601927 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -19,8 +19,6 @@
19#include <plat/board.h> 19#include <plat/board.h>
20#include <plat/gpmc.h> 20#include <plat/gpmc.h>
21 21
22#define WR_RD_PIN_MONITORING 0x00600000
23
24static struct omap_nand_platform_data *gpmc_nand_data; 22static struct omap_nand_platform_data *gpmc_nand_data;
25 23
26static struct resource gpmc_nand_resource = { 24static struct resource gpmc_nand_resource = {
@@ -71,10 +69,10 @@ static int omap2_nand_gpmc_retime(void)
71 t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle); 69 t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
72 70
73 /* Configure GPMC */ 71 /* Configure GPMC */
74 gpmc_cs_write_reg(gpmc_nand_data->cs, GPMC_CS_CONFIG1, 72 gpmc_cs_configure(gpmc_nand_data->cs,
75 GPMC_CONFIG1_DEVICESIZE(gpmc_nand_data->devsize) | 73 GPMC_CONFIG_DEV_SIZE, gpmc_nand_data->devsize);
76 GPMC_CONFIG1_DEVICETYPE_NAND); 74 gpmc_cs_configure(gpmc_nand_data->cs,
77 75 GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
78 err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t); 76 err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
79 if (err) 77 if (err)
80 return err; 78 return err;
@@ -82,27 +80,13 @@ static int omap2_nand_gpmc_retime(void)
82 return 0; 80 return 0;
83} 81}
84 82
85static int gpmc_nand_setup(void)
86{
87 struct device *dev = &gpmc_nand_device.dev;
88
89 /* Set timings in GPMC */
90 if (omap2_nand_gpmc_retime() < 0) {
91 dev_err(dev, "Unable to set gpmc timings\n");
92 return -EINVAL;
93 }
94
95 return 0;
96}
97
98int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) 83int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
99{ 84{
100 unsigned int val;
101 int err = 0; 85 int err = 0;
102 struct device *dev = &gpmc_nand_device.dev; 86 struct device *dev = &gpmc_nand_device.dev;
103 87
104 gpmc_nand_data = _nand_data; 88 gpmc_nand_data = _nand_data;
105 gpmc_nand_data->nand_setup = gpmc_nand_setup; 89 gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime;
106 gpmc_nand_device.dev.platform_data = gpmc_nand_data; 90 gpmc_nand_device.dev.platform_data = gpmc_nand_data;
107 91
108 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, 92 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
@@ -112,19 +96,16 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
112 return err; 96 return err;
113 } 97 }
114 98
115 err = gpmc_nand_setup(); 99 /* Set timings in GPMC */
100 err = omap2_nand_gpmc_retime();
116 if (err < 0) { 101 if (err < 0) {
117 dev_err(dev, "NAND platform setup failed: %d\n", err); 102 dev_err(dev, "Unable to set gpmc timings: %d\n", err);
118 return err; 103 return err;
119 } 104 }
120 105
121 /* Enable RD PIN Monitoring Reg */ 106 /* Enable RD PIN Monitoring Reg */
122 if (gpmc_nand_data->dev_ready) { 107 if (gpmc_nand_data->dev_ready) {
123 val = gpmc_cs_read_reg(gpmc_nand_data->cs, 108 gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
124 GPMC_CS_CONFIG1);
125 val |= WR_RD_PIN_MONITORING;
126 gpmc_cs_write_reg(gpmc_nand_data->cs,
127 GPMC_CS_CONFIG1, val);
128 } 109 }
129 110
130 err = platform_device_register(&gpmc_nand_device); 111 err = platform_device_register(&gpmc_nand_device);