diff options
Diffstat (limited to 'arch/arm/mach-omap2/devices.c')
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 112 |
1 files changed, 101 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 894cc355818a..bcfcfc7fdb9b 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -257,6 +257,11 @@ static inline void omap_init_sti(void) {} | |||
257 | #define OMAP2_MCSPI3_BASE 0x480b8000 | 257 | #define OMAP2_MCSPI3_BASE 0x480b8000 |
258 | #define OMAP2_MCSPI4_BASE 0x480ba000 | 258 | #define OMAP2_MCSPI4_BASE 0x480ba000 |
259 | 259 | ||
260 | #define OMAP4_MCSPI1_BASE 0x48098100 | ||
261 | #define OMAP4_MCSPI2_BASE 0x4809a100 | ||
262 | #define OMAP4_MCSPI3_BASE 0x480b8100 | ||
263 | #define OMAP4_MCSPI4_BASE 0x480ba100 | ||
264 | |||
260 | static struct omap2_mcspi_platform_config omap2_mcspi1_config = { | 265 | static struct omap2_mcspi_platform_config omap2_mcspi1_config = { |
261 | .num_cs = 4, | 266 | .num_cs = 4, |
262 | }; | 267 | }; |
@@ -301,7 +306,8 @@ static struct platform_device omap2_mcspi2 = { | |||
301 | }, | 306 | }, |
302 | }; | 307 | }; |
303 | 308 | ||
304 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) | 309 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ |
310 | defined(CONFIG_ARCH_OMAP4) | ||
305 | static struct omap2_mcspi_platform_config omap2_mcspi3_config = { | 311 | static struct omap2_mcspi_platform_config omap2_mcspi3_config = { |
306 | .num_cs = 2, | 312 | .num_cs = 2, |
307 | }; | 313 | }; |
@@ -325,7 +331,7 @@ static struct platform_device omap2_mcspi3 = { | |||
325 | }; | 331 | }; |
326 | #endif | 332 | #endif |
327 | 333 | ||
328 | #ifdef CONFIG_ARCH_OMAP3 | 334 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) |
329 | static struct omap2_mcspi_platform_config omap2_mcspi4_config = { | 335 | static struct omap2_mcspi_platform_config omap2_mcspi4_config = { |
330 | .num_cs = 1, | 336 | .num_cs = 1, |
331 | }; | 337 | }; |
@@ -351,14 +357,25 @@ static struct platform_device omap2_mcspi4 = { | |||
351 | 357 | ||
352 | static void omap_init_mcspi(void) | 358 | static void omap_init_mcspi(void) |
353 | { | 359 | { |
360 | if (cpu_is_omap44xx()) { | ||
361 | omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE; | ||
362 | omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff; | ||
363 | omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE; | ||
364 | omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff; | ||
365 | omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE; | ||
366 | omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff; | ||
367 | omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE; | ||
368 | omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff; | ||
369 | } | ||
354 | platform_device_register(&omap2_mcspi1); | 370 | platform_device_register(&omap2_mcspi1); |
355 | platform_device_register(&omap2_mcspi2); | 371 | platform_device_register(&omap2_mcspi2); |
356 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) | 372 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ |
357 | if (cpu_is_omap2430() || cpu_is_omap343x()) | 373 | defined(CONFIG_ARCH_OMAP4) |
374 | if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx()) | ||
358 | platform_device_register(&omap2_mcspi3); | 375 | platform_device_register(&omap2_mcspi3); |
359 | #endif | 376 | #endif |
360 | #ifdef CONFIG_ARCH_OMAP3 | 377 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) |
361 | if (cpu_is_omap343x()) | 378 | if (cpu_is_omap343x() || cpu_is_omap44xx()) |
362 | platform_device_register(&omap2_mcspi4); | 379 | platform_device_register(&omap2_mcspi4); |
363 | #endif | 380 | #endif |
364 | } | 381 | } |
@@ -397,7 +414,7 @@ static inline void omap_init_sha1_md5(void) { } | |||
397 | 414 | ||
398 | /*-------------------------------------------------------------------------*/ | 415 | /*-------------------------------------------------------------------------*/ |
399 | 416 | ||
400 | #ifdef CONFIG_ARCH_OMAP3 | 417 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) |
401 | 418 | ||
402 | #define MMCHS_SYSCONFIG 0x0010 | 419 | #define MMCHS_SYSCONFIG 0x0010 |
403 | #define MMCHS_SYSCONFIG_SWRESET (1 << 1) | 420 | #define MMCHS_SYSCONFIG_SWRESET (1 << 1) |
@@ -424,8 +441,8 @@ static struct platform_device dummy_pdev = { | |||
424 | **/ | 441 | **/ |
425 | static void __init omap_hsmmc_reset(void) | 442 | static void __init omap_hsmmc_reset(void) |
426 | { | 443 | { |
427 | u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC : | 444 | u32 i, nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC : |
428 | OMAP24XX_NR_MMC; | 445 | (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC); |
429 | 446 | ||
430 | for (i = 0; i < nr_controllers; i++) { | 447 | for (i = 0; i < nr_controllers; i++) { |
431 | u32 v, base = 0; | 448 | u32 v, base = 0; |
@@ -442,8 +459,21 @@ static void __init omap_hsmmc_reset(void) | |||
442 | case 2: | 459 | case 2: |
443 | base = OMAP3_MMC3_BASE; | 460 | base = OMAP3_MMC3_BASE; |
444 | break; | 461 | break; |
462 | case 3: | ||
463 | if (!cpu_is_omap44xx()) | ||
464 | return; | ||
465 | base = OMAP4_MMC4_BASE; | ||
466 | break; | ||
467 | case 4: | ||
468 | if (!cpu_is_omap44xx()) | ||
469 | return; | ||
470 | base = OMAP4_MMC5_BASE; | ||
471 | break; | ||
445 | } | 472 | } |
446 | 473 | ||
474 | if (cpu_is_omap44xx()) | ||
475 | base += OMAP4_MMC_REG_OFFSET; | ||
476 | |||
447 | dummy_pdev.id = i; | 477 | dummy_pdev.id = i; |
448 | dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i); | 478 | dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i); |
449 | iclk = clk_get(dev, "ick"); | 479 | iclk = clk_get(dev, "ick"); |
@@ -513,6 +543,47 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | |||
513 | omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); | 543 | omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); |
514 | } | 544 | } |
515 | } | 545 | } |
546 | |||
547 | if (cpu_is_omap3430()) { | ||
548 | if (controller_nr == 0) { | ||
549 | omap_cfg_reg(N28_3430_MMC1_CLK); | ||
550 | omap_cfg_reg(M27_3430_MMC1_CMD); | ||
551 | omap_cfg_reg(N27_3430_MMC1_DAT0); | ||
552 | if (mmc_controller->slots[0].wires == 4 || | ||
553 | mmc_controller->slots[0].wires == 8) { | ||
554 | omap_cfg_reg(N26_3430_MMC1_DAT1); | ||
555 | omap_cfg_reg(N25_3430_MMC1_DAT2); | ||
556 | omap_cfg_reg(P28_3430_MMC1_DAT3); | ||
557 | } | ||
558 | if (mmc_controller->slots[0].wires == 8) { | ||
559 | omap_cfg_reg(P27_3430_MMC1_DAT4); | ||
560 | omap_cfg_reg(P26_3430_MMC1_DAT5); | ||
561 | omap_cfg_reg(R27_3430_MMC1_DAT6); | ||
562 | omap_cfg_reg(R25_3430_MMC1_DAT7); | ||
563 | } | ||
564 | } | ||
565 | if (controller_nr == 1) { | ||
566 | /* MMC2 */ | ||
567 | omap_cfg_reg(AE2_3430_MMC2_CLK); | ||
568 | omap_cfg_reg(AG5_3430_MMC2_CMD); | ||
569 | omap_cfg_reg(AH5_3430_MMC2_DAT0); | ||
570 | |||
571 | /* | ||
572 | * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed | ||
573 | * in the board-*.c files | ||
574 | */ | ||
575 | if (mmc_controller->slots[0].wires == 4 || | ||
576 | mmc_controller->slots[0].wires == 8) { | ||
577 | omap_cfg_reg(AH4_3430_MMC2_DAT1); | ||
578 | omap_cfg_reg(AG4_3430_MMC2_DAT2); | ||
579 | omap_cfg_reg(AF4_3430_MMC2_DAT3); | ||
580 | } | ||
581 | } | ||
582 | |||
583 | /* | ||
584 | * For MMC3 the pins need to be muxed in the board-*.c files | ||
585 | */ | ||
586 | } | ||
516 | } | 587 | } |
517 | 588 | ||
518 | void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | 589 | void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, |
@@ -540,11 +611,23 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | |||
540 | irq = INT_24XX_MMC2_IRQ; | 611 | irq = INT_24XX_MMC2_IRQ; |
541 | break; | 612 | break; |
542 | case 2: | 613 | case 2: |
543 | if (!cpu_is_omap34xx()) | 614 | if (!cpu_is_omap44xx() && !cpu_is_omap34xx()) |
544 | return; | 615 | return; |
545 | base = OMAP3_MMC3_BASE; | 616 | base = OMAP3_MMC3_BASE; |
546 | irq = INT_34XX_MMC3_IRQ; | 617 | irq = INT_34XX_MMC3_IRQ; |
547 | break; | 618 | break; |
619 | case 3: | ||
620 | if (!cpu_is_omap44xx()) | ||
621 | return; | ||
622 | base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET; | ||
623 | irq = INT_44XX_MMC4_IRQ; | ||
624 | break; | ||
625 | case 4: | ||
626 | if (!cpu_is_omap44xx()) | ||
627 | return; | ||
628 | base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET; | ||
629 | irq = INT_44XX_MMC5_IRQ; | ||
630 | break; | ||
548 | default: | 631 | default: |
549 | continue; | 632 | continue; |
550 | } | 633 | } |
@@ -552,8 +635,15 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | |||
552 | if (cpu_is_omap2420()) { | 635 | if (cpu_is_omap2420()) { |
553 | size = OMAP2420_MMC_SIZE; | 636 | size = OMAP2420_MMC_SIZE; |
554 | name = "mmci-omap"; | 637 | name = "mmci-omap"; |
638 | } else if (cpu_is_omap44xx()) { | ||
639 | if (i < 3) { | ||
640 | base += OMAP4_MMC_REG_OFFSET; | ||
641 | irq += IRQ_GIC_START; | ||
642 | } | ||
643 | size = OMAP4_HSMMC_SIZE; | ||
644 | name = "mmci-omap-hs"; | ||
555 | } else { | 645 | } else { |
556 | size = HSMMC_SIZE; | 646 | size = OMAP3_HSMMC_SIZE; |
557 | name = "mmci-omap-hs"; | 647 | name = "mmci-omap-hs"; |
558 | } | 648 | } |
559 | omap_mmc_add(name, i, base, size, irq, mmc_data[i]); | 649 | omap_mmc_add(name, i, base, size, irq, mmc_data[i]); |