1 files changed, 52 insertions, 74 deletions

diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index f386cbe9c889..be1617ca84bd 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -24,26 +24,31 @@
 
 #ifdef CONFIG_CPU_IDLE
 
-/* Machine specific information to be recorded in the C-state driver_data */
+/* Machine specific information */
 struct omap4_idle_statedata {
         u32 cpu_state;
         u32 mpu_logic_state;
         u32 mpu_state;
-        u8 valid;
 };
 
-static struct cpuidle_params cpuidle_params_table[] = {
-        /* C1 - CPU0 ON + CPU1 ON + MPU ON */
-        {.exit_latency = 2 + 2 , .target_residency = 5, .valid = 1},
-        /* C2- CPU0 OFF + CPU1 OFF + MPU CSWR */
-        {.exit_latency = 328 + 440 , .target_residency = 960, .valid = 1},
-        /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
-        {.exit_latency = 460 + 518 , .target_residency = 1100, .valid = 1},
+static struct omap4_idle_statedata omap4_idle_data[] = {
+        {
+                .cpu_state = PWRDM_POWER_ON,
+                .mpu_state = PWRDM_POWER_ON,
+                .mpu_logic_state = PWRDM_POWER_RET,
+        },
+        {
+                .cpu_state = PWRDM_POWER_OFF,
+                .mpu_state = PWRDM_POWER_RET,
+                .mpu_logic_state = PWRDM_POWER_RET,
+        },
+        {
+                .cpu_state = PWRDM_POWER_OFF,
+                .mpu_state = PWRDM_POWER_RET,
+                .mpu_logic_state = PWRDM_POWER_OFF,
+        },
 };
 
-#define OMAP4_NUM_STATES ARRAY_SIZE(cpuidle_params_table)
-
-struct omap4_idle_statedata omap4_idle_data[OMAP4_NUM_STATES];
 static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd;
 
 /**
@@ -60,8 +65,7 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
                         struct cpuidle_driver *drv,
                         int index)
 {
-        struct omap4_idle_statedata *cx =
-                        cpuidle_get_statedata(&dev->states_usage[index]);
+        struct omap4_idle_statedata *cx = &omap4_idle_data[index];
         u32 cpu1_state;
         int cpu_id = smp_processor_id();
 
@@ -78,7 +82,7 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
         cpu1_state = pwrdm_read_pwrst(cpu1_pd);
         if (cpu1_state != PWRDM_POWER_OFF) {
                 index = drv->safe_state_index;
-                cx = cpuidle_get_statedata(&dev->states_usage[index]);
+                cx = &omap4_idle_data[index];
         }
 
         if (index > 0)
@@ -133,36 +137,39 @@ struct cpuidle_driver omap4_idle_driver = {
         .name                           = "omap4_idle",
         .owner                          = THIS_MODULE,
         .en_core_tk_irqen               = 1,
+        .states = {
+                {
+                        /* C1 - CPU0 ON + CPU1 ON + MPU ON */
+                        .exit_latency = 2 + 2,
+                        .target_residency = 5,
+                        .flags = CPUIDLE_FLAG_TIME_VALID,
+                        .enter = omap4_enter_idle,
+                        .name = "C1",
+                        .desc = "MPUSS ON"
+                },
+                {
+                        /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
+                        .exit_latency = 328 + 440,
+                        .target_residency = 960,
+                        .flags = CPUIDLE_FLAG_TIME_VALID,
+                        .enter = omap4_enter_idle,
+                        .name = "C2",
+                        .desc = "MPUSS CSWR",
+                },
+                {
+                        /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
+                        .exit_latency = 460 + 518,
+                        .target_residency = 1100,
+                        .flags = CPUIDLE_FLAG_TIME_VALID,
+                        .enter = omap4_enter_idle,
+                        .name = "C3",
+                        .desc = "MPUSS OSWR",
+                },
+        },
+        .state_count = ARRAY_SIZE(omap4_idle_data),
+        .safe_state_index = 0,
 };
 
-static inline void _fill_cstate(struct cpuidle_driver *drv,
-                                        int idx, const char *descr)
-{
-        struct cpuidle_state *state = &drv->states[idx];
-
-        state->exit_latency     = cpuidle_params_table[idx].exit_latency;
-        state->target_residency = cpuidle_params_table[idx].target_residency;
-        state->flags            = CPUIDLE_FLAG_TIME_VALID;
-        state->enter            = omap4_enter_idle;
-        sprintf(state->name, "C%d", idx + 1);
-        strncpy(state->desc, descr, CPUIDLE_DESC_LEN);
-}
-
-static inline struct omap4_idle_statedata *_fill_cstate_usage(
-                                        struct cpuidle_device *dev,
-                                        int idx)
-{
-        struct omap4_idle_statedata *cx = &omap4_idle_data[idx];
-        struct cpuidle_state_usage *state_usage = &dev->states_usage[idx];
-
-        cx->valid               = cpuidle_params_table[idx].valid;
-        cpuidle_set_statedata(state_usage, cx);
-
-        return cx;
-}
-
-
-
 /**
  * omap4_idle_init - Init routine for OMAP4 idle
  *
@@ -171,9 +178,7 @@ static inline struct omap4_idle_statedata *_fill_cstate_usage(
  */
 int __init omap4_idle_init(void)
 {
-        struct omap4_idle_statedata *cx;
         struct cpuidle_device *dev;
-        struct cpuidle_driver *drv = &omap4_idle_driver;
         unsigned int cpu_id = 0;
 
         mpu_pd = pwrdm_lookup("mpu_pwrdm");
@@ -182,42 +187,15 @@ int __init omap4_idle_init(void)
         if ((!mpu_pd) || (!cpu0_pd) || (!cpu1_pd))
                 return -ENODEV;
 
-
-        drv->safe_state_index = -1;
         dev = &per_cpu(omap4_idle_dev, cpu_id);
         dev->cpu = cpu_id;
 
-        /* C1 - CPU0 ON + CPU1 ON + MPU ON */
-        _fill_cstate(drv, 0, "MPUSS ON");
-        drv->safe_state_index = 0;
-        cx = _fill_cstate_usage(dev, 0);
-        cx->valid = 1;  /* C1 is always valid */
-        cx->cpu_state = PWRDM_POWER_ON;
-        cx->mpu_state = PWRDM_POWER_ON;
-        cx->mpu_logic_state = PWRDM_POWER_RET;
-
-        /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
-        _fill_cstate(drv, 1, "MPUSS CSWR");
-        cx = _fill_cstate_usage(dev, 1);
-        cx->cpu_state = PWRDM_POWER_OFF;
-        cx->mpu_state = PWRDM_POWER_RET;
-        cx->mpu_logic_state = PWRDM_POWER_RET;
-
-        /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
-        _fill_cstate(drv, 2, "MPUSS OSWR");
-        cx = _fill_cstate_usage(dev, 2);
-        cx->cpu_state = PWRDM_POWER_OFF;
-        cx->mpu_state = PWRDM_POWER_RET;
-        cx->mpu_logic_state = PWRDM_POWER_OFF;
-
-        drv->state_count = OMAP4_NUM_STATES;
         cpuidle_register_driver(&omap4_idle_driver);
 
-        dev->state_count = OMAP4_NUM_STATES;
         if (cpuidle_register_device(dev)) {
                 pr_err("%s: CPUidle register device failed\n", __func__);
-                        return -EIO;
-                }
+                return -EIO;
+        }
 
         return 0;
 }