1 files changed, 90 insertions, 21 deletions

diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 0269bb055b69..695279419020 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -20,12 +20,16 @@
 
 #include "cm-regbits-34xx.h"
 #include "prm-regbits-34xx.h"
-#include "cm.h"
-#include "prm.h"
+#include "prm2xxx_3xxx.h"
+#include "cm2xxx_3xxx.h"
 #include "sdrc.h"
 #include "pm.h"
 #include "control.h"
 
+/* Used by omap3_ctrl_save_padconf() */
+#define START_PADCONF_SAVE              0x2
+#define PADCONF_SAVE_DONE               0x1
+
 static void __iomem *omap2_ctrl_base;
 static void __iomem *omap4_ctrl_pad_base;
 
@@ -134,6 +138,7 @@ struct omap3_control_regs {
         u32 sramldo4;
         u32 sramldo5;
         u32 csi;
+        u32 padconf_sys_nirq;
 };
 
 static struct omap3_control_regs control_context;
@@ -209,6 +214,37 @@ void omap4_ctrl_pad_writel(u32 val, u16 offset)
         __raw_writel(val, OMAP4_CTRL_PAD_REGADDR(offset));
 }
 
+#ifdef CONFIG_ARCH_OMAP3
+
+/**
+ * omap3_ctrl_write_boot_mode - set scratchpad boot mode for the next boot
+ * @bootmode: 8-bit value to pass to some boot code
+ *
+ * Set the bootmode in the scratchpad RAM.  This is used after the
+ * system restarts.  Not sure what actually uses this - it may be the
+ * bootloader, rather than the boot ROM - contrary to the preserved
+ * comment below.  No return value.
+ */
+void omap3_ctrl_write_boot_mode(u8 bootmode)
+{
+        u32 l;
+
+        l = ('B' << 24) | ('M' << 16) | bootmode;
+
+        /*
+         * Reserve the first word in scratchpad for communicating
+         * with the boot ROM. A pointer to a data structure
+         * describing the boot process can be stored there,
+         * cf. OMAP34xx TRM, Initialization / Software Booting
+         * Configuration.
+         *
+         * XXX This should use some omap_ctrl_writel()-type function
+         */
+        __raw_writel(l, OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD + 4));
+}
+
+#endif
+
 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
 /*
  * Clears the scratchpad contents in case of cold boot-
@@ -220,13 +256,13 @@ void omap3_clear_scratchpad_contents(void)
         void __iomem *v_addr;
         u32 offset = 0;
         v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM);
-        if (prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) &
+        if (omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) &
             OMAP3430_GLOBAL_COLD_RST_MASK) {
                 for ( ; offset <= max_offset; offset += 0x4)
                         __raw_writel(0x0, (v_addr + offset));
-                prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST_MASK,
-                                     OMAP3430_GR_MOD,
-                                     OMAP3_PRM_RSTST_OFFSET);
+                omap2_prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST_MASK,
+                                           OMAP3430_GR_MOD,
+                                           OMAP3_PRM_RSTST_OFFSET);
         }
 }
 
@@ -268,32 +304,34 @@ void omap3_save_scratchpad_contents(void)
         scratchpad_contents.sdrc_block_offset = 0x64;
 
         /* Populate the PRCM block contents */
-        prcm_block_contents.prm_clksrc_ctrl = prm_read_mod_reg(OMAP3430_GR_MOD,
-                        OMAP3_PRM_CLKSRC_CTRL_OFFSET);
-        prcm_block_contents.prm_clksel = prm_read_mod_reg(OMAP3430_CCR_MOD,
-                        OMAP3_PRM_CLKSEL_OFFSET);
+        prcm_block_contents.prm_clksrc_ctrl =
+                omap2_prm_read_mod_reg(OMAP3430_GR_MOD,
+                                       OMAP3_PRM_CLKSRC_CTRL_OFFSET);
+        prcm_block_contents.prm_clksel =
+                omap2_prm_read_mod_reg(OMAP3430_CCR_MOD,
+                                       OMAP3_PRM_CLKSEL_OFFSET);
         prcm_block_contents.cm_clksel_core =
-                        cm_read_mod_reg(CORE_MOD, CM_CLKSEL);
+                        omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL);
         prcm_block_contents.cm_clksel_wkup =
-                        cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
+                        omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
         prcm_block_contents.cm_clken_pll =
-                        cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+                        omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
         prcm_block_contents.cm_autoidle_pll =
-                        cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);
+                        omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL);
         prcm_block_contents.cm_clksel1_pll =
-                        cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
+                        omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
         prcm_block_contents.cm_clksel2_pll =
-                        cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL);
+                        omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL);
         prcm_block_contents.cm_clksel3_pll =
-                        cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3);
+                        omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3);
         prcm_block_contents.cm_clken_pll_mpu =
-                        cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL);
+                        omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL);
         prcm_block_contents.cm_autoidle_pll_mpu =
-                        cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL);
+                        omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL);
         prcm_block_contents.cm_clksel1_pll_mpu =
-                        cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL);
+                        omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL);
         prcm_block_contents.cm_clksel2_pll_mpu =
-                        cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL);
+                        omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL);
         prcm_block_contents.prcm_block_size = 0x0;
 
         /* Populate the SDRC block contents */
@@ -426,6 +464,8 @@ void omap3_control_save_context(void)
         control_context.sramldo4 = omap_ctrl_readl(OMAP343X_CONTROL_SRAMLDO4);
         control_context.sramldo5 = omap_ctrl_readl(OMAP343X_CONTROL_SRAMLDO5);
         control_context.csi = omap_ctrl_readl(OMAP343X_CONTROL_CSI);
+        control_context.padconf_sys_nirq =
+                omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_SYSNIRQ);
         return;
 }
 
@@ -482,6 +522,8 @@ void omap3_control_restore_context(void)
         omap_ctrl_writel(control_context.sramldo4, OMAP343X_CONTROL_SRAMLDO4);
         omap_ctrl_writel(control_context.sramldo5, OMAP343X_CONTROL_SRAMLDO5);
         omap_ctrl_writel(control_context.csi, OMAP343X_CONTROL_CSI);
+        omap_ctrl_writel(control_context.padconf_sys_nirq,
+                         OMAP343X_CONTROL_PADCONF_SYSNIRQ);
         return;
 }
 
@@ -492,4 +534,31 @@ void omap3630_ctrl_disable_rta(void)
         omap_ctrl_writel(OMAP36XX_RTA_DISABLE, OMAP36XX_CONTROL_MEM_RTA_CTRL);
 }
 
+/**
+ * omap3_ctrl_save_padconf - save padconf registers to scratchpad RAM
+ *
+ * Tell the SCM to start saving the padconf registers, then wait for
+ * the process to complete.  Returns 0 unconditionally, although it
+ * should also eventually be able to return -ETIMEDOUT, if the save
+ * does not complete.
+ *
+ * XXX This function is missing a timeout.  What should it be?
+ */
+int omap3_ctrl_save_padconf(void)
+{
+        u32 cpo;
+
+        /* Save the padconf registers */
+        cpo = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF);
+        cpo |= START_PADCONF_SAVE;
+        omap_ctrl_writel(cpo, OMAP343X_CONTROL_PADCONF_OFF);
+
+        /* wait for the save to complete */
+        while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
+                 & PADCONF_SAVE_DONE))
+                udelay(1);
+
+        return 0;
+}
+
 #endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */