diff options
Diffstat (limited to 'arch/arm/mach-omap2/control.c')
-rw-r--r-- | arch/arm/mach-omap2/control.c | 40 |
1 files changed, 21 insertions, 19 deletions
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 2506edfc4acb..61101e807df1 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c | |||
@@ -252,13 +252,13 @@ void omap3_clear_scratchpad_contents(void) | |||
252 | void __iomem *v_addr; | 252 | void __iomem *v_addr; |
253 | u32 offset = 0; | 253 | u32 offset = 0; |
254 | v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM); | 254 | v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM); |
255 | if (prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) & | 255 | if (omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) & |
256 | OMAP3430_GLOBAL_COLD_RST_MASK) { | 256 | OMAP3430_GLOBAL_COLD_RST_MASK) { |
257 | for ( ; offset <= max_offset; offset += 0x4) | 257 | for ( ; offset <= max_offset; offset += 0x4) |
258 | __raw_writel(0x0, (v_addr + offset)); | 258 | __raw_writel(0x0, (v_addr + offset)); |
259 | prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST_MASK, | 259 | omap2_prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST_MASK, |
260 | OMAP3430_GR_MOD, | 260 | OMAP3430_GR_MOD, |
261 | OMAP3_PRM_RSTST_OFFSET); | 261 | OMAP3_PRM_RSTST_OFFSET); |
262 | } | 262 | } |
263 | } | 263 | } |
264 | 264 | ||
@@ -300,32 +300,34 @@ void omap3_save_scratchpad_contents(void) | |||
300 | scratchpad_contents.sdrc_block_offset = 0x64; | 300 | scratchpad_contents.sdrc_block_offset = 0x64; |
301 | 301 | ||
302 | /* Populate the PRCM block contents */ | 302 | /* Populate the PRCM block contents */ |
303 | prcm_block_contents.prm_clksrc_ctrl = prm_read_mod_reg(OMAP3430_GR_MOD, | 303 | prcm_block_contents.prm_clksrc_ctrl = |
304 | OMAP3_PRM_CLKSRC_CTRL_OFFSET); | 304 | omap2_prm_read_mod_reg(OMAP3430_GR_MOD, |
305 | prcm_block_contents.prm_clksel = prm_read_mod_reg(OMAP3430_CCR_MOD, | 305 | OMAP3_PRM_CLKSRC_CTRL_OFFSET); |
306 | OMAP3_PRM_CLKSEL_OFFSET); | 306 | prcm_block_contents.prm_clksel = |
307 | omap2_prm_read_mod_reg(OMAP3430_CCR_MOD, | ||
308 | OMAP3_PRM_CLKSEL_OFFSET); | ||
307 | prcm_block_contents.cm_clksel_core = | 309 | prcm_block_contents.cm_clksel_core = |
308 | cm_read_mod_reg(CORE_MOD, CM_CLKSEL); | 310 | omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL); |
309 | prcm_block_contents.cm_clksel_wkup = | 311 | prcm_block_contents.cm_clksel_wkup = |
310 | cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); | 312 | omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); |
311 | prcm_block_contents.cm_clken_pll = | 313 | prcm_block_contents.cm_clken_pll = |
312 | cm_read_mod_reg(PLL_MOD, CM_CLKEN); | 314 | omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); |
313 | prcm_block_contents.cm_autoidle_pll = | 315 | prcm_block_contents.cm_autoidle_pll = |
314 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL); | 316 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL); |
315 | prcm_block_contents.cm_clksel1_pll = | 317 | prcm_block_contents.cm_clksel1_pll = |
316 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL); | 318 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL); |
317 | prcm_block_contents.cm_clksel2_pll = | 319 | prcm_block_contents.cm_clksel2_pll = |
318 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL); | 320 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL); |
319 | prcm_block_contents.cm_clksel3_pll = | 321 | prcm_block_contents.cm_clksel3_pll = |
320 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3); | 322 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3); |
321 | prcm_block_contents.cm_clken_pll_mpu = | 323 | prcm_block_contents.cm_clken_pll_mpu = |
322 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL); | 324 | omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL); |
323 | prcm_block_contents.cm_autoidle_pll_mpu = | 325 | prcm_block_contents.cm_autoidle_pll_mpu = |
324 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL); | 326 | omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL); |
325 | prcm_block_contents.cm_clksel1_pll_mpu = | 327 | prcm_block_contents.cm_clksel1_pll_mpu = |
326 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL); | 328 | omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL); |
327 | prcm_block_contents.cm_clksel2_pll_mpu = | 329 | prcm_block_contents.cm_clksel2_pll_mpu = |
328 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL); | 330 | omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL); |
329 | prcm_block_contents.prcm_block_size = 0x0; | 331 | prcm_block_contents.prcm_block_size = 0x0; |
330 | 332 | ||
331 | /* Populate the SDRC block contents */ | 333 | /* Populate the SDRC block contents */ |