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Diffstat (limited to 'arch/arm/mach-omap2/cm2xxx.c')
-rw-r--r--arch/arm/mach-omap2/cm2xxx.c65
1 files changed, 63 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index 64165013daf9..e96cd7041b66 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -35,6 +35,9 @@
35#define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0 35#define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0
36#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3 36#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3
37 37
38/* CM_IDLEST_PLL bit value offset for APLLs (OMAP2xxx only) */
39#define EN_APLL_LOCKED 3
40
38static const u8 omap2xxx_cm_idlest_offs[] = { 41static const u8 omap2xxx_cm_idlest_offs[] = {
39 CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4 42 CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4
40}; 43};
@@ -99,7 +102,7 @@ void omap2xxx_cm_set_dpll_auto_low_power_stop(void)
99} 102}
100 103
101/* 104/*
102 * APLL autoidle control 105 * APLL control
103 */ 106 */
104 107
105static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask) 108static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask)
@@ -136,6 +139,65 @@ void omap2xxx_cm_set_apll96_auto_low_power_stop(void)
136 OMAP24XX_AUTO_96M_MASK); 139 OMAP24XX_AUTO_96M_MASK);
137} 140}
138 141
142/* Enable an APLL if off */
143static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit)
144{
145 u32 v, m;
146
147 m = EN_APLL_LOCKED << enable_bit;
148
149 v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
150 if (v & m)
151 return 0; /* apll already enabled */
152
153 v |= m;
154 omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
155
156 omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit);
157
158 /*
159 * REVISIT: Should we return an error code if
160 * omap2xxx_cm_wait_module_ready() fails?
161 */
162 return 0;
163}
164
165/* Stop APLL */
166static void _omap2xxx_apll_disable(u8 enable_bit)
167{
168 u32 v;
169
170 v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
171 v &= ~(EN_APLL_LOCKED << enable_bit);
172 omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
173}
174
175/* Enable an APLL if off */
176int omap2xxx_cm_apll54_enable(void)
177{
178 return _omap2xxx_apll_enable(OMAP24XX_EN_54M_PLL_SHIFT,
179 OMAP24XX_ST_54M_APLL_SHIFT);
180}
181
182/* Enable an APLL if off */
183int omap2xxx_cm_apll96_enable(void)
184{
185 return _omap2xxx_apll_enable(OMAP24XX_EN_96M_PLL_SHIFT,
186 OMAP24XX_ST_96M_APLL_SHIFT);
187}
188
189/* Stop APLL */
190void omap2xxx_cm_apll54_disable(void)
191{
192 _omap2xxx_apll_disable(OMAP24XX_EN_54M_PLL_SHIFT);
193}
194
195/* Stop APLL */
196void omap2xxx_cm_apll96_disable(void)
197{
198 _omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT);
199}
200
139/* 201/*
140 * 202 *
141 */ 203 */
@@ -252,4 +314,3 @@ struct clkdm_ops omap2_clkdm_operations = {
252 .clkdm_clk_enable = omap2xxx_clkdm_clk_enable, 314 .clkdm_clk_enable = omap2xxx_clkdm_clk_enable,
253 .clkdm_clk_disable = omap2xxx_clkdm_clk_disable, 315 .clkdm_clk_disable = omap2xxx_clkdm_clk_disable,
254}; 316};
255