diff options
Diffstat (limited to 'arch/arm/mach-omap2/cm.h')
-rw-r--r-- | arch/arm/mach-omap2/cm.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 8489f3029fed..87a44c715aa4 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h | |||
@@ -81,6 +81,7 @@ | |||
81 | #define OMAP3430ES2_CM_FCLKEN3 0x0008 | 81 | #define OMAP3430ES2_CM_FCLKEN3 0x0008 |
82 | #define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 | 82 | #define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 |
83 | #define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 | 83 | #define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 |
84 | #define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2 | ||
84 | #define OMAP3430_CM_CLKSEL1 CM_CLKSEL | 85 | #define OMAP3430_CM_CLKSEL1 CM_CLKSEL |
85 | #define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL | 86 | #define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL |
86 | #define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 | 87 | #define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 |
@@ -96,15 +97,21 @@ | |||
96 | /* Clock management domain register get/set */ | 97 | /* Clock management domain register get/set */ |
97 | 98 | ||
98 | #ifndef __ASSEMBLER__ | 99 | #ifndef __ASSEMBLER__ |
99 | static inline void cm_write_mod_reg(u32 val, s16 module, s16 idx) | 100 | |
101 | extern u32 cm_read_mod_reg(s16 module, u16 idx); | ||
102 | extern void cm_write_mod_reg(u32 val, s16 module, u16 idx); | ||
103 | extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); | ||
104 | |||
105 | static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) | ||
100 | { | 106 | { |
101 | __raw_writel(val, OMAP_CM_REGADDR(module, idx)); | 107 | return cm_rmw_mod_reg_bits(bits, bits, module, idx); |
102 | } | 108 | } |
103 | 109 | ||
104 | static inline u32 cm_read_mod_reg(s16 module, s16 idx) | 110 | static inline u32 cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) |
105 | { | 111 | { |
106 | return __raw_readl(OMAP_CM_REGADDR(module, idx)); | 112 | return cm_rmw_mod_reg_bits(bits, 0x0, module, idx); |
107 | } | 113 | } |
114 | |||
108 | #endif | 115 | #endif |
109 | 116 | ||
110 | /* CM register bits shared between 24XX and 3430 */ | 117 | /* CM register bits shared between 24XX and 3430 */ |