1 files changed, 23 insertions, 9 deletions

diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 946bf04a956d..cbf9b68d4b94 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -270,8 +270,8 @@ static struct clk dpll_abe_ck = {
         .dpll_data      = &dpll_abe_dd,
         .init           = &omap2_init_dpll_parent,
         .ops            = &clkops_omap3_noncore_dpll_ops,
-        .recalc         = &omap3_dpll_recalc,
-        .round_rate     = &omap2_dpll_round_rate,
+        .recalc         = &omap4_dpll_regm4xen_recalc,
+        .round_rate     = &omap4_dpll_regm4xen_round_rate,
         .set_rate       = &omap3_noncore_dpll_set_rate,
 };
 
@@ -1195,11 +1195,25 @@ static struct clk l4_wkup_clk_mux_ck = {
         .recalc         = &omap2_clksel_recalc,
 };
 
+static const struct clksel_rate div2_2to1_rates[] = {
+        { .div = 1, .val = 1, .flags = RATE_IN_4430 },
+        { .div = 2, .val = 0, .flags = RATE_IN_4430 },
+        { .div = 0 },
+};
+
+static const struct clksel ocp_abe_iclk_div[] = {
+        { .parent = &aess_fclk, .rates = div2_2to1_rates },
+        { .parent = NULL },
+};
+
 static struct clk ocp_abe_iclk = {
         .name           = "ocp_abe_iclk",
         .parent         = &aess_fclk,
+        .clksel         = ocp_abe_iclk_div,
+        .clksel_reg     = OMAP4430_CM1_ABE_AESS_CLKCTRL,
+        .clksel_mask    = OMAP4430_CLKSEL_AESS_FCLK_MASK,
         .ops            = &clkops_null,
-        .recalc         = &followparent_recalc,
+        .recalc         = &omap2_clksel_recalc,
 };
 
 static struct clk per_abe_24m_fclk = {
@@ -1398,9 +1412,9 @@ static struct clk dss_dss_clk = {
 };
 
 static const struct clksel_rate div3_8to32_rates[] = {
-        { .div = 8, .val = 0, .flags = RATE_IN_44XX },
-        { .div = 16, .val = 1, .flags = RATE_IN_44XX },
-        { .div = 32, .val = 2, .flags = RATE_IN_44XX },
+        { .div = 8, .val = 0, .flags = RATE_IN_4460 },
+        { .div = 16, .val = 1, .flags = RATE_IN_4460 },
+        { .div = 32, .val = 2, .flags = RATE_IN_4460 },
         { .div = 0 },
 };
 
@@ -3403,12 +3417,12 @@ int __init omap4xxx_clk_init(void)
         struct omap_clk *c;
         u32 cpu_clkflg;
 
-        if (cpu_is_omap44xx()) {
+        if (cpu_is_omap443x()) {
                 cpu_mask = RATE_IN_4430;
                 cpu_clkflg = CK_443X;
         } else if (cpu_is_omap446x()) {
-                cpu_mask = RATE_IN_4460;
-                cpu_clkflg = CK_446X;
+                cpu_mask = RATE_IN_4460 | RATE_IN_4430;
+                cpu_clkflg = CK_446X | CK_443X;
         } else {
                 return 0;
         }