diff options
Diffstat (limited to 'arch/arm/mach-omap2/clock3xxx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/clock3xxx_data.c | 25 |
1 files changed, 7 insertions, 18 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index f4a626f7c79e..4e1a3b0e8cc8 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * OMAP3 clock data | 2 | * OMAP3 clock data |
3 | * | 3 | * |
4 | * Copyright (C) 2007-2010 Texas Instruments, Inc. | 4 | * Copyright (C) 2007-2010, 2012 Texas Instruments, Inc. |
5 | * Copyright (C) 2007-2011 Nokia Corporation | 5 | * Copyright (C) 2007-2011 Nokia Corporation |
6 | * | 6 | * |
7 | * Written by Paul Walmsley | 7 | * Written by Paul Walmsley |
@@ -1640,6 +1640,7 @@ static struct clk hdq_fck = { | |||
1640 | .name = "hdq_fck", | 1640 | .name = "hdq_fck", |
1641 | .ops = &clkops_omap2_dflt_wait, | 1641 | .ops = &clkops_omap2_dflt_wait, |
1642 | .parent = &core_12m_fck, | 1642 | .parent = &core_12m_fck, |
1643 | .clkdm_name = "core_l4_clkdm", | ||
1643 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | 1644 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), |
1644 | .enable_bit = OMAP3430_EN_HDQ_SHIFT, | 1645 | .enable_bit = OMAP3430_EN_HDQ_SHIFT, |
1645 | .recalc = &followparent_recalc, | 1646 | .recalc = &followparent_recalc, |
@@ -3294,8 +3295,8 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3294 | CLK(NULL, "gfx_l3_ick", &gfx_l3_ick, CK_3430ES1), | 3295 | CLK(NULL, "gfx_l3_ick", &gfx_l3_ick, CK_3430ES1), |
3295 | CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck, CK_3430ES1), | 3296 | CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck, CK_3430ES1), |
3296 | CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck, CK_3430ES1), | 3297 | CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck, CK_3430ES1), |
3297 | CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2PLUS | CK_3517 | CK_36XX), | 3298 | CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3298 | CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2PLUS | CK_3517 | CK_36XX), | 3299 | CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3299 | CLK(NULL, "d2d_26m_fck", &d2d_26m_fck, CK_3430ES1), | 3300 | CLK(NULL, "d2d_26m_fck", &d2d_26m_fck, CK_3430ES1), |
3300 | CLK(NULL, "modem_fck", &modem_fck, CK_34XX | CK_36XX), | 3301 | CLK(NULL, "modem_fck", &modem_fck, CK_34XX | CK_36XX), |
3301 | CLK(NULL, "sad2d_ick", &sad2d_ick, CK_34XX | CK_36XX), | 3302 | CLK(NULL, "sad2d_ick", &sad2d_ick, CK_34XX | CK_36XX), |
@@ -3419,7 +3420,7 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3419 | CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), | 3420 | CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), |
3420 | CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), | 3421 | CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), |
3421 | CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX), | 3422 | CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX), |
3422 | CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_3505 | CK_3517), | 3423 | CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_AM35XX), |
3423 | CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX), | 3424 | CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX), |
3424 | CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX), | 3425 | CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX), |
3425 | CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX), | 3426 | CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX), |
@@ -3513,21 +3514,9 @@ int __init omap3xxx_clk_init(void) | |||
3513 | struct omap_clk *c; | 3514 | struct omap_clk *c; |
3514 | u32 cpu_clkflg = 0; | 3515 | u32 cpu_clkflg = 0; |
3515 | 3516 | ||
3516 | /* | 3517 | if (cpu_is_omap3517()) { |
3517 | * 3505 must be tested before 3517, since 3517 returns true | ||
3518 | * for both AM3517 chips and AM3517 family chips, which | ||
3519 | * includes 3505. Unfortunately there's no obvious family | ||
3520 | * test for 3517/3505 :-( | ||
3521 | */ | ||
3522 | if (cpu_is_omap3505()) { | ||
3523 | cpu_mask = RATE_IN_34XX; | ||
3524 | cpu_clkflg = CK_3505; | ||
3525 | } else if (cpu_is_omap3517()) { | ||
3526 | cpu_mask = RATE_IN_34XX; | ||
3527 | cpu_clkflg = CK_3517; | ||
3528 | } else if (cpu_is_omap3505()) { | ||
3529 | cpu_mask = RATE_IN_34XX; | 3518 | cpu_mask = RATE_IN_34XX; |
3530 | cpu_clkflg = CK_3505; | 3519 | cpu_clkflg = CK_AM35XX; |
3531 | } else if (cpu_is_omap3630()) { | 3520 | } else if (cpu_is_omap3630()) { |
3532 | cpu_mask = (RATE_IN_34XX | RATE_IN_36XX); | 3521 | cpu_mask = (RATE_IN_34XX | RATE_IN_36XX); |
3533 | cpu_clkflg = CK_36XX; | 3522 | cpu_clkflg = CK_36XX; |