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Diffstat (limited to 'arch/arm/mach-omap2/clock3xxx_data.c')
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 480fb8f09aed..19c1dc877222 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -747,7 +747,7 @@ static struct clk dpll4_m3_ck = {
747 .parent = &dpll4_ck, 747 .parent = &dpll4_ck,
748 .init = &omap2_init_clksel_parent, 748 .init = &omap2_init_clksel_parent,
749 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), 749 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
750 .clksel_mask = OMAP3430_CLKSEL_TV_MASK, 750 .clksel_mask = OMAP3630_CLKSEL_TV_MASK,
751 .clksel = dpll4_clksel, 751 .clksel = dpll4_clksel,
752 .clkdm_name = "dpll4_clkdm", 752 .clkdm_name = "dpll4_clkdm",
753 .recalc = &omap2_clksel_recalc, 753 .recalc = &omap2_clksel_recalc,
@@ -832,7 +832,7 @@ static struct clk dpll4_m4_ck = {
832 .parent = &dpll4_ck, 832 .parent = &dpll4_ck,
833 .init = &omap2_init_clksel_parent, 833 .init = &omap2_init_clksel_parent,
834 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), 834 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
835 .clksel_mask = OMAP3430_CLKSEL_DSS1_MASK, 835 .clksel_mask = OMAP3630_CLKSEL_DSS1_MASK,
836 .clksel = dpll4_clksel, 836 .clksel = dpll4_clksel,
837 .clkdm_name = "dpll4_clkdm", 837 .clkdm_name = "dpll4_clkdm",
838 .recalc = &omap2_clksel_recalc, 838 .recalc = &omap2_clksel_recalc,
@@ -859,7 +859,7 @@ static struct clk dpll4_m5_ck = {
859 .parent = &dpll4_ck, 859 .parent = &dpll4_ck,
860 .init = &omap2_init_clksel_parent, 860 .init = &omap2_init_clksel_parent,
861 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL), 861 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL),
862 .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, 862 .clksel_mask = OMAP3630_CLKSEL_CAM_MASK,
863 .clksel = dpll4_clksel, 863 .clksel = dpll4_clksel,
864 .clkdm_name = "dpll4_clkdm", 864 .clkdm_name = "dpll4_clkdm",
865 .set_rate = &omap2_clksel_set_rate, 865 .set_rate = &omap2_clksel_set_rate,
@@ -886,7 +886,7 @@ static struct clk dpll4_m6_ck = {
886 .parent = &dpll4_ck, 886 .parent = &dpll4_ck,
887 .init = &omap2_init_clksel_parent, 887 .init = &omap2_init_clksel_parent,
888 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), 888 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
889 .clksel_mask = OMAP3430_DIV_DPLL4_MASK, 889 .clksel_mask = OMAP3630_DIV_DPLL4_MASK,
890 .clksel = dpll4_clksel, 890 .clksel = dpll4_clksel,
891 .clkdm_name = "dpll4_clkdm", 891 .clkdm_name = "dpll4_clkdm",
892 .recalc = &omap2_clksel_recalc, 892 .recalc = &omap2_clksel_recalc,