diff options
Diffstat (limited to 'arch/arm/mach-omap2/clock36xx.c')
-rw-r--r-- | arch/arm/mach-omap2/clock36xx.c | 24 |
1 files changed, 10 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c index 0c5e25ed8879..8f3bf4e50908 100644 --- a/arch/arm/mach-omap2/clock36xx.c +++ b/arch/arm/mach-omap2/clock36xx.c | |||
@@ -22,8 +22,6 @@ | |||
22 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | 24 | ||
25 | #include <plat/clock.h> | ||
26 | |||
27 | #include "clock.h" | 25 | #include "clock.h" |
28 | #include "clock36xx.h" | 26 | #include "clock36xx.h" |
29 | 27 | ||
@@ -39,34 +37,32 @@ | |||
39 | * (Any other value different from the Read value) to the | 37 | * (Any other value different from the Read value) to the |
40 | * corresponding CM_CLKSEL register will refresh the dividers. | 38 | * corresponding CM_CLKSEL register will refresh the dividers. |
41 | */ | 39 | */ |
42 | static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk) | 40 | int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk) |
43 | { | 41 | { |
42 | struct clk_hw_omap *parent; | ||
43 | struct clk_hw *parent_hw; | ||
44 | u32 dummy_v, orig_v, clksel_shift; | 44 | u32 dummy_v, orig_v, clksel_shift; |
45 | int ret; | 45 | int ret; |
46 | 46 | ||
47 | /* Clear PWRDN bit of HSDIVIDER */ | 47 | /* Clear PWRDN bit of HSDIVIDER */ |
48 | ret = omap2_dflt_clk_enable(clk); | 48 | ret = omap2_dflt_clk_enable(clk); |
49 | 49 | ||
50 | parent_hw = __clk_get_hw(__clk_get_parent(clk->clk)); | ||
51 | parent = to_clk_hw_omap(parent_hw); | ||
52 | |||
50 | /* Restore the dividers */ | 53 | /* Restore the dividers */ |
51 | if (!ret) { | 54 | if (!ret) { |
52 | clksel_shift = __ffs(clk->parent->clksel_mask); | 55 | clksel_shift = __ffs(parent->clksel_mask); |
53 | orig_v = __raw_readl(clk->parent->clksel_reg); | 56 | orig_v = __raw_readl(parent->clksel_reg); |
54 | dummy_v = orig_v; | 57 | dummy_v = orig_v; |
55 | 58 | ||
56 | /* Write any other value different from the Read value */ | 59 | /* Write any other value different from the Read value */ |
57 | dummy_v ^= (1 << clksel_shift); | 60 | dummy_v ^= (1 << clksel_shift); |
58 | __raw_writel(dummy_v, clk->parent->clksel_reg); | 61 | __raw_writel(dummy_v, parent->clksel_reg); |
59 | 62 | ||
60 | /* Write the original divider */ | 63 | /* Write the original divider */ |
61 | __raw_writel(orig_v, clk->parent->clksel_reg); | 64 | __raw_writel(orig_v, parent->clksel_reg); |
62 | } | 65 | } |
63 | 66 | ||
64 | return ret; | 67 | return ret; |
65 | } | 68 | } |
66 | |||
67 | const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore = { | ||
68 | .enable = omap36xx_pwrdn_clk_enable_with_hsdiv_restore, | ||
69 | .disable = omap2_dflt_clk_disable, | ||
70 | .find_companion = omap2_clk_dflt_find_companion, | ||
71 | .find_idlest = omap2_clk_dflt_find_idlest, | ||
72 | }; | ||