diff options
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.h')
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.h | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index cf4644a94b9b..c9c5972a2e25 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
@@ -836,7 +836,8 @@ static struct clk dpll5_m2_ck = { | |||
836 | .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5), | 836 | .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5), |
837 | .clksel_mask = OMAP3430ES2_DIV_120M_MASK, | 837 | .clksel_mask = OMAP3430ES2_DIV_120M_MASK, |
838 | .clksel = div16_dpll5_clksel, | 838 | .clksel = div16_dpll5_clksel, |
839 | .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES, | 839 | .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | |
840 | PARENT_CONTROLS_CLOCK, | ||
840 | .recalc = &omap2_clksel_recalc, | 841 | .recalc = &omap2_clksel_recalc, |
841 | }; | 842 | }; |
842 | 843 | ||
@@ -1046,12 +1047,13 @@ static struct clk iva2_ck = { | |||
1046 | .name = "iva2_ck", | 1047 | .name = "iva2_ck", |
1047 | .parent = &dpll2_m2_ck, | 1048 | .parent = &dpll2_m2_ck, |
1048 | .init = &omap2_init_clksel_parent, | 1049 | .init = &omap2_init_clksel_parent, |
1050 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN), | ||
1051 | .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, | ||
1049 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, | 1052 | .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, |
1050 | OMAP3430_CM_IDLEST_PLL), | 1053 | OMAP3430_CM_IDLEST_PLL), |
1051 | .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, | 1054 | .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, |
1052 | .clksel = iva2_clksel, | 1055 | .clksel = iva2_clksel, |
1053 | .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | | 1056 | .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, |
1054 | PARENT_CONTROLS_CLOCK, | ||
1055 | .recalc = &omap2_clksel_recalc, | 1057 | .recalc = &omap2_clksel_recalc, |
1056 | }; | 1058 | }; |
1057 | 1059 | ||
@@ -1836,7 +1838,8 @@ static struct clk omapctrl_ick = { | |||
1836 | static struct clk ssi_l4_ick = { | 1838 | static struct clk ssi_l4_ick = { |
1837 | .name = "ssi_l4_ick", | 1839 | .name = "ssi_l4_ick", |
1838 | .parent = &l4_ick, | 1840 | .parent = &l4_ick, |
1839 | .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, | 1841 | .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | |
1842 | PARENT_CONTROLS_CLOCK, | ||
1840 | .recalc = &followparent_recalc, | 1843 | .recalc = &followparent_recalc, |
1841 | }; | 1844 | }; |
1842 | 1845 | ||
@@ -2344,7 +2347,7 @@ static struct clk gpio6_fck = { | |||
2344 | .name = "gpio6_fck", | 2347 | .name = "gpio6_fck", |
2345 | .parent = &per_32k_alwon_fck, | 2348 | .parent = &per_32k_alwon_fck, |
2346 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2349 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2347 | .enable_bit = OMAP3430_EN_GPT6_SHIFT, | 2350 | .enable_bit = OMAP3430_EN_GPIO6_SHIFT, |
2348 | .flags = CLOCK_IN_OMAP343X, | 2351 | .flags = CLOCK_IN_OMAP343X, |
2349 | .recalc = &followparent_recalc, | 2352 | .recalc = &followparent_recalc, |
2350 | }; | 2353 | }; |
@@ -2353,7 +2356,7 @@ static struct clk gpio5_fck = { | |||
2353 | .name = "gpio5_fck", | 2356 | .name = "gpio5_fck", |
2354 | .parent = &per_32k_alwon_fck, | 2357 | .parent = &per_32k_alwon_fck, |
2355 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2358 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2356 | .enable_bit = OMAP3430_EN_GPT5_SHIFT, | 2359 | .enable_bit = OMAP3430_EN_GPIO5_SHIFT, |
2357 | .flags = CLOCK_IN_OMAP343X, | 2360 | .flags = CLOCK_IN_OMAP343X, |
2358 | .recalc = &followparent_recalc, | 2361 | .recalc = &followparent_recalc, |
2359 | }; | 2362 | }; |
@@ -2362,7 +2365,7 @@ static struct clk gpio4_fck = { | |||
2362 | .name = "gpio4_fck", | 2365 | .name = "gpio4_fck", |
2363 | .parent = &per_32k_alwon_fck, | 2366 | .parent = &per_32k_alwon_fck, |
2364 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2367 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2365 | .enable_bit = OMAP3430_EN_GPT4_SHIFT, | 2368 | .enable_bit = OMAP3430_EN_GPIO4_SHIFT, |
2366 | .flags = CLOCK_IN_OMAP343X, | 2369 | .flags = CLOCK_IN_OMAP343X, |
2367 | .recalc = &followparent_recalc, | 2370 | .recalc = &followparent_recalc, |
2368 | }; | 2371 | }; |
@@ -2371,7 +2374,7 @@ static struct clk gpio3_fck = { | |||
2371 | .name = "gpio3_fck", | 2374 | .name = "gpio3_fck", |
2372 | .parent = &per_32k_alwon_fck, | 2375 | .parent = &per_32k_alwon_fck, |
2373 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2376 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2374 | .enable_bit = OMAP3430_EN_GPT3_SHIFT, | 2377 | .enable_bit = OMAP3430_EN_GPIO3_SHIFT, |
2375 | .flags = CLOCK_IN_OMAP343X, | 2378 | .flags = CLOCK_IN_OMAP343X, |
2376 | .recalc = &followparent_recalc, | 2379 | .recalc = &followparent_recalc, |
2377 | }; | 2380 | }; |
@@ -2380,7 +2383,7 @@ static struct clk gpio2_fck = { | |||
2380 | .name = "gpio2_fck", | 2383 | .name = "gpio2_fck", |
2381 | .parent = &per_32k_alwon_fck, | 2384 | .parent = &per_32k_alwon_fck, |
2382 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2385 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2383 | .enable_bit = OMAP3430_EN_GPT2_SHIFT, | 2386 | .enable_bit = OMAP3430_EN_GPIO2_SHIFT, |
2384 | .flags = CLOCK_IN_OMAP343X, | 2387 | .flags = CLOCK_IN_OMAP343X, |
2385 | .recalc = &followparent_recalc, | 2388 | .recalc = &followparent_recalc, |
2386 | }; | 2389 | }; |