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Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.h')
-rw-r--r--arch/arm/mach-omap2/clock34xx.h30
1 files changed, 20 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index c9c5972a2e25..73624dc04c97 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -1365,7 +1365,8 @@ static const struct clksel mcbsp_15_clksel[] = {
1365}; 1365};
1366 1366
1367static struct clk mcbsp5_fck = { 1367static struct clk mcbsp5_fck = {
1368 .name = "mcbsp5_fck", 1368 .name = "mcbsp_fck",
1369 .id = 5,
1369 .init = &omap2_init_clksel_parent, 1370 .init = &omap2_init_clksel_parent,
1370 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1371 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1371 .enable_bit = OMAP3430_EN_MCBSP5_SHIFT, 1372 .enable_bit = OMAP3430_EN_MCBSP5_SHIFT,
@@ -1377,7 +1378,8 @@ static struct clk mcbsp5_fck = {
1377}; 1378};
1378 1379
1379static struct clk mcbsp1_fck = { 1380static struct clk mcbsp1_fck = {
1380 .name = "mcbsp1_fck", 1381 .name = "mcbsp_fck",
1382 .id = 1,
1381 .init = &omap2_init_clksel_parent, 1383 .init = &omap2_init_clksel_parent,
1382 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1384 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1383 .enable_bit = OMAP3430_EN_MCBSP1_SHIFT, 1385 .enable_bit = OMAP3430_EN_MCBSP1_SHIFT,
@@ -1789,7 +1791,8 @@ static struct clk gpt10_ick = {
1789}; 1791};
1790 1792
1791static struct clk mcbsp5_ick = { 1793static struct clk mcbsp5_ick = {
1792 .name = "mcbsp5_ick", 1794 .name = "mcbsp_ick",
1795 .id = 5,
1793 .parent = &core_l4_ick, 1796 .parent = &core_l4_ick,
1794 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1797 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1795 .enable_bit = OMAP3430_EN_MCBSP5_SHIFT, 1798 .enable_bit = OMAP3430_EN_MCBSP5_SHIFT,
@@ -1798,7 +1801,8 @@ static struct clk mcbsp5_ick = {
1798}; 1801};
1799 1802
1800static struct clk mcbsp1_ick = { 1803static struct clk mcbsp1_ick = {
1801 .name = "mcbsp1_ick", 1804 .name = "mcbsp_ick",
1805 .id = 1,
1802 .parent = &core_l4_ick, 1806 .parent = &core_l4_ick,
1803 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1807 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1804 .enable_bit = OMAP3430_EN_MCBSP1_SHIFT, 1808 .enable_bit = OMAP3430_EN_MCBSP1_SHIFT,
@@ -2541,7 +2545,8 @@ static struct clk gpt2_ick = {
2541}; 2545};
2542 2546
2543static struct clk mcbsp2_ick = { 2547static struct clk mcbsp2_ick = {
2544 .name = "mcbsp2_ick", 2548 .name = "mcbsp_ick",
2549 .id = 2,
2545 .parent = &per_l4_ick, 2550 .parent = &per_l4_ick,
2546 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2551 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2547 .enable_bit = OMAP3430_EN_MCBSP2_SHIFT, 2552 .enable_bit = OMAP3430_EN_MCBSP2_SHIFT,
@@ -2550,7 +2555,8 @@ static struct clk mcbsp2_ick = {
2550}; 2555};
2551 2556
2552static struct clk mcbsp3_ick = { 2557static struct clk mcbsp3_ick = {
2553 .name = "mcbsp3_ick", 2558 .name = "mcbsp_ick",
2559 .id = 3,
2554 .parent = &per_l4_ick, 2560 .parent = &per_l4_ick,
2555 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2561 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2556 .enable_bit = OMAP3430_EN_MCBSP3_SHIFT, 2562 .enable_bit = OMAP3430_EN_MCBSP3_SHIFT,
@@ -2559,7 +2565,8 @@ static struct clk mcbsp3_ick = {
2559}; 2565};
2560 2566
2561static struct clk mcbsp4_ick = { 2567static struct clk mcbsp4_ick = {
2562 .name = "mcbsp4_ick", 2568 .name = "mcbsp_ick",
2569 .id = 4,
2563 .parent = &per_l4_ick, 2570 .parent = &per_l4_ick,
2564 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2571 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2565 .enable_bit = OMAP3430_EN_MCBSP4_SHIFT, 2572 .enable_bit = OMAP3430_EN_MCBSP4_SHIFT,
@@ -2574,7 +2581,8 @@ static const struct clksel mcbsp_234_clksel[] = {
2574}; 2581};
2575 2582
2576static struct clk mcbsp2_fck = { 2583static struct clk mcbsp2_fck = {
2577 .name = "mcbsp2_fck", 2584 .name = "mcbsp_fck",
2585 .id = 2,
2578 .init = &omap2_init_clksel_parent, 2586 .init = &omap2_init_clksel_parent,
2579 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2587 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2580 .enable_bit = OMAP3430_EN_MCBSP2_SHIFT, 2588 .enable_bit = OMAP3430_EN_MCBSP2_SHIFT,
@@ -2586,7 +2594,8 @@ static struct clk mcbsp2_fck = {
2586}; 2594};
2587 2595
2588static struct clk mcbsp3_fck = { 2596static struct clk mcbsp3_fck = {
2589 .name = "mcbsp3_fck", 2597 .name = "mcbsp_fck",
2598 .id = 3,
2590 .init = &omap2_init_clksel_parent, 2599 .init = &omap2_init_clksel_parent,
2591 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2600 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2592 .enable_bit = OMAP3430_EN_MCBSP3_SHIFT, 2601 .enable_bit = OMAP3430_EN_MCBSP3_SHIFT,
@@ -2598,7 +2607,8 @@ static struct clk mcbsp3_fck = {
2598}; 2607};
2599 2608
2600static struct clk mcbsp4_fck = { 2609static struct clk mcbsp4_fck = {
2601 .name = "mcbsp4_fck", 2610 .name = "mcbsp_fck",
2611 .id = 4,
2602 .init = &omap2_init_clksel_parent, 2612 .init = &omap2_init_clksel_parent,
2603 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2613 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2604 .enable_bit = OMAP3430_EN_MCBSP4_SHIFT, 2614 .enable_bit = OMAP3430_EN_MCBSP4_SHIFT,