diff options
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.h')
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 6763b8f73028..017a30e9aa1d 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
@@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = { | |||
2182 | 2182 | ||
2183 | static struct clk gpio1_dbck = { | 2183 | static struct clk gpio1_dbck = { |
2184 | .name = "gpio1_dbck", | 2184 | .name = "gpio1_dbck", |
2185 | .ops = &clkops_omap2_dflt_wait, | 2185 | .ops = &clkops_omap2_dflt, |
2186 | .parent = &wkup_32k_fck, | 2186 | .parent = &wkup_32k_fck, |
2187 | .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), | 2187 | .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), |
2188 | .enable_bit = OMAP3430_EN_GPIO1_SHIFT, | 2188 | .enable_bit = OMAP3430_EN_GPIO1_SHIFT, |
@@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = { | |||
2427 | 2427 | ||
2428 | static struct clk gpio6_dbck = { | 2428 | static struct clk gpio6_dbck = { |
2429 | .name = "gpio6_dbck", | 2429 | .name = "gpio6_dbck", |
2430 | .ops = &clkops_omap2_dflt_wait, | 2430 | .ops = &clkops_omap2_dflt, |
2431 | .parent = &per_32k_alwon_fck, | 2431 | .parent = &per_32k_alwon_fck, |
2432 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2432 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2433 | .enable_bit = OMAP3430_EN_GPIO6_SHIFT, | 2433 | .enable_bit = OMAP3430_EN_GPIO6_SHIFT, |
@@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = { | |||
2437 | 2437 | ||
2438 | static struct clk gpio5_dbck = { | 2438 | static struct clk gpio5_dbck = { |
2439 | .name = "gpio5_dbck", | 2439 | .name = "gpio5_dbck", |
2440 | .ops = &clkops_omap2_dflt_wait, | 2440 | .ops = &clkops_omap2_dflt, |
2441 | .parent = &per_32k_alwon_fck, | 2441 | .parent = &per_32k_alwon_fck, |
2442 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2442 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2443 | .enable_bit = OMAP3430_EN_GPIO5_SHIFT, | 2443 | .enable_bit = OMAP3430_EN_GPIO5_SHIFT, |
@@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = { | |||
2447 | 2447 | ||
2448 | static struct clk gpio4_dbck = { | 2448 | static struct clk gpio4_dbck = { |
2449 | .name = "gpio4_dbck", | 2449 | .name = "gpio4_dbck", |
2450 | .ops = &clkops_omap2_dflt_wait, | 2450 | .ops = &clkops_omap2_dflt, |
2451 | .parent = &per_32k_alwon_fck, | 2451 | .parent = &per_32k_alwon_fck, |
2452 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2452 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2453 | .enable_bit = OMAP3430_EN_GPIO4_SHIFT, | 2453 | .enable_bit = OMAP3430_EN_GPIO4_SHIFT, |
@@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = { | |||
2457 | 2457 | ||
2458 | static struct clk gpio3_dbck = { | 2458 | static struct clk gpio3_dbck = { |
2459 | .name = "gpio3_dbck", | 2459 | .name = "gpio3_dbck", |
2460 | .ops = &clkops_omap2_dflt_wait, | 2460 | .ops = &clkops_omap2_dflt, |
2461 | .parent = &per_32k_alwon_fck, | 2461 | .parent = &per_32k_alwon_fck, |
2462 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2462 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2463 | .enable_bit = OMAP3430_EN_GPIO3_SHIFT, | 2463 | .enable_bit = OMAP3430_EN_GPIO3_SHIFT, |
@@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = { | |||
2467 | 2467 | ||
2468 | static struct clk gpio2_dbck = { | 2468 | static struct clk gpio2_dbck = { |
2469 | .name = "gpio2_dbck", | 2469 | .name = "gpio2_dbck", |
2470 | .ops = &clkops_omap2_dflt_wait, | 2470 | .ops = &clkops_omap2_dflt, |
2471 | .parent = &per_32k_alwon_fck, | 2471 | .parent = &per_32k_alwon_fck, |
2472 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), | 2472 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), |
2473 | .enable_bit = OMAP3430_EN_GPIO2_SHIFT, | 2473 | .enable_bit = OMAP3430_EN_GPIO2_SHIFT, |