diff options
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.h')
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index f8088c0ec018..7ee131202625 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
@@ -266,7 +266,7 @@ static struct dpll_data dpll1_dd = { | |||
266 | .autoidle_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL), | 266 | .autoidle_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL), |
267 | .autoidle_mask = OMAP3430_AUTO_MPU_DPLL_MASK, | 267 | .autoidle_mask = OMAP3430_AUTO_MPU_DPLL_MASK, |
268 | .idlest_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), | 268 | .idlest_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), |
269 | .idlest_bit = OMAP3430_ST_MPU_CLK_SHIFT, | 269 | .idlest_mask = OMAP3430_ST_MPU_CLK_MASK, |
270 | .max_multiplier = OMAP3_MAX_DPLL_MULT, | 270 | .max_multiplier = OMAP3_MAX_DPLL_MULT, |
271 | .max_divider = OMAP3_MAX_DPLL_DIV, | 271 | .max_divider = OMAP3_MAX_DPLL_DIV, |
272 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE | 272 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE |
@@ -339,7 +339,7 @@ static struct dpll_data dpll2_dd = { | |||
339 | .autoidle_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_AUTOIDLE_PLL), | 339 | .autoidle_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_AUTOIDLE_PLL), |
340 | .autoidle_mask = OMAP3430_AUTO_IVA2_DPLL_MASK, | 340 | .autoidle_mask = OMAP3430_AUTO_IVA2_DPLL_MASK, |
341 | .idlest_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL), | 341 | .idlest_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL), |
342 | .idlest_bit = OMAP3430_ST_IVA2_CLK_SHIFT, | 342 | .idlest_mask = OMAP3430_ST_IVA2_CLK_MASK, |
343 | .max_multiplier = OMAP3_MAX_DPLL_MULT, | 343 | .max_multiplier = OMAP3_MAX_DPLL_MULT, |
344 | .max_divider = OMAP3_MAX_DPLL_DIV, | 344 | .max_divider = OMAP3_MAX_DPLL_DIV, |
345 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE | 345 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE |
@@ -397,6 +397,8 @@ static struct dpll_data dpll3_dd = { | |||
397 | .recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT, | 397 | .recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT, |
398 | .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE), | 398 | .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE), |
399 | .autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK, | 399 | .autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK, |
400 | .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), | ||
401 | .idlest_mask = OMAP3430_ST_CORE_CLK_MASK, | ||
400 | .max_multiplier = OMAP3_MAX_DPLL_MULT, | 402 | .max_multiplier = OMAP3_MAX_DPLL_MULT, |
401 | .max_divider = OMAP3_MAX_DPLL_DIV, | 403 | .max_divider = OMAP3_MAX_DPLL_DIV, |
402 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE | 404 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE |
@@ -587,7 +589,7 @@ static struct dpll_data dpll4_dd = { | |||
587 | .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE), | 589 | .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE), |
588 | .autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK, | 590 | .autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK, |
589 | .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), | 591 | .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), |
590 | .idlest_bit = OMAP3430_ST_PERIPH_CLK_SHIFT, | 592 | .idlest_mask = OMAP3430_ST_PERIPH_CLK_MASK, |
591 | .max_multiplier = OMAP3_MAX_DPLL_MULT, | 593 | .max_multiplier = OMAP3_MAX_DPLL_MULT, |
592 | .max_divider = OMAP3_MAX_DPLL_DIV, | 594 | .max_divider = OMAP3_MAX_DPLL_DIV, |
593 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE | 595 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE |
@@ -926,7 +928,7 @@ static struct dpll_data dpll5_dd = { | |||
926 | .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_AUTOIDLE2_PLL), | 928 | .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_AUTOIDLE2_PLL), |
927 | .autoidle_mask = OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK, | 929 | .autoidle_mask = OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK, |
928 | .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), | 930 | .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), |
929 | .idlest_bit = OMAP3430ES2_ST_PERIPH2_CLK_SHIFT, | 931 | .idlest_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK, |
930 | .max_multiplier = OMAP3_MAX_DPLL_MULT, | 932 | .max_multiplier = OMAP3_MAX_DPLL_MULT, |
931 | .max_divider = OMAP3_MAX_DPLL_DIV, | 933 | .max_divider = OMAP3_MAX_DPLL_DIV, |
932 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE | 934 | .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE |