diff options
Diffstat (limited to 'arch/arm/mach-omap2/clock2xxx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/clock2xxx_data.c | 35 |
1 files changed, 8 insertions, 27 deletions
diff --git a/arch/arm/mach-omap2/clock2xxx_data.c b/arch/arm/mach-omap2/clock2xxx_data.c index aa37761fa457..9bcef44fb140 100644 --- a/arch/arm/mach-omap2/clock2xxx_data.c +++ b/arch/arm/mach-omap2/clock2xxx_data.c | |||
@@ -426,15 +426,13 @@ static struct clk mpu_ck = { /* Control cpu */ | |||
426 | .name = "mpu_ck", | 426 | .name = "mpu_ck", |
427 | .ops = &clkops_null, | 427 | .ops = &clkops_null, |
428 | .parent = &core_ck, | 428 | .parent = &core_ck, |
429 | .flags = DELAYED_APP | CONFIG_PARTICIPANT, | 429 | .flags = DELAYED_APP, |
430 | .clkdm_name = "mpu_clkdm", | 430 | .clkdm_name = "mpu_clkdm", |
431 | .init = &omap2_init_clksel_parent, | 431 | .init = &omap2_init_clksel_parent, |
432 | .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL), | 432 | .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL), |
433 | .clksel_mask = OMAP24XX_CLKSEL_MPU_MASK, | 433 | .clksel_mask = OMAP24XX_CLKSEL_MPU_MASK, |
434 | .clksel = mpu_clksel, | 434 | .clksel = mpu_clksel, |
435 | .recalc = &omap2_clksel_recalc, | 435 | .recalc = &omap2_clksel_recalc, |
436 | .round_rate = &omap2_clksel_round_rate, | ||
437 | .set_rate = &omap2_clksel_set_rate | ||
438 | }; | 436 | }; |
439 | 437 | ||
440 | /* | 438 | /* |
@@ -468,7 +466,7 @@ static struct clk dsp_fck = { | |||
468 | .name = "dsp_fck", | 466 | .name = "dsp_fck", |
469 | .ops = &clkops_omap2_dflt_wait, | 467 | .ops = &clkops_omap2_dflt_wait, |
470 | .parent = &core_ck, | 468 | .parent = &core_ck, |
471 | .flags = DELAYED_APP | CONFIG_PARTICIPANT, | 469 | .flags = DELAYED_APP, |
472 | .clkdm_name = "dsp_clkdm", | 470 | .clkdm_name = "dsp_clkdm", |
473 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), | 471 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), |
474 | .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, | 472 | .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, |
@@ -476,8 +474,6 @@ static struct clk dsp_fck = { | |||
476 | .clksel_mask = OMAP24XX_CLKSEL_DSP_MASK, | 474 | .clksel_mask = OMAP24XX_CLKSEL_DSP_MASK, |
477 | .clksel = dsp_fck_clksel, | 475 | .clksel = dsp_fck_clksel, |
478 | .recalc = &omap2_clksel_recalc, | 476 | .recalc = &omap2_clksel_recalc, |
479 | .round_rate = &omap2_clksel_round_rate, | ||
480 | .set_rate = &omap2_clksel_set_rate | ||
481 | }; | 477 | }; |
482 | 478 | ||
483 | /* DSP interface clock */ | 479 | /* DSP interface clock */ |
@@ -498,13 +494,11 @@ static struct clk dsp_irate_ick = { | |||
498 | .name = "dsp_irate_ick", | 494 | .name = "dsp_irate_ick", |
499 | .ops = &clkops_null, | 495 | .ops = &clkops_null, |
500 | .parent = &dsp_fck, | 496 | .parent = &dsp_fck, |
501 | .flags = DELAYED_APP | CONFIG_PARTICIPANT, | 497 | .flags = DELAYED_APP, |
502 | .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), | 498 | .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), |
503 | .clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK, | 499 | .clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK, |
504 | .clksel = dsp_irate_ick_clksel, | 500 | .clksel = dsp_irate_ick_clksel, |
505 | .recalc = &omap2_clksel_recalc, | 501 | .recalc = &omap2_clksel_recalc, |
506 | .round_rate = &omap2_clksel_round_rate, | ||
507 | .set_rate = &omap2_clksel_set_rate | ||
508 | }; | 502 | }; |
509 | 503 | ||
510 | /* 2420 only */ | 504 | /* 2420 only */ |
@@ -512,7 +506,6 @@ static struct clk dsp_ick = { | |||
512 | .name = "dsp_ick", /* apparently ipi and isp */ | 506 | .name = "dsp_ick", /* apparently ipi and isp */ |
513 | .ops = &clkops_omap2_dflt_wait, | 507 | .ops = &clkops_omap2_dflt_wait, |
514 | .parent = &dsp_irate_ick, | 508 | .parent = &dsp_irate_ick, |
515 | .flags = CONFIG_PARTICIPANT, | ||
516 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN), | 509 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN), |
517 | .enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */ | 510 | .enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */ |
518 | }; | 511 | }; |
@@ -522,7 +515,6 @@ static struct clk iva2_1_ick = { | |||
522 | .name = "iva2_1_ick", | 515 | .name = "iva2_1_ick", |
523 | .ops = &clkops_omap2_dflt_wait, | 516 | .ops = &clkops_omap2_dflt_wait, |
524 | .parent = &dsp_irate_ick, | 517 | .parent = &dsp_irate_ick, |
525 | .flags = CONFIG_PARTICIPANT, | ||
526 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), | 518 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), |
527 | .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, | 519 | .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, |
528 | }; | 520 | }; |
@@ -536,7 +528,7 @@ static struct clk iva1_ifck = { | |||
536 | .name = "iva1_ifck", | 528 | .name = "iva1_ifck", |
537 | .ops = &clkops_omap2_dflt_wait, | 529 | .ops = &clkops_omap2_dflt_wait, |
538 | .parent = &core_ck, | 530 | .parent = &core_ck, |
539 | .flags = CONFIG_PARTICIPANT | DELAYED_APP, | 531 | .flags = DELAYED_APP, |
540 | .clkdm_name = "iva1_clkdm", | 532 | .clkdm_name = "iva1_clkdm", |
541 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), | 533 | .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), |
542 | .enable_bit = OMAP2420_EN_IVA_COP_SHIFT, | 534 | .enable_bit = OMAP2420_EN_IVA_COP_SHIFT, |
@@ -544,8 +536,6 @@ static struct clk iva1_ifck = { | |||
544 | .clksel_mask = OMAP2420_CLKSEL_IVA_MASK, | 536 | .clksel_mask = OMAP2420_CLKSEL_IVA_MASK, |
545 | .clksel = dsp_fck_clksel, | 537 | .clksel = dsp_fck_clksel, |
546 | .recalc = &omap2_clksel_recalc, | 538 | .recalc = &omap2_clksel_recalc, |
547 | .round_rate = &omap2_clksel_round_rate, | ||
548 | .set_rate = &omap2_clksel_set_rate | ||
549 | }; | 539 | }; |
550 | 540 | ||
551 | /* IVA1 mpu/int/i/f clocks are /2 of parent */ | 541 | /* IVA1 mpu/int/i/f clocks are /2 of parent */ |
@@ -599,14 +589,12 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */ | |||
599 | .name = "core_l3_ck", | 589 | .name = "core_l3_ck", |
600 | .ops = &clkops_null, | 590 | .ops = &clkops_null, |
601 | .parent = &core_ck, | 591 | .parent = &core_ck, |
602 | .flags = DELAYED_APP | CONFIG_PARTICIPANT, | 592 | .flags = DELAYED_APP, |
603 | .clkdm_name = "core_l3_clkdm", | 593 | .clkdm_name = "core_l3_clkdm", |
604 | .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), | 594 | .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), |
605 | .clksel_mask = OMAP24XX_CLKSEL_L3_MASK, | 595 | .clksel_mask = OMAP24XX_CLKSEL_L3_MASK, |
606 | .clksel = core_l3_clksel, | 596 | .clksel = core_l3_clksel, |
607 | .recalc = &omap2_clksel_recalc, | 597 | .recalc = &omap2_clksel_recalc, |
608 | .round_rate = &omap2_clksel_round_rate, | ||
609 | .set_rate = &omap2_clksel_set_rate | ||
610 | }; | 598 | }; |
611 | 599 | ||
612 | /* usb_l4_ick */ | 600 | /* usb_l4_ick */ |
@@ -627,7 +615,7 @@ static struct clk usb_l4_ick = { /* FS-USB interface clock */ | |||
627 | .name = "usb_l4_ick", | 615 | .name = "usb_l4_ick", |
628 | .ops = &clkops_omap2_dflt_wait, | 616 | .ops = &clkops_omap2_dflt_wait, |
629 | .parent = &core_l3_ck, | 617 | .parent = &core_l3_ck, |
630 | .flags = DELAYED_APP | CONFIG_PARTICIPANT, | 618 | .flags = DELAYED_APP, |
631 | .clkdm_name = "core_l4_clkdm", | 619 | .clkdm_name = "core_l4_clkdm", |
632 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), | 620 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), |
633 | .enable_bit = OMAP24XX_EN_USB_SHIFT, | 621 | .enable_bit = OMAP24XX_EN_USB_SHIFT, |
@@ -635,8 +623,6 @@ static struct clk usb_l4_ick = { /* FS-USB interface clock */ | |||
635 | .clksel_mask = OMAP24XX_CLKSEL_USB_MASK, | 623 | .clksel_mask = OMAP24XX_CLKSEL_USB_MASK, |
636 | .clksel = usb_l4_ick_clksel, | 624 | .clksel = usb_l4_ick_clksel, |
637 | .recalc = &omap2_clksel_recalc, | 625 | .recalc = &omap2_clksel_recalc, |
638 | .round_rate = &omap2_clksel_round_rate, | ||
639 | .set_rate = &omap2_clksel_set_rate | ||
640 | }; | 626 | }; |
641 | 627 | ||
642 | /* | 628 | /* |
@@ -763,7 +749,7 @@ static struct clk gfx_2d_fck = { | |||
763 | .name = "gfx_2d_fck", | 749 | .name = "gfx_2d_fck", |
764 | .ops = &clkops_omap2_dflt_wait, | 750 | .ops = &clkops_omap2_dflt_wait, |
765 | .parent = &core_l3_ck, | 751 | .parent = &core_l3_ck, |
766 | .flags = DELAYED_APP | CONFIG_PARTICIPANT, | 752 | .flags = DELAYED_APP, |
767 | .clkdm_name = "gfx_clkdm", | 753 | .clkdm_name = "gfx_clkdm", |
768 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), | 754 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), |
769 | .enable_bit = OMAP24XX_EN_2D_SHIFT, | 755 | .enable_bit = OMAP24XX_EN_2D_SHIFT, |
@@ -771,15 +757,12 @@ static struct clk gfx_2d_fck = { | |||
771 | .clksel_mask = OMAP_CLKSEL_GFX_MASK, | 757 | .clksel_mask = OMAP_CLKSEL_GFX_MASK, |
772 | .clksel = gfx_fck_clksel, | 758 | .clksel = gfx_fck_clksel, |
773 | .recalc = &omap2_clksel_recalc, | 759 | .recalc = &omap2_clksel_recalc, |
774 | .round_rate = &omap2_clksel_round_rate, | ||
775 | .set_rate = &omap2_clksel_set_rate | ||
776 | }; | 760 | }; |
777 | 761 | ||
778 | static struct clk gfx_ick = { | 762 | static struct clk gfx_ick = { |
779 | .name = "gfx_ick", /* From l3 */ | 763 | .name = "gfx_ick", /* From l3 */ |
780 | .ops = &clkops_omap2_dflt_wait, | 764 | .ops = &clkops_omap2_dflt_wait, |
781 | .parent = &core_l3_ck, | 765 | .parent = &core_l3_ck, |
782 | .flags = CONFIG_PARTICIPANT, | ||
783 | .clkdm_name = "gfx_clkdm", | 766 | .clkdm_name = "gfx_clkdm", |
784 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), | 767 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), |
785 | .enable_bit = OMAP_EN_GFX_SHIFT, | 768 | .enable_bit = OMAP_EN_GFX_SHIFT, |
@@ -810,7 +793,7 @@ static struct clk mdm_ick = { /* used both as a ick and fck */ | |||
810 | .name = "mdm_ick", | 793 | .name = "mdm_ick", |
811 | .ops = &clkops_omap2_dflt_wait, | 794 | .ops = &clkops_omap2_dflt_wait, |
812 | .parent = &core_ck, | 795 | .parent = &core_ck, |
813 | .flags = DELAYED_APP | CONFIG_PARTICIPANT, | 796 | .flags = DELAYED_APP, |
814 | .clkdm_name = "mdm_clkdm", | 797 | .clkdm_name = "mdm_clkdm", |
815 | .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN), | 798 | .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN), |
816 | .enable_bit = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT, | 799 | .enable_bit = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT, |
@@ -818,8 +801,6 @@ static struct clk mdm_ick = { /* used both as a ick and fck */ | |||
818 | .clksel_mask = OMAP2430_CLKSEL_MDM_MASK, | 801 | .clksel_mask = OMAP2430_CLKSEL_MDM_MASK, |
819 | .clksel = mdm_ick_clksel, | 802 | .clksel = mdm_ick_clksel, |
820 | .recalc = &omap2_clksel_recalc, | 803 | .recalc = &omap2_clksel_recalc, |
821 | .round_rate = &omap2_clksel_round_rate, | ||
822 | .set_rate = &omap2_clksel_set_rate | ||
823 | }; | 804 | }; |
824 | 805 | ||
825 | static struct clk mdm_osc_ck = { | 806 | static struct clk mdm_osc_ck = { |