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Diffstat (limited to 'arch/arm/mach-omap2/clock24xx.c')
-rw-r--r--arch/arm/mach-omap2/clock24xx.c197
1 files changed, 183 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 3a0a1b8aa0bb..36093ea878a3 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -31,6 +31,7 @@
31#include <mach/clock.h> 31#include <mach/clock.h>
32#include <mach/sram.h> 32#include <mach/sram.h>
33#include <asm/div64.h> 33#include <asm/div64.h>
34#include <asm/clkdev.h>
34 35
35#include "memory.h" 36#include "memory.h"
36#include "clock.h" 37#include "clock.h"
@@ -44,6 +45,177 @@ static const struct clkops clkops_fixed;
44 45
45#include "clock24xx.h" 46#include "clock24xx.h"
46 47
48struct omap_clk {
49 u32 cpu;
50 struct clk_lookup lk;
51};
52
53#define CLK(dev, con, ck, cp) \
54 { \
55 .cpu = cp, \
56 .lk = { \
57 .dev_id = dev, \
58 .con_id = con, \
59 .clk = ck, \
60 }, \
61 }
62
63#define CK_243X (1 << 0)
64#define CK_242X (1 << 1)
65
66static struct omap_clk omap24xx_clks[] = {
67 /* external root sources */
68 CLK(NULL, "func_32k_ck", &func_32k_ck, CK_243X | CK_242X),
69 CLK(NULL, "osc_ck", &osc_ck, CK_243X | CK_242X),
70 CLK(NULL, "sys_ck", &sys_ck, CK_243X | CK_242X),
71 CLK(NULL, "alt_ck", &alt_ck, CK_243X | CK_242X),
72 /* internal analog sources */
73 CLK(NULL, "dpll_ck", &dpll_ck, CK_243X | CK_242X),
74 CLK(NULL, "apll96_ck", &apll96_ck, CK_243X | CK_242X),
75 CLK(NULL, "apll54_ck", &apll54_ck, CK_243X | CK_242X),
76 /* internal prcm root sources */
77 CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X | CK_242X),
78 CLK(NULL, "core_ck", &core_ck, CK_243X | CK_242X),
79 CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X | CK_242X),
80 CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X | CK_242X),
81 CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X | CK_242X),
82 CLK(NULL, "ck_wdt1_osc", &wdt1_osc_ck, CK_243X | CK_242X),
83 CLK(NULL, "sys_clkout_src", &sys_clkout_src, CK_243X | CK_242X),
84 CLK(NULL, "sys_clkout", &sys_clkout, CK_243X | CK_242X),
85 CLK(NULL, "sys_clkout2_src", &sys_clkout2_src, CK_242X),
86 CLK(NULL, "sys_clkout2", &sys_clkout2, CK_242X),
87 CLK(NULL, "emul_ck", &emul_ck, CK_242X),
88 /* mpu domain clocks */
89 CLK(NULL, "mpu_ck", &mpu_ck, CK_243X | CK_242X),
90 /* dsp domain clocks */
91 CLK(NULL, "dsp_fck", &dsp_fck, CK_243X | CK_242X),
92 CLK(NULL, "dsp_irate_ick", &dsp_irate_ick, CK_243X | CK_242X),
93 CLK(NULL, "dsp_ick", &dsp_ick, CK_242X),
94 CLK(NULL, "iva2_1_ick", &iva2_1_ick, CK_243X),
95 CLK(NULL, "iva1_ifck", &iva1_ifck, CK_242X),
96 CLK(NULL, "iva1_mpu_int_ifck", &iva1_mpu_int_ifck, CK_242X),
97 /* GFX domain clocks */
98 CLK(NULL, "gfx_3d_fck", &gfx_3d_fck, CK_243X | CK_242X),
99 CLK(NULL, "gfx_2d_fck", &gfx_2d_fck, CK_243X | CK_242X),
100 CLK(NULL, "gfx_ick", &gfx_ick, CK_243X | CK_242X),
101 /* Modem domain clocks */
102 CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
103 CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
104 /* DSS domain clocks */
105 CLK(NULL, "dss_ick", &dss_ick, CK_243X | CK_242X),
106 CLK(NULL, "dss1_fck", &dss1_fck, CK_243X | CK_242X),
107 CLK(NULL, "dss2_fck", &dss2_fck, CK_243X | CK_242X),
108 CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X | CK_242X),
109 /* L3 domain clocks */
110 CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X),
111 CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X),
112 CLK(NULL, "usb_l4_ick", &usb_l4_ick, CK_243X | CK_242X),
113 /* L4 domain clocks */
114 CLK(NULL, "l4_ck", &l4_ck, CK_243X | CK_242X),
115 /* virtual meta-group clock */
116 CLK(NULL, "virt_prcm_set", &virt_prcm_set, CK_243X | CK_242X),
117 /* general l4 interface ck, multi-parent functional clk */
118 CLK(NULL, "gpt1_ick", &gpt1_ick, CK_243X | CK_242X),
119 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_243X | CK_242X),
120 CLK(NULL, "gpt2_ick", &gpt2_ick, CK_243X | CK_242X),
121 CLK(NULL, "gpt2_fck", &gpt2_fck, CK_243X | CK_242X),
122 CLK(NULL, "gpt3_ick", &gpt3_ick, CK_243X | CK_242X),
123 CLK(NULL, "gpt3_fck", &gpt3_fck, CK_243X | CK_242X),
124 CLK(NULL, "gpt4_ick", &gpt4_ick, CK_243X | CK_242X),
125 CLK(NULL, "gpt4_fck", &gpt4_fck, CK_243X | CK_242X),
126 CLK(NULL, "gpt5_ick", &gpt5_ick, CK_243X | CK_242X),
127 CLK(NULL, "gpt5_fck", &gpt5_fck, CK_243X | CK_242X),
128 CLK(NULL, "gpt6_ick", &gpt6_ick, CK_243X | CK_242X),
129 CLK(NULL, "gpt6_fck", &gpt6_fck, CK_243X | CK_242X),
130 CLK(NULL, "gpt7_ick", &gpt7_ick, CK_243X | CK_242X),
131 CLK(NULL, "gpt7_fck", &gpt7_fck, CK_243X | CK_242X),
132 CLK(NULL, "gpt8_ick", &gpt8_ick, CK_243X | CK_242X),
133 CLK(NULL, "gpt8_fck", &gpt8_fck, CK_243X | CK_242X),
134 CLK(NULL, "gpt9_ick", &gpt9_ick, CK_243X | CK_242X),
135 CLK(NULL, "gpt9_fck", &gpt9_fck, CK_243X | CK_242X),
136 CLK(NULL, "gpt10_ick", &gpt10_ick, CK_243X | CK_242X),
137 CLK(NULL, "gpt10_fck", &gpt10_fck, CK_243X | CK_242X),
138 CLK(NULL, "gpt11_ick", &gpt11_ick, CK_243X | CK_242X),
139 CLK(NULL, "gpt11_fck", &gpt11_fck, CK_243X | CK_242X),
140 CLK(NULL, "gpt12_ick", &gpt12_ick, CK_243X | CK_242X),
141 CLK(NULL, "gpt12_fck", &gpt12_fck, CK_243X | CK_242X),
142 CLK("omap-mcbsp.1", "mcbsp_ick", &mcbsp1_ick, CK_243X | CK_242X),
143 CLK("omap-mcbsp.1", "mcbsp_fck", &mcbsp1_fck, CK_243X | CK_242X),
144 CLK("omap-mcbsp.2", "mcbsp_ick", &mcbsp2_ick, CK_243X | CK_242X),
145 CLK("omap-mcbsp.2", "mcbsp_fck", &mcbsp2_fck, CK_243X | CK_242X),
146 CLK("omap-mcbsp.3", "mcbsp_ick", &mcbsp3_ick, CK_243X),
147 CLK("omap-mcbsp.3", "mcbsp_fck", &mcbsp3_fck, CK_243X),
148 CLK("omap-mcbsp.4", "mcbsp_ick", &mcbsp4_ick, CK_243X),
149 CLK("omap-mcbsp.4", "mcbsp_fck", &mcbsp4_fck, CK_243X),
150 CLK("omap-mcbsp.5", "mcbsp_ick", &mcbsp5_ick, CK_243X),
151 CLK("omap-mcbsp.5", "mcbsp_fck", &mcbsp5_fck, CK_243X),
152 CLK("omap2_mcspi.1", "mcspi_ick", &mcspi1_ick, CK_243X | CK_242X),
153 CLK("omap2_mcspi.1", "mcspi_fck", &mcspi1_fck, CK_243X | CK_242X),
154 CLK("omap2_mcspi.2", "mcspi_ick", &mcspi2_ick, CK_243X | CK_242X),
155 CLK("omap2_mcspi.2", "mcspi_fck", &mcspi2_fck, CK_243X | CK_242X),
156 CLK("omap2_mcspi.3", "mcspi_ick", &mcspi3_ick, CK_243X),
157 CLK("omap2_mcspi.3", "mcspi_fck", &mcspi3_fck, CK_243X),
158 CLK(NULL, "uart1_ick", &uart1_ick, CK_243X | CK_242X),
159 CLK(NULL, "uart1_fck", &uart1_fck, CK_243X | CK_242X),
160 CLK(NULL, "uart2_ick", &uart2_ick, CK_243X | CK_242X),
161 CLK(NULL, "uart2_fck", &uart2_fck, CK_243X | CK_242X),
162 CLK(NULL, "uart3_ick", &uart3_ick, CK_243X | CK_242X),
163 CLK(NULL, "uart3_fck", &uart3_fck, CK_243X | CK_242X),
164 CLK(NULL, "gpios_ick", &gpios_ick, CK_243X | CK_242X),
165 CLK(NULL, "gpios_fck", &gpios_fck, CK_243X | CK_242X),
166 CLK(NULL, "mpu_wdt_ick", &mpu_wdt_ick, CK_243X | CK_242X),
167 CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, CK_243X | CK_242X),
168 CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_243X | CK_242X),
169 CLK(NULL, "wdt1_ick", &wdt1_ick, CK_243X | CK_242X),
170 CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_243X | CK_242X),
171 CLK(NULL, "icr_ick", &icr_ick, CK_243X),
172 CLK(NULL, "cam_fck", &cam_fck, CK_243X | CK_242X),
173 CLK(NULL, "cam_ick", &cam_ick, CK_243X | CK_242X),
174 CLK(NULL, "mailboxes_ick", &mailboxes_ick, CK_243X | CK_242X),
175 CLK(NULL, "wdt4_ick", &wdt4_ick, CK_243X | CK_242X),
176 CLK(NULL, "wdt4_fck", &wdt4_fck, CK_243X | CK_242X),
177 CLK(NULL, "wdt3_ick", &wdt3_ick, CK_242X),
178 CLK(NULL, "wdt3_fck", &wdt3_fck, CK_242X),
179 CLK(NULL, "mspro_ick", &mspro_ick, CK_243X | CK_242X),
180 CLK(NULL, "mspro_fck", &mspro_fck, CK_243X | CK_242X),
181 CLK(NULL, "mmc_ick", &mmc_ick, CK_242X),
182 CLK(NULL, "mmc_fck", &mmc_fck, CK_242X),
183 CLK(NULL, "fac_ick", &fac_ick, CK_243X | CK_242X),
184 CLK(NULL, "fac_fck", &fac_fck, CK_243X | CK_242X),
185 CLK(NULL, "eac_ick", &eac_ick, CK_242X),
186 CLK(NULL, "eac_fck", &eac_fck, CK_242X),
187 CLK(NULL, "hdq_ick", &hdq_ick, CK_243X | CK_242X),
188 CLK(NULL, "hdq_fck", &hdq_fck, CK_243X | CK_242X),
189 CLK("i2c_omap.1", "i2c_ick", &i2c1_ick, CK_243X | CK_242X),
190 CLK("i2c_omap.1", "i2c_fck", &i2c1_fck, CK_242X),
191 CLK("i2c_omap.1", "i2c_fck", &i2chs1_fck, CK_243X),
192 CLK("i2c_omap.2", "i2c_ick", &i2c2_ick, CK_243X | CK_242X),
193 CLK("i2c_omap.2", "i2c_fck", &i2c2_fck, CK_242X),
194 CLK("i2c_omap.2", "i2c_fck", &i2chs2_fck, CK_243X),
195 CLK(NULL, "gpmc_fck", &gpmc_fck, CK_243X | CK_242X),
196 CLK(NULL, "sdma_fck", &sdma_fck, CK_243X | CK_242X),
197 CLK(NULL, "sdma_ick", &sdma_ick, CK_243X | CK_242X),
198 CLK(NULL, "vlynq_ick", &vlynq_ick, CK_242X),
199 CLK(NULL, "vlynq_fck", &vlynq_fck, CK_242X),
200 CLK(NULL, "sdrc_ick", &sdrc_ick, CK_243X),
201 CLK(NULL, "des_ick", &des_ick, CK_243X | CK_242X),
202 CLK(NULL, "sha_ick", &sha_ick, CK_243X | CK_242X),
203 CLK(NULL, "rng_ick", &rng_ick, CK_243X | CK_242X),
204 CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X),
205 CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X),
206 CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X),
207 CLK(NULL, "usbhs_ick", &usbhs_ick, CK_243X),
208 CLK("mmci-omap-hs.0", "mmchs_ick", &mmchs1_ick, CK_243X),
209 CLK("mmci-omap-hs.0", "mmchs_fck", &mmchs1_fck, CK_243X),
210 CLK("mmci-omap-hs.1", "mmchs_ick", &mmchs2_ick, CK_243X),
211 CLK("mmci-omap-hs.1", "mmchs_fck", &mmchs2_fck, CK_243X),
212 CLK(NULL, "gpio5_ick", &gpio5_ick, CK_243X),
213 CLK(NULL, "gpio5_fck", &gpio5_fck, CK_243X),
214 CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X),
215 CLK("mmci-omap-hs.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X),
216 CLK("mmci-omap-hs.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X),
217};
218
47/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */ 219/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
48#define EN_APLL_STOPPED 0 220#define EN_APLL_STOPPED 0
49#define EN_APLL_LOCKED 3 221#define EN_APLL_LOCKED 3
@@ -487,8 +659,8 @@ arch_initcall(omap2_clk_arch_init);
487int __init omap2_clk_init(void) 659int __init omap2_clk_init(void)
488{ 660{
489 struct prcm_config *prcm; 661 struct prcm_config *prcm;
490 struct clk **clkp; 662 struct omap_clk *c;
491 u32 clkrate; 663 u32 clkrate, cpu_mask;
492 664
493 if (cpu_is_omap242x()) 665 if (cpu_is_omap242x())
494 cpu_mask = RATE_IN_242X; 666 cpu_mask = RATE_IN_242X;
@@ -502,21 +674,18 @@ int __init omap2_clk_init(void)
502 omap2_sys_clk_recalc(&sys_ck); 674 omap2_sys_clk_recalc(&sys_ck);
503 propagate_rate(&sys_ck); 675 propagate_rate(&sys_ck);
504 676
505 for (clkp = onchip_24xx_clks; 677 cpu_mask = 0;
506 clkp < onchip_24xx_clks + ARRAY_SIZE(onchip_24xx_clks); 678 if (cpu_is_omap2420())
507 clkp++) { 679 cpu_mask |= CK_242X;
680 if (cpu_is_omap2430())
681 cpu_mask |= CK_243X;
508 682
509 if ((*clkp)->flags & CLOCK_IN_OMAP242X && cpu_is_omap2420()) { 683 for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++)
510 clk_register(*clkp); 684 if (c->cpu & cpu_mask) {
511 continue; 685 clkdev_add(&c->lk);
686 clk_register(c->lk.clk);
512 } 687 }
513 688
514 if ((*clkp)->flags & CLOCK_IN_OMAP243X && cpu_is_omap2430()) {
515 clk_register(*clkp);
516 continue;
517 }
518 }
519
520 /* Check the MPU rate set by bootloader */ 689 /* Check the MPU rate set by bootloader */
521 clkrate = omap2_get_dpll_rate_24xx(&dpll_ck); 690 clkrate = omap2_get_dpll_rate_24xx(&dpll_ck);
522 for (prcm = rate_table; prcm->mpu_speed; prcm++) { 691 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-16 10:03:34 -0500