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Diffstat (limited to 'arch/arm/mach-omap2/clock2430_data.c')
-rw-r--r--arch/arm/mach-omap2/clock2430_data.c31
1 files changed, 8 insertions, 23 deletions
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index df4cac5fef06..36dde2635acb 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -433,37 +433,23 @@ static struct clk dsp_fck = {
433 .recalc = &omap2_clksel_recalc, 433 .recalc = &omap2_clksel_recalc,
434}; 434};
435 435
436/* DSP interface clock */ 436static const struct clksel dsp_ick_clksel[] = {
437static const struct clksel_rate dsp_irate_ick_rates[] = { 437 { .parent = &dsp_fck, .rates = dsp_ick_rates },
438 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
439 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
440 { .div = 3, .val = 3, .flags = RATE_IN_243X },
441 { .div = 0 },
442};
443
444static const struct clksel dsp_irate_ick_clksel[] = {
445 { .parent = &dsp_fck, .rates = dsp_irate_ick_rates },
446 { .parent = NULL } 438 { .parent = NULL }
447}; 439};
448 440
449/* This clock does not exist as such in the TRM. */
450static struct clk dsp_irate_ick = {
451 .name = "dsp_irate_ick",
452 .ops = &clkops_null,
453 .parent = &dsp_fck,
454 .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
455 .clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK,
456 .clksel = dsp_irate_ick_clksel,
457 .recalc = &omap2_clksel_recalc,
458};
459
460/* 2430 only - EN_DSP controls both dsp fclk and iclk on 2430 */ 441/* 2430 only - EN_DSP controls both dsp fclk and iclk on 2430 */
461static struct clk iva2_1_ick = { 442static struct clk iva2_1_ick = {
462 .name = "iva2_1_ick", 443 .name = "iva2_1_ick",
463 .ops = &clkops_omap2_dflt_wait, 444 .ops = &clkops_omap2_dflt_wait,
464 .parent = &dsp_irate_ick, 445 .parent = &dsp_fck,
446 .clkdm_name = "dsp_clkdm",
465 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), 447 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
466 .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, 448 .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
449 .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
450 .clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK,
451 .clksel = dsp_ick_clksel,
452 .recalc = &omap2_clksel_recalc,
467}; 453};
468 454
469/* 455/*
@@ -1900,7 +1886,6 @@ static struct omap_clk omap2430_clks[] = {
1900 CLK(NULL, "mpu_ck", &mpu_ck, CK_243X), 1886 CLK(NULL, "mpu_ck", &mpu_ck, CK_243X),
1901 /* dsp domain clocks */ 1887 /* dsp domain clocks */
1902 CLK(NULL, "dsp_fck", &dsp_fck, CK_243X), 1888 CLK(NULL, "dsp_fck", &dsp_fck, CK_243X),
1903 CLK(NULL, "dsp_irate_ick", &dsp_irate_ick, CK_243X),
1904 CLK(NULL, "iva2_1_ick", &iva2_1_ick, CK_243X), 1889 CLK(NULL, "iva2_1_ick", &iva2_1_ick, CK_243X),
1905 /* GFX domain clocks */ 1890 /* GFX domain clocks */
1906 CLK(NULL, "gfx_3d_fck", &gfx_3d_fck, CK_243X), 1891 CLK(NULL, "gfx_3d_fck", &gfx_3d_fck, CK_243X),