1 files changed, 7 insertions, 21 deletions

diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index ff47a6c2611d..608874b651e8 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1,7 +1,7 @@
 /*
  * OMAP2420 clock data
  *
- * Copyright (C) 2005-2009 Texas Instruments, Inc.
+ * Copyright (C) 2005-2009, 2012 Texas Instruments, Inc.
  * Copyright (C) 2004-2011 Nokia Corporation
  *
  * Contacts:
@@ -23,7 +23,7 @@
 #include "clock.h"
 #include "clock2xxx.h"
 #include "opp2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
 #include "prm2xxx_3xxx.h"
 #include "prm-regbits-24xx.h"
 #include "cm-regbits-24xx.h"
@@ -124,6 +124,7 @@ static struct clk dpll_ck = {
         .name           = "dpll_ck",
         .ops            = &clkops_omap2xxx_dpll_ops,
         .parent         = &sys_ck,              /* Can be func_32k also */
+        .init           = &omap2xxx_clkt_dpllcore_init,
         .dpll_data      = &dpll_dd,
         .clkdm_name     = "wkup_clkdm",
         .recalc         = &omap2_dpllcore_recalc,
@@ -1924,12 +1925,9 @@ static struct omap_clk omap2420_clks[] = {
 
 int __init omap2420_clk_init(void)
 {
-        const struct prcm_config *prcm;
         struct omap_clk *c;
-        u32 clkrate;
 
         prcm_clksrc_ctrl = OMAP2420_PRCM_CLKSRC_CTRL;
-        cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST);
         cpu_mask = RATE_IN_242X;
         rate_table = omap2420_rate_table;
 
@@ -1949,20 +1947,13 @@ int __init omap2420_clk_init(void)
                 omap2_init_clk_clkdm(c->lk.clk);
         }
 
+        omap2xxx_clkt_vps_late_init();
+
         /* Disable autoidle on all clocks; let the PM code enable it later */
         omap_clk_disable_autoidle_all();
 
-        /* Check the MPU rate set by bootloader */
-        clkrate = omap2xxx_clk_get_core_rate(&dpll_ck);
-        for (prcm = rate_table; prcm->mpu_speed; prcm++) {
-                if (!(prcm->flags & cpu_mask))
-                        continue;
-                if (prcm->xtal_speed != sys_ck.rate)
-                        continue;
-                if (prcm->dpll_speed <= clkrate)
-                        break;
-        }
-        curr_prcm_set = prcm;
+        /* XXX Can this be done from the virt_prcm_set clk init function? */
+        omap2xxx_clkt_vps_check_bootloader_rates();
 
         recalculate_root_clocks();
 
@@ -1976,11 +1967,6 @@ int __init omap2420_clk_init(void)
          */
         clk_enable_init_clocks();
 
-        /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */
-        vclk = clk_get(NULL, "virt_prcm_set");
-        sclk = clk_get(NULL, "sys_ck");
-        dclk = clk_get(NULL, "dpll_ck");
-
         return 0;
 }