1 files changed, 46 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 93c48df3b5b1..ad8a1f7c1afc 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -47,7 +47,10 @@
 #define DPLL_LOW_POWER_BYPASS   0x5
 #define DPLL_LOCKED             0x7
-int omap2_clk_init(void);
+/* DPLL Type and DCO Selection Flags */
+#define DPLL_J_TYPE             0x1
+#define DPLL_NO_DCO_SEL         0x2
 int omap2_clk_enable(struct clk *clk);
 void omap2_clk_disable(struct clk *clk);
 long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
@@ -78,23 +81,53 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
                                u32 *new_div);
 u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val);
 u32 omap2_divisor_to_clksel(struct clk *clk, u32 div);
-unsigned long omap2_fixed_divisor_recalc(struct clk *clk);
 long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
 int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
+int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent);
 u32 omap2_get_dpll_rate(struct clk *clk);
 void omap2_init_dpll_parent(struct clk *clk);
 int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
-void omap2_clk_prepare_for_reboot(void);
+#ifdef CONFIG_ARCH_OMAP2
+void omap2xxx_clk_prepare_for_reboot(void);
+#else
+static inline void omap2xxx_clk_prepare_for_reboot(void)
+{
+}
+#endif
+#ifdef CONFIG_ARCH_OMAP3
+void omap3_clk_prepare_for_reboot(void);
+#else
+static inline void omap3_clk_prepare_for_reboot(void)
+{
+}
+#endif
+#ifdef CONFIG_ARCH_OMAP4
+void omap4_clk_prepare_for_reboot(void);
+#else
+static inline void omap4_clk_prepare_for_reboot(void)
+{
+}
+#endif
 int omap2_dflt_clk_enable(struct clk *clk);
 void omap2_dflt_clk_disable(struct clk *clk);
 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
                                   u8 *other_bit);
 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg,
-                                u8 *idlest_bit);
+                                u8 *idlest_bit, u8 *idlest_val);
+int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
+void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
+                               const char *core_ck_name,
+                               const char *mpu_ck_name);
 extern u8 cpu_mask;
 extern const struct clkops clkops_omap2_dflt_wait;
+extern const struct clkops clkops_dummy;
 extern const struct clkops clkops_omap2_dflt;
 extern struct clk_functions omap2_clk_functions;
@@ -104,5 +137,14 @@ extern const struct clksel_rate gpt_32k_rates[];
 extern const struct clksel_rate gpt_sys_rates[];
 extern const struct clksel_rate gfx_l3_rates[];
+#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
+extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
+extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
+#else
+#define omap2_clk_init_cpufreq_table    0
+#define omap2_clk_exit_cpufreq_table    0
+#endif
+extern const struct clkops clkops_omap3_noncore_dpll_ops;
 #endif

diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 93c48df3b5b1..ad8a1f7c1afc 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h
@@ -47,7 +47,10 @@
47	#define DPLL_LOW_POWER_BYPASS 0x5	47	#define DPLL_LOW_POWER_BYPASS 0x5
48	#define DPLL_LOCKED 0x7	48	#define DPLL_LOCKED 0x7
49		49
50	int omap2_clk_init(void);	50	/* DPLL Type and DCO Selection Flags */
		51	#define DPLL_J_TYPE 0x1
		52	#define DPLL_NO_DCO_SEL 0x2
		53
51	int omap2_clk_enable(struct clk *clk);	54	int omap2_clk_enable(struct clk *clk);
52	void omap2_clk_disable(struct clk *clk);	55	void omap2_clk_disable(struct clk *clk);
53	long omap2_clk_round_rate(struct clk *clk, unsigned long rate);	56	long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
@@ -78,23 +81,53 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
78	u32 *new_div);	81	u32 *new_div);
79	u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val);	82	u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val);
80	u32 omap2_divisor_to_clksel(struct clk *clk, u32 div);	83	u32 omap2_divisor_to_clksel(struct clk *clk, u32 div);
81	unsigned long omap2_fixed_divisor_recalc(struct clk *clk);
82	long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);	84	long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
83	int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);	85	int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
		86	int omap2_clksel_set_parent(struct clk clk, struct clk new_parent);
84	u32 omap2_get_dpll_rate(struct clk *clk);	87	u32 omap2_get_dpll_rate(struct clk *clk);
85	void omap2_init_dpll_parent(struct clk *clk);	88	void omap2_init_dpll_parent(struct clk *clk);
86	int omap2_wait_clock_ready(void __iomem reg, u32 cval, const char name);	89	int omap2_wait_clock_ready(void __iomem reg, u32 cval, const char name);
87	void omap2_clk_prepare_for_reboot(void);	90
		91
		92	#ifdef CONFIG_ARCH_OMAP2
		93	void omap2xxx_clk_prepare_for_reboot(void);
		94	#else
		95	static inline void omap2xxx_clk_prepare_for_reboot(void)
		96	{
		97	}
		98	#endif
		99
		100	#ifdef CONFIG_ARCH_OMAP3
		101	void omap3_clk_prepare_for_reboot(void);
		102	#else
		103	static inline void omap3_clk_prepare_for_reboot(void)
		104	{
		105	}
		106	#endif
		107
		108	#ifdef CONFIG_ARCH_OMAP4
		109	void omap4_clk_prepare_for_reboot(void);
		110	#else
		111	static inline void omap4_clk_prepare_for_reboot(void)
		112	{
		113	}
		114	#endif
		115
88	int omap2_dflt_clk_enable(struct clk *clk);	116	int omap2_dflt_clk_enable(struct clk *clk);
89	void omap2_dflt_clk_disable(struct clk *clk);	117	void omap2_dflt_clk_disable(struct clk *clk);
90	void omap2_clk_dflt_find_companion(struct clk clk, void __iomem *other_reg,	118	void omap2_clk_dflt_find_companion(struct clk clk, void __iomem *other_reg,
91	u8 *other_bit);	119	u8 *other_bit);
92	void omap2_clk_dflt_find_idlest(struct clk clk, void __iomem *idlest_reg,	120	void omap2_clk_dflt_find_idlest(struct clk clk, void __iomem *idlest_reg,
93	u8 *idlest_bit);	121	u8 idlest_bit, u8 idlest_val);
		122	int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
		123	void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
		124	const char *core_ck_name,
		125	const char *mpu_ck_name);
94		126
95	extern u8 cpu_mask;	127	extern u8 cpu_mask;
96		128
97	extern const struct clkops clkops_omap2_dflt_wait;	129	extern const struct clkops clkops_omap2_dflt_wait;
		130	extern const struct clkops clkops_dummy;
98	extern const struct clkops clkops_omap2_dflt;	131	extern const struct clkops clkops_omap2_dflt;
99		132
100	extern struct clk_functions omap2_clk_functions;	133	extern struct clk_functions omap2_clk_functions;
@@ -104,5 +137,14 @@ extern const struct clksel_rate gpt_32k_rates[];
104	extern const struct clksel_rate gpt_sys_rates[];	137	extern const struct clksel_rate gpt_sys_rates[];
105	extern const struct clksel_rate gfx_l3_rates[];	138	extern const struct clksel_rate gfx_l3_rates[];
106		139
		140	#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
		141	extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
		142	extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
		143	#else
		144	#define omap2_clk_init_cpufreq_table 0
		145	#define omap2_clk_exit_cpufreq_table 0
		146	#endif
		147
		148	extern const struct clkops clkops_omap3_noncore_dpll_ops;
107		149
108	#endif	150	#endif