diff options
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
| -rw-r--r-- | arch/arm/mach-omap2/clock.c | 28 |
1 files changed, 19 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 2a2f15213add..46d03ccc2806 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
| @@ -261,10 +261,11 @@ void omap2_clk_disable(struct clk *clk) | |||
| 261 | 261 | ||
| 262 | pr_debug("clock: %s: disabling in hardware\n", clk->name); | 262 | pr_debug("clock: %s: disabling in hardware\n", clk->name); |
| 263 | 263 | ||
| 264 | clk->ops->disable(clk); | 264 | if (clk->ops && clk->ops->disable) |
| 265 | clk->ops->disable(clk); | ||
| 265 | 266 | ||
| 266 | if (clk->clkdm) | 267 | if (clk->clkdm) |
| 267 | omap2_clkdm_clk_disable(clk->clkdm, clk); | 268 | clkdm_clk_disable(clk->clkdm, clk); |
| 268 | 269 | ||
| 269 | if (clk->parent) | 270 | if (clk->parent) |
| 270 | omap2_clk_disable(clk->parent); | 271 | omap2_clk_disable(clk->parent); |
| @@ -304,7 +305,7 @@ int omap2_clk_enable(struct clk *clk) | |||
| 304 | } | 305 | } |
| 305 | 306 | ||
| 306 | if (clk->clkdm) { | 307 | if (clk->clkdm) { |
| 307 | ret = omap2_clkdm_clk_enable(clk->clkdm, clk); | 308 | ret = clkdm_clk_enable(clk->clkdm, clk); |
| 308 | if (ret) { | 309 | if (ret) { |
| 309 | WARN(1, "clock: %s: could not enable clockdomain %s: " | 310 | WARN(1, "clock: %s: could not enable clockdomain %s: " |
| 310 | "%d\n", clk->name, clk->clkdm->name, ret); | 311 | "%d\n", clk->name, clk->clkdm->name, ret); |
| @@ -312,17 +313,20 @@ int omap2_clk_enable(struct clk *clk) | |||
| 312 | } | 313 | } |
| 313 | } | 314 | } |
| 314 | 315 | ||
| 315 | ret = clk->ops->enable(clk); | 316 | if (clk->ops && clk->ops->enable) { |
| 316 | if (ret) { | 317 | ret = clk->ops->enable(clk); |
| 317 | WARN(1, "clock: %s: could not enable: %d\n", clk->name, ret); | 318 | if (ret) { |
| 318 | goto oce_err3; | 319 | WARN(1, "clock: %s: could not enable: %d\n", |
| 320 | clk->name, ret); | ||
| 321 | goto oce_err3; | ||
| 322 | } | ||
| 319 | } | 323 | } |
| 320 | 324 | ||
| 321 | return 0; | 325 | return 0; |
| 322 | 326 | ||
| 323 | oce_err3: | 327 | oce_err3: |
| 324 | if (clk->clkdm) | 328 | if (clk->clkdm) |
| 325 | omap2_clkdm_clk_disable(clk->clkdm, clk); | 329 | clkdm_clk_disable(clk->clkdm, clk); |
| 326 | oce_err2: | 330 | oce_err2: |
| 327 | if (clk->parent) | 331 | if (clk->parent) |
| 328 | omap2_clk_disable(clk->parent); | 332 | omap2_clk_disable(clk->parent); |
| @@ -373,10 +377,16 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) | |||
| 373 | const struct clkops clkops_omap3_noncore_dpll_ops = { | 377 | const struct clkops clkops_omap3_noncore_dpll_ops = { |
| 374 | .enable = omap3_noncore_dpll_enable, | 378 | .enable = omap3_noncore_dpll_enable, |
| 375 | .disable = omap3_noncore_dpll_disable, | 379 | .disable = omap3_noncore_dpll_disable, |
| 380 | .allow_idle = omap3_dpll_allow_idle, | ||
| 381 | .deny_idle = omap3_dpll_deny_idle, | ||
| 376 | }; | 382 | }; |
| 377 | 383 | ||
| 378 | #endif | 384 | const struct clkops clkops_omap3_core_dpll_ops = { |
| 385 | .allow_idle = omap3_dpll_allow_idle, | ||
| 386 | .deny_idle = omap3_dpll_deny_idle, | ||
| 387 | }; | ||
| 379 | 388 | ||
| 389 | #endif | ||
| 380 | 390 | ||
| 381 | /* | 391 | /* |
| 382 | * OMAP2+ clock reset and init functions | 392 | * OMAP2+ clock reset and init functions |
