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Diffstat (limited to 'arch/arm/mach-omap2/cclock44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/cclock44xx_data.c517
1 files changed, 259 insertions, 258 deletions
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index 0c6834ae1fc4..88e37a474334 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -1424,284 +1424,285 @@ DEFINE_CLK_MUX(auxclkreq5_ck, auxclkreq_ck_parents, NULL, 0x0,
1424 0x0, NULL); 1424 0x0, NULL);
1425 1425
1426/* 1426/*
1427 * clkdev 1427 * clocks specific to omap4460
1428 */ 1428 */
1429static struct omap_clk omap446x_clks[] = {
1430 CLK(NULL, "div_ts_ck", &div_ts_ck),
1431 CLK(NULL, "bandgap_ts_fclk", &bandgap_ts_fclk),
1432};
1433
1434/*
1435 * clocks specific to omap4430
1436 */
1437static struct omap_clk omap443x_clks[] = {
1438 CLK(NULL, "bandgap_fclk", &bandgap_fclk),
1439};
1429 1440
1441/*
1442 * clocks common to omap44xx
1443 */
1430static struct omap_clk omap44xx_clks[] = { 1444static struct omap_clk omap44xx_clks[] = {
1431 CLK(NULL, "extalt_clkin_ck", &extalt_clkin_ck, CK_443X), 1445 CLK(NULL, "extalt_clkin_ck", &extalt_clkin_ck),
1432 CLK(NULL, "pad_clks_src_ck", &pad_clks_src_ck, CK_443X), 1446 CLK(NULL, "pad_clks_src_ck", &pad_clks_src_ck),
1433 CLK(NULL, "pad_clks_ck", &pad_clks_ck, CK_443X), 1447 CLK(NULL, "pad_clks_ck", &pad_clks_ck),
1434 CLK(NULL, "pad_slimbus_core_clks_ck", &pad_slimbus_core_clks_ck, CK_443X), 1448 CLK(NULL, "pad_slimbus_core_clks_ck", &pad_slimbus_core_clks_ck),
1435 CLK(NULL, "secure_32k_clk_src_ck", &secure_32k_clk_src_ck, CK_443X), 1449 CLK(NULL, "secure_32k_clk_src_ck", &secure_32k_clk_src_ck),
1436 CLK(NULL, "slimbus_src_clk", &slimbus_src_clk, CK_443X), 1450 CLK(NULL, "slimbus_src_clk", &slimbus_src_clk),
1437 CLK(NULL, "slimbus_clk", &slimbus_clk, CK_443X), 1451 CLK(NULL, "slimbus_clk", &slimbus_clk),
1438 CLK(NULL, "sys_32k_ck", &sys_32k_ck, CK_443X), 1452 CLK(NULL, "sys_32k_ck", &sys_32k_ck),
1439 CLK(NULL, "virt_12000000_ck", &virt_12000000_ck, CK_443X), 1453 CLK(NULL, "virt_12000000_ck", &virt_12000000_ck),
1440 CLK(NULL, "virt_13000000_ck", &virt_13000000_ck, CK_443X), 1454 CLK(NULL, "virt_13000000_ck", &virt_13000000_ck),
1441 CLK(NULL, "virt_16800000_ck", &virt_16800000_ck, CK_443X), 1455 CLK(NULL, "virt_16800000_ck", &virt_16800000_ck),
1442 CLK(NULL, "virt_19200000_ck", &virt_19200000_ck, CK_443X), 1456 CLK(NULL, "virt_19200000_ck", &virt_19200000_ck),
1443 CLK(NULL, "virt_26000000_ck", &virt_26000000_ck, CK_443X), 1457 CLK(NULL, "virt_26000000_ck", &virt_26000000_ck),
1444 CLK(NULL, "virt_27000000_ck", &virt_27000000_ck, CK_443X), 1458 CLK(NULL, "virt_27000000_ck", &virt_27000000_ck),
1445 CLK(NULL, "virt_38400000_ck", &virt_38400000_ck, CK_443X), 1459 CLK(NULL, "virt_38400000_ck", &virt_38400000_ck),
1446 CLK(NULL, "sys_clkin_ck", &sys_clkin_ck, CK_443X), 1460 CLK(NULL, "sys_clkin_ck", &sys_clkin_ck),
1447 CLK(NULL, "tie_low_clock_ck", &tie_low_clock_ck, CK_443X), 1461 CLK(NULL, "tie_low_clock_ck", &tie_low_clock_ck),
1448 CLK(NULL, "utmi_phy_clkout_ck", &utmi_phy_clkout_ck, CK_443X), 1462 CLK(NULL, "utmi_phy_clkout_ck", &utmi_phy_clkout_ck),
1449 CLK(NULL, "xclk60mhsp1_ck", &xclk60mhsp1_ck, CK_443X), 1463 CLK(NULL, "xclk60mhsp1_ck", &xclk60mhsp1_ck),
1450 CLK(NULL, "xclk60mhsp2_ck", &xclk60mhsp2_ck, CK_443X), 1464 CLK(NULL, "xclk60mhsp2_ck", &xclk60mhsp2_ck),
1451 CLK(NULL, "xclk60motg_ck", &xclk60motg_ck, CK_443X), 1465 CLK(NULL, "xclk60motg_ck", &xclk60motg_ck),
1452 CLK(NULL, "abe_dpll_bypass_clk_mux_ck", &abe_dpll_bypass_clk_mux_ck, CK_443X), 1466 CLK(NULL, "abe_dpll_bypass_clk_mux_ck", &abe_dpll_bypass_clk_mux_ck),
1453 CLK(NULL, "abe_dpll_refclk_mux_ck", &abe_dpll_refclk_mux_ck, CK_443X), 1467 CLK(NULL, "abe_dpll_refclk_mux_ck", &abe_dpll_refclk_mux_ck),
1454 CLK(NULL, "dpll_abe_ck", &dpll_abe_ck, CK_443X), 1468 CLK(NULL, "dpll_abe_ck", &dpll_abe_ck),
1455 CLK(NULL, "dpll_abe_x2_ck", &dpll_abe_x2_ck, CK_443X), 1469 CLK(NULL, "dpll_abe_x2_ck", &dpll_abe_x2_ck),
1456 CLK(NULL, "dpll_abe_m2x2_ck", &dpll_abe_m2x2_ck, CK_443X), 1470 CLK(NULL, "dpll_abe_m2x2_ck", &dpll_abe_m2x2_ck),
1457 CLK(NULL, "abe_24m_fclk", &abe_24m_fclk, CK_443X), 1471 CLK(NULL, "abe_24m_fclk", &abe_24m_fclk),
1458 CLK(NULL, "abe_clk", &abe_clk, CK_443X), 1472 CLK(NULL, "abe_clk", &abe_clk),
1459 CLK(NULL, "aess_fclk", &aess_fclk, CK_443X), 1473 CLK(NULL, "aess_fclk", &aess_fclk),
1460 CLK(NULL, "dpll_abe_m3x2_ck", &dpll_abe_m3x2_ck, CK_443X), 1474 CLK(NULL, "dpll_abe_m3x2_ck", &dpll_abe_m3x2_ck),
1461 CLK(NULL, "core_hsd_byp_clk_mux_ck", &core_hsd_byp_clk_mux_ck, CK_443X), 1475 CLK(NULL, "core_hsd_byp_clk_mux_ck", &core_hsd_byp_clk_mux_ck),
1462 CLK(NULL, "dpll_core_ck", &dpll_core_ck, CK_443X), 1476 CLK(NULL, "dpll_core_ck", &dpll_core_ck),
1463 CLK(NULL, "dpll_core_x2_ck", &dpll_core_x2_ck, CK_443X), 1477 CLK(NULL, "dpll_core_x2_ck", &dpll_core_x2_ck),
1464 CLK(NULL, "dpll_core_m6x2_ck", &dpll_core_m6x2_ck, CK_443X), 1478 CLK(NULL, "dpll_core_m6x2_ck", &dpll_core_m6x2_ck),
1465 CLK(NULL, "dbgclk_mux_ck", &dbgclk_mux_ck, CK_443X), 1479 CLK(NULL, "dbgclk_mux_ck", &dbgclk_mux_ck),
1466 CLK(NULL, "dpll_core_m2_ck", &dpll_core_m2_ck, CK_443X), 1480 CLK(NULL, "dpll_core_m2_ck", &dpll_core_m2_ck),
1467 CLK(NULL, "ddrphy_ck", &ddrphy_ck, CK_443X), 1481 CLK(NULL, "ddrphy_ck", &ddrphy_ck),
1468 CLK(NULL, "dpll_core_m5x2_ck", &dpll_core_m5x2_ck, CK_443X), 1482 CLK(NULL, "dpll_core_m5x2_ck", &dpll_core_m5x2_ck),
1469 CLK(NULL, "div_core_ck", &div_core_ck, CK_443X), 1483 CLK(NULL, "div_core_ck", &div_core_ck),
1470 CLK(NULL, "div_iva_hs_clk", &div_iva_hs_clk, CK_443X), 1484 CLK(NULL, "div_iva_hs_clk", &div_iva_hs_clk),
1471 CLK(NULL, "div_mpu_hs_clk", &div_mpu_hs_clk, CK_443X), 1485 CLK(NULL, "div_mpu_hs_clk", &div_mpu_hs_clk),
1472 CLK(NULL, "dpll_core_m4x2_ck", &dpll_core_m4x2_ck, CK_443X), 1486 CLK(NULL, "dpll_core_m4x2_ck", &dpll_core_m4x2_ck),
1473 CLK(NULL, "dll_clk_div_ck", &dll_clk_div_ck, CK_443X), 1487 CLK(NULL, "dll_clk_div_ck", &dll_clk_div_ck),
1474 CLK(NULL, "dpll_abe_m2_ck", &dpll_abe_m2_ck, CK_443X), 1488 CLK(NULL, "dpll_abe_m2_ck", &dpll_abe_m2_ck),
1475 CLK(NULL, "dpll_core_m3x2_ck", &dpll_core_m3x2_ck, CK_443X), 1489 CLK(NULL, "dpll_core_m3x2_ck", &dpll_core_m3x2_ck),
1476 CLK(NULL, "dpll_core_m7x2_ck", &dpll_core_m7x2_ck, CK_443X), 1490 CLK(NULL, "dpll_core_m7x2_ck", &dpll_core_m7x2_ck),
1477 CLK(NULL, "iva_hsd_byp_clk_mux_ck", &iva_hsd_byp_clk_mux_ck, CK_443X), 1491 CLK(NULL, "iva_hsd_byp_clk_mux_ck", &iva_hsd_byp_clk_mux_ck),
1478 CLK(NULL, "dpll_iva_ck", &dpll_iva_ck, CK_443X), 1492 CLK(NULL, "dpll_iva_ck", &dpll_iva_ck),
1479 CLK(NULL, "dpll_iva_x2_ck", &dpll_iva_x2_ck, CK_443X), 1493 CLK(NULL, "dpll_iva_x2_ck", &dpll_iva_x2_ck),
1480 CLK(NULL, "dpll_iva_m4x2_ck", &dpll_iva_m4x2_ck, CK_443X), 1494 CLK(NULL, "dpll_iva_m4x2_ck", &dpll_iva_m4x2_ck),
1481 CLK(NULL, "dpll_iva_m5x2_ck", &dpll_iva_m5x2_ck, CK_443X), 1495 CLK(NULL, "dpll_iva_m5x2_ck", &dpll_iva_m5x2_ck),
1482 CLK(NULL, "dpll_mpu_ck", &dpll_mpu_ck, CK_443X), 1496 CLK(NULL, "dpll_mpu_ck", &dpll_mpu_ck),
1483 CLK(NULL, "dpll_mpu_m2_ck", &dpll_mpu_m2_ck, CK_443X), 1497 CLK(NULL, "dpll_mpu_m2_ck", &dpll_mpu_m2_ck),
1484 CLK(NULL, "per_hs_clk_div_ck", &per_hs_clk_div_ck, CK_443X), 1498 CLK(NULL, "per_hs_clk_div_ck", &per_hs_clk_div_ck),
1485 CLK(NULL, "per_hsd_byp_clk_mux_ck", &per_hsd_byp_clk_mux_ck, CK_443X), 1499 CLK(NULL, "per_hsd_byp_clk_mux_ck", &per_hsd_byp_clk_mux_ck),
1486 CLK(NULL, "dpll_per_ck", &dpll_per_ck, CK_443X), 1500 CLK(NULL, "dpll_per_ck", &dpll_per_ck),
1487 CLK(NULL, "dpll_per_m2_ck", &dpll_per_m2_ck, CK_443X), 1501 CLK(NULL, "dpll_per_m2_ck", &dpll_per_m2_ck),
1488 CLK(NULL, "dpll_per_x2_ck", &dpll_per_x2_ck, CK_443X), 1502 CLK(NULL, "dpll_per_x2_ck", &dpll_per_x2_ck),
1489 CLK(NULL, "dpll_per_m2x2_ck", &dpll_per_m2x2_ck, CK_443X), 1503 CLK(NULL, "dpll_per_m2x2_ck", &dpll_per_m2x2_ck),
1490 CLK(NULL, "dpll_per_m3x2_ck", &dpll_per_m3x2_ck, CK_443X), 1504 CLK(NULL, "dpll_per_m3x2_ck", &dpll_per_m3x2_ck),
1491 CLK(NULL, "dpll_per_m4x2_ck", &dpll_per_m4x2_ck, CK_443X), 1505 CLK(NULL, "dpll_per_m4x2_ck", &dpll_per_m4x2_ck),
1492 CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X), 1506 CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck),
1493 CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X), 1507 CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck),
1494 CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X), 1508 CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck),
1495 CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X), 1509 CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck),
1496 CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X), 1510 CLK(NULL, "dpll_usb_ck", &dpll_usb_ck),
1497 CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X), 1511 CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck),
1498 CLK(NULL, "dpll_usb_m2_ck", &dpll_usb_m2_ck, CK_443X), 1512 CLK(NULL, "dpll_usb_m2_ck", &dpll_usb_m2_ck),
1499 CLK(NULL, "ducati_clk_mux_ck", &ducati_clk_mux_ck, CK_443X), 1513 CLK(NULL, "ducati_clk_mux_ck", &ducati_clk_mux_ck),
1500 CLK(NULL, "func_12m_fclk", &func_12m_fclk, CK_443X), 1514 CLK(NULL, "func_12m_fclk", &func_12m_fclk),
1501 CLK(NULL, "func_24m_clk", &func_24m_clk, CK_443X), 1515 CLK(NULL, "func_24m_clk", &func_24m_clk),
1502 CLK(NULL, "func_24mc_fclk", &func_24mc_fclk, CK_443X), 1516 CLK(NULL, "func_24mc_fclk", &func_24mc_fclk),
1503 CLK(NULL, "func_48m_fclk", &func_48m_fclk, CK_443X), 1517 CLK(NULL, "func_48m_fclk", &func_48m_fclk),
1504 CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X), 1518 CLK(NULL, "func_48mc_fclk", &func_48mc_fclk),
1505 CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X), 1519 CLK(NULL, "func_64m_fclk", &func_64m_fclk),
1506 CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X), 1520 CLK(NULL, "func_96m_fclk", &func_96m_fclk),
1507 CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X), 1521 CLK(NULL, "init_60m_fclk", &init_60m_fclk),
1508 CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X), 1522 CLK(NULL, "l3_div_ck", &l3_div_ck),
1509 CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X), 1523 CLK(NULL, "l4_div_ck", &l4_div_ck),
1510 CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X), 1524 CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck),
1511 CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X), 1525 CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck),
1512 CLK("smp_twd", NULL, &mpu_periphclk, CK_443X), 1526 CLK("smp_twd", NULL, &mpu_periphclk),
1513 CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X), 1527 CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk),
1514 CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X), 1528 CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk),
1515 CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), 1529 CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk),
1516 CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X), 1530 CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck),
1517 CLK(NULL, "aes1_fck", &aes1_fck, CK_443X), 1531 CLK(NULL, "aes1_fck", &aes1_fck),
1518 CLK(NULL, "aes2_fck", &aes2_fck, CK_443X), 1532 CLK(NULL, "aes2_fck", &aes2_fck),
1519 CLK(NULL, "bandgap_fclk", &bandgap_fclk, CK_443X), 1533 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck),
1520 CLK(NULL, "div_ts_ck", &div_ts_ck, CK_446X), 1534 CLK(NULL, "func_dmic_abe_gfclk", &func_dmic_abe_gfclk),
1521 CLK(NULL, "bandgap_ts_fclk", &bandgap_ts_fclk, CK_446X), 1535 CLK(NULL, "dss_sys_clk", &dss_sys_clk),
1522 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), 1536 CLK(NULL, "dss_tv_clk", &dss_tv_clk),
1523 CLK(NULL, "func_dmic_abe_gfclk", &func_dmic_abe_gfclk, CK_443X), 1537 CLK(NULL, "dss_dss_clk", &dss_dss_clk),
1524 CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), 1538 CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk),
1525 CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), 1539 CLK(NULL, "dss_fck", &dss_fck),
1526 CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), 1540 CLK("omapdss_dss", "ick", &dss_fck),
1527 CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), 1541 CLK(NULL, "fdif_fck", &fdif_fck),
1528 CLK(NULL, "dss_fck", &dss_fck, CK_443X), 1542 CLK(NULL, "gpio1_dbclk", &gpio1_dbclk),
1529 CLK("omapdss_dss", "ick", &dss_fck, CK_443X), 1543 CLK(NULL, "gpio2_dbclk", &gpio2_dbclk),
1530 CLK(NULL, "fdif_fck", &fdif_fck, CK_443X), 1544 CLK(NULL, "gpio3_dbclk", &gpio3_dbclk),
1531 CLK(NULL, "gpio1_dbclk", &gpio1_dbclk, CK_443X), 1545 CLK(NULL, "gpio4_dbclk", &gpio4_dbclk),
1532 CLK(NULL, "gpio2_dbclk", &gpio2_dbclk, CK_443X), 1546 CLK(NULL, "gpio5_dbclk", &gpio5_dbclk),
1533 CLK(NULL, "gpio3_dbclk", &gpio3_dbclk, CK_443X), 1547 CLK(NULL, "gpio6_dbclk", &gpio6_dbclk),
1534 CLK(NULL, "gpio4_dbclk", &gpio4_dbclk, CK_443X), 1548 CLK(NULL, "sgx_clk_mux", &sgx_clk_mux),
1535 CLK(NULL, "gpio5_dbclk", &gpio5_dbclk, CK_443X), 1549 CLK(NULL, "hsi_fck", &hsi_fck),
1536 CLK(NULL, "gpio6_dbclk", &gpio6_dbclk, CK_443X), 1550 CLK(NULL, "iss_ctrlclk", &iss_ctrlclk),
1537 CLK(NULL, "sgx_clk_mux", &sgx_clk_mux, CK_443X), 1551 CLK(NULL, "mcasp_sync_mux_ck", &mcasp_sync_mux_ck),
1538 CLK(NULL, "hsi_fck", &hsi_fck, CK_443X), 1552 CLK(NULL, "func_mcasp_abe_gfclk", &func_mcasp_abe_gfclk),
1539 CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X), 1553 CLK(NULL, "mcbsp1_sync_mux_ck", &mcbsp1_sync_mux_ck),
1540 CLK(NULL, "mcasp_sync_mux_ck", &mcasp_sync_mux_ck, CK_443X), 1554 CLK(NULL, "func_mcbsp1_gfclk", &func_mcbsp1_gfclk),
1541 CLK(NULL, "func_mcasp_abe_gfclk", &func_mcasp_abe_gfclk, CK_443X), 1555 CLK(NULL, "mcbsp2_sync_mux_ck", &mcbsp2_sync_mux_ck),
1542 CLK(NULL, "mcbsp1_sync_mux_ck", &mcbsp1_sync_mux_ck, CK_443X), 1556 CLK(NULL, "func_mcbsp2_gfclk", &func_mcbsp2_gfclk),
1543 CLK(NULL, "func_mcbsp1_gfclk", &func_mcbsp1_gfclk, CK_443X), 1557 CLK(NULL, "mcbsp3_sync_mux_ck", &mcbsp3_sync_mux_ck),
1544 CLK(NULL, "mcbsp2_sync_mux_ck", &mcbsp2_sync_mux_ck, CK_443X), 1558 CLK(NULL, "func_mcbsp3_gfclk", &func_mcbsp3_gfclk),
1545 CLK(NULL, "func_mcbsp2_gfclk", &func_mcbsp2_gfclk, CK_443X), 1559 CLK(NULL, "mcbsp4_sync_mux_ck", &mcbsp4_sync_mux_ck),
1546 CLK(NULL, "mcbsp3_sync_mux_ck", &mcbsp3_sync_mux_ck, CK_443X), 1560 CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk),
1547 CLK(NULL, "func_mcbsp3_gfclk", &func_mcbsp3_gfclk, CK_443X), 1561 CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk),
1548 CLK(NULL, "mcbsp4_sync_mux_ck", &mcbsp4_sync_mux_ck, CK_443X), 1562 CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk),
1549 CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk, CK_443X), 1563 CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m),
1550 CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk, CK_443X), 1564 CLK(NULL, "sha2md5_fck", &sha2md5_fck),
1551 CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk, CK_443X), 1565 CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1),
1552 CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X), 1566 CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0),
1553 CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X), 1567 CLK(NULL, "slimbus1_fclk_2", &slimbus1_fclk_2),
1554 CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X), 1568 CLK(NULL, "slimbus1_slimbus_clk", &slimbus1_slimbus_clk),
1555 CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X), 1569 CLK(NULL, "slimbus2_fclk_1", &slimbus2_fclk_1),
1556 CLK(NULL, "slimbus1_fclk_2", &slimbus1_fclk_2, CK_443X), 1570 CLK(NULL, "slimbus2_fclk_0", &slimbus2_fclk_0),
1557 CLK(NULL, "slimbus1_slimbus_clk", &slimbus1_slimbus_clk, CK_443X), 1571 CLK(NULL, "slimbus2_slimbus_clk", &slimbus2_slimbus_clk),
1558 CLK(NULL, "slimbus2_fclk_1", &slimbus2_fclk_1, CK_443X), 1572 CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck),
1559 CLK(NULL, "slimbus2_fclk_0", &slimbus2_fclk_0, CK_443X), 1573 CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck),
1560 CLK(NULL, "slimbus2_slimbus_clk", &slimbus2_slimbus_clk, CK_443X), 1574 CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck),
1561 CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_443X), 1575 CLK(NULL, "dmt1_clk_mux", &dmt1_clk_mux),
1562 CLK(NULL, "smartreflex_iva_fck", &smartreflex_iva_fck, CK_443X), 1576 CLK(NULL, "cm2_dm10_mux", &cm2_dm10_mux),
1563 CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_443X), 1577 CLK(NULL, "cm2_dm11_mux", &cm2_dm11_mux),
1564 CLK(NULL, "dmt1_clk_mux", &dmt1_clk_mux, CK_443X), 1578 CLK(NULL, "cm2_dm2_mux", &cm2_dm2_mux),
1565 CLK(NULL, "cm2_dm10_mux", &cm2_dm10_mux, CK_443X), 1579 CLK(NULL, "cm2_dm3_mux", &cm2_dm3_mux),
1566 CLK(NULL, "cm2_dm11_mux", &cm2_dm11_mux, CK_443X), 1580 CLK(NULL, "cm2_dm4_mux", &cm2_dm4_mux),
1567 CLK(NULL, "cm2_dm2_mux", &cm2_dm2_mux, CK_443X), 1581 CLK(NULL, "timer5_sync_mux", &timer5_sync_mux),
1568 CLK(NULL, "cm2_dm3_mux", &cm2_dm3_mux, CK_443X), 1582 CLK(NULL, "timer6_sync_mux", &timer6_sync_mux),
1569 CLK(NULL, "cm2_dm4_mux", &cm2_dm4_mux, CK_443X), 1583 CLK(NULL, "timer7_sync_mux", &timer7_sync_mux),
1570 CLK(NULL, "timer5_sync_mux", &timer5_sync_mux, CK_443X), 1584 CLK(NULL, "timer8_sync_mux", &timer8_sync_mux),
1571 CLK(NULL, "timer6_sync_mux", &timer6_sync_mux, CK_443X), 1585 CLK(NULL, "cm2_dm9_mux", &cm2_dm9_mux),
1572 CLK(NULL, "timer7_sync_mux", &timer7_sync_mux, CK_443X), 1586 CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck),
1573 CLK(NULL, "timer8_sync_mux", &timer8_sync_mux, CK_443X), 1587 CLK("usbhs_omap", "fs_fck", &usb_host_fs_fck),
1574 CLK(NULL, "cm2_dm9_mux", &cm2_dm9_mux, CK_443X), 1588 CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk),
1575 CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X), 1589 CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk),
1576 CLK("usbhs_omap", "fs_fck", &usb_host_fs_fck, CK_443X), 1590 CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk),
1577 CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), 1591 CLK(NULL, "usb_host_hs_utmi_p2_clk", &usb_host_hs_utmi_p2_clk),
1578 CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), 1592 CLK(NULL, "usb_host_hs_utmi_p3_clk", &usb_host_hs_utmi_p3_clk),
1579 CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X), 1593 CLK(NULL, "usb_host_hs_hsic480m_p1_clk", &usb_host_hs_hsic480m_p1_clk),
1580 CLK(NULL, "usb_host_hs_utmi_p2_clk", &usb_host_hs_utmi_p2_clk, CK_443X), 1594 CLK(NULL, "usb_host_hs_hsic60m_p1_clk", &usb_host_hs_hsic60m_p1_clk),
1581 CLK(NULL, "usb_host_hs_utmi_p3_clk", &usb_host_hs_utmi_p3_clk, CK_443X), 1595 CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk),
1582 CLK(NULL, "usb_host_hs_hsic480m_p1_clk", &usb_host_hs_hsic480m_p1_clk, CK_443X), 1596 CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk),
1583 CLK(NULL, "usb_host_hs_hsic60m_p1_clk", &usb_host_hs_hsic60m_p1_clk, CK_443X), 1597 CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk),
1584 CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), 1598 CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck),
1585 CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), 1599 CLK("usbhs_omap", "hs_fck", &usb_host_hs_fck),
1586 CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), 1600 CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk),
1587 CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X), 1601 CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk),
1588 CLK("usbhs_omap", "hs_fck", &usb_host_hs_fck, CK_443X), 1602 CLK(NULL, "usb_otg_hs_ick", &usb_otg_hs_ick),
1589 CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), 1603 CLK("musb-omap2430", "ick", &usb_otg_hs_ick),
1590 CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), 1604 CLK(NULL, "usb_phy_cm_clk32k", &usb_phy_cm_clk32k),
1591 CLK(NULL, "usb_otg_hs_ick", &usb_otg_hs_ick, CK_443X), 1605 CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk),
1592 CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), 1606 CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk),
1593 CLK(NULL, "usb_phy_cm_clk32k", &usb_phy_cm_clk32k, CK_443X), 1607 CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk),
1594 CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), 1608 CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick),
1595 CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), 1609 CLK("usbhs_omap", "usbtll_ick", &usb_tll_hs_ick),
1596 CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), 1610 CLK("usbhs_tll", "usbtll_ick", &usb_tll_hs_ick),
1597 CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X), 1611 CLK(NULL, "usim_ck", &usim_ck),
1598 CLK("usbhs_omap", "usbtll_ick", &usb_tll_hs_ick, CK_443X), 1612 CLK(NULL, "usim_fclk", &usim_fclk),
1599 CLK("usbhs_tll", "usbtll_ick", &usb_tll_hs_ick, CK_443X), 1613 CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck),
1600 CLK(NULL, "usim_ck", &usim_ck, CK_443X), 1614 CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck),
1601 CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), 1615 CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck),
1602 CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X), 1616 CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck),
1603 CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X), 1617 CLK(NULL, "auxclk0_src_ck", &auxclk0_src_ck),
1604 CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), 1618 CLK(NULL, "auxclk0_ck", &auxclk0_ck),
1605 CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), 1619 CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck),
1606 CLK(NULL, "auxclk0_src_ck", &auxclk0_src_ck, CK_443X), 1620 CLK(NULL, "auxclk1_src_ck", &auxclk1_src_ck),
1607 CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), 1621 CLK(NULL, "auxclk1_ck", &auxclk1_ck),
1608 CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), 1622 CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck),
1609 CLK(NULL, "auxclk1_src_ck", &auxclk1_src_ck, CK_443X), 1623 CLK(NULL, "auxclk2_src_ck", &auxclk2_src_ck),
1610 CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), 1624 CLK(NULL, "auxclk2_ck", &auxclk2_ck),
1611 CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), 1625 CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck),
1612 CLK(NULL, "auxclk2_src_ck", &auxclk2_src_ck, CK_443X), 1626 CLK(NULL, "auxclk3_src_ck", &auxclk3_src_ck),
1613 CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), 1627 CLK(NULL, "auxclk3_ck", &auxclk3_ck),
1614 CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), 1628 CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck),
1615 CLK(NULL, "auxclk3_src_ck", &auxclk3_src_ck, CK_443X), 1629 CLK(NULL, "auxclk4_src_ck", &auxclk4_src_ck),
1616 CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), 1630 CLK(NULL, "auxclk4_ck", &auxclk4_ck),
1617 CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), 1631 CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck),
1618 CLK(NULL, "auxclk4_src_ck", &auxclk4_src_ck, CK_443X), 1632 CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck),
1619 CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), 1633 CLK(NULL, "auxclk5_ck", &auxclk5_ck),
1620 CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), 1634 CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck),
1621 CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X), 1635 CLK("omap-gpmc", "fck", &dummy_ck),
1622 CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), 1636 CLK("omap_i2c.1", "ick", &dummy_ck),
1623 CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), 1637 CLK("omap_i2c.2", "ick", &dummy_ck),
1624 CLK("omap-gpmc", "fck", &dummy_ck, CK_443X), 1638 CLK("omap_i2c.3", "ick", &dummy_ck),
1625 CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X), 1639 CLK("omap_i2c.4", "ick", &dummy_ck),
1626 CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), 1640 CLK(NULL, "mailboxes_ick", &dummy_ck),
1627 CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), 1641 CLK("omap_hsmmc.0", "ick", &dummy_ck),
1628 CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X), 1642 CLK("omap_hsmmc.1", "ick", &dummy_ck),
1629 CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X), 1643 CLK("omap_hsmmc.2", "ick", &dummy_ck),
1630 CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X), 1644 CLK("omap_hsmmc.3", "ick", &dummy_ck),
1631 CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X), 1645 CLK("omap_hsmmc.4", "ick", &dummy_ck),
1632 CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X), 1646 CLK("omap-mcbsp.1", "ick", &dummy_ck),
1633 CLK("omap_hsmmc.3", "ick", &dummy_ck, CK_443X), 1647 CLK("omap-mcbsp.2", "ick", &dummy_ck),
1634 CLK("omap_hsmmc.4", "ick", &dummy_ck, CK_443X), 1648 CLK("omap-mcbsp.3", "ick", &dummy_ck),
1635 CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_443X), 1649 CLK("omap-mcbsp.4", "ick", &dummy_ck),
1636 CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_443X), 1650 CLK("omap2_mcspi.1", "ick", &dummy_ck),
1637 CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_443X), 1651 CLK("omap2_mcspi.2", "ick", &dummy_ck),
1638 CLK("omap-mcbsp.4", "ick", &dummy_ck, CK_443X), 1652 CLK("omap2_mcspi.3", "ick", &dummy_ck),
1639 CLK("omap2_mcspi.1", "ick", &dummy_ck, CK_443X), 1653 CLK("omap2_mcspi.4", "ick", &dummy_ck),
1640 CLK("omap2_mcspi.2", "ick", &dummy_ck, CK_443X), 1654 CLK(NULL, "uart1_ick", &dummy_ck),
1641 CLK("omap2_mcspi.3", "ick", &dummy_ck, CK_443X), 1655 CLK(NULL, "uart2_ick", &dummy_ck),
1642 CLK("omap2_mcspi.4", "ick", &dummy_ck, CK_443X), 1656 CLK(NULL, "uart3_ick", &dummy_ck),
1643 CLK(NULL, "uart1_ick", &dummy_ck, CK_443X), 1657 CLK(NULL, "uart4_ick", &dummy_ck),
1644 CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), 1658 CLK("usbhs_omap", "usbhost_ick", &dummy_ck),
1645 CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), 1659 CLK("usbhs_omap", "usbtll_fck", &dummy_ck),
1646 CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), 1660 CLK("usbhs_tll", "usbtll_fck", &dummy_ck),
1647 CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_443X), 1661 CLK("omap_wdt", "ick", &dummy_ck),
1648 CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_443X), 1662 CLK(NULL, "timer_32k_ck", &sys_32k_ck),
1649 CLK("usbhs_tll", "usbtll_fck", &dummy_ck, CK_443X),
1650 CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
1651 CLK(NULL, "timer_32k_ck", &sys_32k_ck, CK_443X),
1652 /* TODO: Remove "omap_timer.X" aliases once DT migration is complete */ 1663 /* TODO: Remove "omap_timer.X" aliases once DT migration is complete */
1653 CLK("omap_timer.1", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1664 CLK("omap_timer.1", "timer_sys_ck", &sys_clkin_ck),
1654 CLK("omap_timer.2", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1665 CLK("omap_timer.2", "timer_sys_ck", &sys_clkin_ck),
1655 CLK("omap_timer.3", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1666 CLK("omap_timer.3", "timer_sys_ck", &sys_clkin_ck),
1656 CLK("omap_timer.4", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1667 CLK("omap_timer.4", "timer_sys_ck", &sys_clkin_ck),
1657 CLK("omap_timer.9", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1668 CLK("omap_timer.9", "timer_sys_ck", &sys_clkin_ck),
1658 CLK("omap_timer.10", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1669 CLK("omap_timer.10", "timer_sys_ck", &sys_clkin_ck),
1659 CLK("omap_timer.11", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1670 CLK("omap_timer.11", "timer_sys_ck", &sys_clkin_ck),
1660 CLK("omap_timer.5", "timer_sys_ck", &syc_clk_div_ck, CK_443X), 1671 CLK("omap_timer.5", "timer_sys_ck", &syc_clk_div_ck),
1661 CLK("omap_timer.6", "timer_sys_ck", &syc_clk_div_ck, CK_443X), 1672 CLK("omap_timer.6", "timer_sys_ck", &syc_clk_div_ck),
1662 CLK("omap_timer.7", "timer_sys_ck", &syc_clk_div_ck, CK_443X), 1673 CLK("omap_timer.7", "timer_sys_ck", &syc_clk_div_ck),
1663 CLK("omap_timer.8", "timer_sys_ck", &syc_clk_div_ck, CK_443X), 1674 CLK("omap_timer.8", "timer_sys_ck", &syc_clk_div_ck),
1664 CLK("4a318000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1675 CLK("4a318000.timer", "timer_sys_ck", &sys_clkin_ck),
1665 CLK("48032000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1676 CLK("48032000.timer", "timer_sys_ck", &sys_clkin_ck),
1666 CLK("48034000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1677 CLK("48034000.timer", "timer_sys_ck", &sys_clkin_ck),
1667 CLK("48036000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1678 CLK("48036000.timer", "timer_sys_ck", &sys_clkin_ck),
1668 CLK("4803e000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1679 CLK("4803e000.timer", "timer_sys_ck", &sys_clkin_ck),
1669 CLK("48086000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1680 CLK("48086000.timer", "timer_sys_ck", &sys_clkin_ck),
1670 CLK("48088000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), 1681 CLK("48088000.timer", "timer_sys_ck", &sys_clkin_ck),
1671 CLK("40138000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), 1682 CLK("40138000.timer", "timer_sys_ck", &syc_clk_div_ck),
1672 CLK("4013a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), 1683 CLK("4013a000.timer", "timer_sys_ck", &syc_clk_div_ck),
1673 CLK("4013c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), 1684 CLK("4013c000.timer", "timer_sys_ck", &syc_clk_div_ck),
1674 CLK("4013e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), 1685 CLK("4013e000.timer", "timer_sys_ck", &syc_clk_div_ck),
1675 CLK(NULL, "cpufreq_ck", &dpll_mpu_ck, CK_443X), 1686 CLK(NULL, "cpufreq_ck", &dpll_mpu_ck),
1676}; 1687};
1677 1688
1678int __init omap4xxx_clk_init(void) 1689int __init omap4xxx_clk_init(void)
1679{ 1690{
1680 u32 cpu_clkflg;
1681 struct omap_clk *c;
1682 int rc; 1691 int rc;
1683 1692
1684 if (cpu_is_omap443x()) { 1693 if (cpu_is_omap443x()) {
1685 cpu_mask = RATE_IN_4430; 1694 cpu_mask = RATE_IN_4430;
1686 cpu_clkflg = CK_443X; 1695 omap_clocks_register(omap443x_clks, ARRAY_SIZE(omap443x_clks));
1687 } else if (cpu_is_omap446x() || cpu_is_omap447x()) { 1696 } else if (cpu_is_omap446x() || cpu_is_omap447x()) {
1688 cpu_mask = RATE_IN_4460 | RATE_IN_4430; 1697 cpu_mask = RATE_IN_4460 | RATE_IN_4430;
1689 cpu_clkflg = CK_446X | CK_443X; 1698 omap_clocks_register(omap446x_clks, ARRAY_SIZE(omap446x_clks));
1690
1691 if (cpu_is_omap447x()) 1699 if (cpu_is_omap447x())
1692 pr_warn("WARNING: OMAP4470 clock data incomplete!\n"); 1700 pr_warn("WARNING: OMAP4470 clock data incomplete!\n");
1693 } else { 1701 } else {
1694 return 0; 1702 return 0;
1695 } 1703 }
1696 1704
1697 for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks); 1705 omap_clocks_register(omap44xx_clks, ARRAY_SIZE(omap44xx_clks));
1698 c++) {
1699 if (c->cpu & cpu_clkflg) {
1700 clkdev_add(&c->lk);
1701 if (!__clk_init(NULL, c->lk.clk))
1702 omap2_init_clk_hw_omap_clocks(c->lk.clk);
1703 }
1704 }
1705 1706
1706 omap2_clk_disable_autoidle_all(); 1707 omap2_clk_disable_autoidle_all();
1707 1708
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 03:49:59 -0500