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Diffstat (limited to 'arch/arm/mach-omap2/cclock44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/cclock44xx_data.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index a1f0b55b78e3..7c1ffe61ec1b 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -365,6 +365,15 @@ static struct dpll_data dpll_iva_dd = {
365 365
366static struct clk dpll_iva_ck; 366static struct clk dpll_iva_ck;
367 367
368static const struct clk_ops dpll_ck_ops = {
369 .enable = &omap3_noncore_dpll_enable,
370 .disable = &omap3_noncore_dpll_disable,
371 .recalc_rate = &omap3_dpll_recalc,
372 .round_rate = &omap2_dpll_round_rate,
373 .set_rate = &omap3_noncore_dpll_set_rate,
374 .get_parent = &omap2_init_dpll_parent,
375};
376
368static struct clk_hw_omap dpll_iva_ck_hw = { 377static struct clk_hw_omap dpll_iva_ck_hw = {
369 .hw = { 378 .hw = {
370 .clk = &dpll_iva_ck, 379 .clk = &dpll_iva_ck,
@@ -373,7 +382,7 @@ static struct clk_hw_omap dpll_iva_ck_hw = {
373 .ops = &clkhwops_omap3_dpll, 382 .ops = &clkhwops_omap3_dpll,
374}; 383};
375 384
376DEFINE_STRUCT_CLK(dpll_iva_ck, dpll_core_ck_parents, dpll_abe_ck_ops); 385DEFINE_STRUCT_CLK(dpll_iva_ck, dpll_core_ck_parents, dpll_ck_ops);
377 386
378static const char *dpll_iva_x2_ck_parents[] = { 387static const char *dpll_iva_x2_ck_parents[] = {
379 "dpll_iva_ck", 388 "dpll_iva_ck",
@@ -426,7 +435,7 @@ static struct clk_hw_omap dpll_mpu_ck_hw = {
426 .ops = &clkhwops_omap3_dpll, 435 .ops = &clkhwops_omap3_dpll,
427}; 436};
428 437
429DEFINE_STRUCT_CLK(dpll_mpu_ck, dpll_core_ck_parents, dpll_abe_ck_ops); 438DEFINE_STRUCT_CLK(dpll_mpu_ck, dpll_core_ck_parents, dpll_ck_ops);
430 439
431DEFINE_CLK_FIXED_FACTOR(mpu_periphclk, "dpll_mpu_ck", &dpll_mpu_ck, 0x0, 1, 2); 440DEFINE_CLK_FIXED_FACTOR(mpu_periphclk, "dpll_mpu_ck", &dpll_mpu_ck, 0x0, 1, 2);
432 441
@@ -475,7 +484,7 @@ static struct clk_hw_omap dpll_per_ck_hw = {
475 .ops = &clkhwops_omap3_dpll, 484 .ops = &clkhwops_omap3_dpll,
476}; 485};
477 486
478DEFINE_STRUCT_CLK(dpll_per_ck, dpll_core_ck_parents, dpll_abe_ck_ops); 487DEFINE_STRUCT_CLK(dpll_per_ck, dpll_core_ck_parents, dpll_ck_ops);
479 488
480DEFINE_CLK_DIVIDER(dpll_per_m2_ck, "dpll_per_ck", &dpll_per_ck, 0x0, 489DEFINE_CLK_DIVIDER(dpll_per_m2_ck, "dpll_per_ck", &dpll_per_ck, 0x0,
481 OMAP4430_CM_DIV_M2_DPLL_PER, OMAP4430_DPLL_CLKOUT_DIV_SHIFT, 490 OMAP4430_CM_DIV_M2_DPLL_PER, OMAP4430_DPLL_CLKOUT_DIV_SHIFT,
@@ -569,7 +578,7 @@ static struct clk_hw_omap dpll_usb_ck_hw = {
569 .ops = &clkhwops_omap3_dpll, 578 .ops = &clkhwops_omap3_dpll,
570}; 579};
571 580
572DEFINE_STRUCT_CLK(dpll_usb_ck, dpll_core_ck_parents, dpll_abe_ck_ops); 581DEFINE_STRUCT_CLK(dpll_usb_ck, dpll_core_ck_parents, dpll_ck_ops);
573 582
574static const char *dpll_usb_clkdcoldo_ck_parents[] = { 583static const char *dpll_usb_clkdcoldo_ck_parents[] = {
575 "dpll_usb_ck", 584 "dpll_usb_ck",