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-rw-r--r--arch/arm/mach-omap1/id.c188
-rw-r--r--arch/arm/mach-omap1/io.c116
-rw-r--r--arch/arm/mach-omap1/serial.c200
3 files changed, 504 insertions, 0 deletions
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
new file mode 100644
index 000000000000..986c3b7e09bb
--- /dev/null
+++ b/arch/arm/mach-omap1/id.c
@@ -0,0 +1,188 @@
1/*
2 * linux/arch/arm/mach-omap1/id.c
3 *
4 * OMAP1 CPU identification code
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/config.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/io.h>
20
21struct omap_id {
22 u16 jtag_id; /* Used to determine OMAP type */
23 u8 die_rev; /* Processor revision */
24 u32 omap_id; /* OMAP revision */
25 u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */
26};
27
28/* Register values to detect the OMAP version */
29static struct omap_id omap_ids[] __initdata = {
30 { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
31 { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
32 { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
33 { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
34 { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
35 { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
36 { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
37 { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
38 { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
39 { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
40 { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
41 { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
42 { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
43 { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
44 { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
45 { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
46 { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
47 { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
48};
49
50/*
51 * Get OMAP type from PROD_ID.
52 * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
53 * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
54 * Undocumented register in TEST BLOCK is used as fallback; This seems to
55 * work on 1510, 1610 & 1710. The official way hopefully will work in future
56 * processors.
57 */
58static u16 __init omap_get_jtag_id(void)
59{
60 u32 prod_id, omap_id;
61
62 prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
63 omap_id = omap_readl(OMAP32_ID_1);
64
65 /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
66 if (((prod_id >> 20) == 0) || (prod_id == omap_id))
67 prod_id = 0;
68 else
69 prod_id &= 0xffff;
70
71 if (prod_id)
72 return prod_id;
73
74 /* Use OMAP32_ID_1 as fallback */
75 prod_id = ((omap_id >> 12) & 0xffff);
76
77 return prod_id;
78}
79
80/*
81 * Get OMAP revision from DIE_REV.
82 * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
83 * Undocumented register in the TEST BLOCK is used as fallback.
84 * REVISIT: This does not seem to work on 1510
85 */
86static u8 __init omap_get_die_rev(void)
87{
88 u32 die_rev;
89
90 die_rev = omap_readl(OMAP_DIE_ID_1);
91
92 /* Check for broken OMAP_DIE_ID on early 1710 */
93 if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
94 die_rev = 0;
95
96 die_rev = (die_rev >> 17) & 0xf;
97 if (die_rev)
98 return die_rev;
99
100 die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
101
102 return die_rev;
103}
104
105void __init omap_check_revision(void)
106{
107 int i;
108 u16 jtag_id;
109 u8 die_rev;
110 u32 omap_id;
111 u8 cpu_type;
112
113 jtag_id = omap_get_jtag_id();
114 die_rev = omap_get_die_rev();
115 omap_id = omap_readl(OMAP32_ID_0);
116
117#ifdef DEBUG
118 printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
119 printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
120 omap_readl(OMAP_DIE_ID_1),
121 (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
122 printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
123 printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
124 omap_readl(OMAP_PRODUCTION_ID_1),
125 omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
126 printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
127 printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
128 printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
129#endif
130
131 system_serial_high = omap_readl(OMAP_DIE_ID_0);
132 system_serial_low = omap_readl(OMAP_DIE_ID_1);
133
134 /* First check only the major version in a safe way */
135 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
136 if (jtag_id == (omap_ids[i].jtag_id)) {
137 system_rev = omap_ids[i].type;
138 break;
139 }
140 }
141
142 /* Check if we can find the die revision */
143 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
144 if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
145 system_rev = omap_ids[i].type;
146 break;
147 }
148 }
149
150 /* Finally check also the omap_id */
151 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
152 if (jtag_id == omap_ids[i].jtag_id
153 && die_rev == omap_ids[i].die_rev
154 && omap_id == omap_ids[i].omap_id) {
155 system_rev = omap_ids[i].type;
156 break;
157 }
158 }
159
160 /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
161 cpu_type = system_rev >> 24;
162
163 switch (cpu_type) {
164 case 0x07:
165 system_rev |= 0x07;
166 break;
167 case 0x15:
168 system_rev |= 0x15;
169 break;
170 case 0x16:
171 case 0x17:
172 system_rev |= 0x16;
173 break;
174 case 0x24:
175 system_rev |= 0x24;
176 break;
177 default:
178 printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
179 }
180
181 printk("OMAP%04x", system_rev >> 16);
182 if ((system_rev >> 8) & 0xff)
183 printk("%x", (system_rev >> 8) & 0xff);
184 printk(" revision %i handled as %02xxx id: %08x%08x\n",
185 die_rev, system_rev & 0xff, system_serial_low,
186 system_serial_high);
187}
188
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
new file mode 100644
index 000000000000..8587b339884f
--- /dev/null
+++ b/arch/arm/mach-omap1/io.c
@@ -0,0 +1,116 @@
1/*
2 * linux/arch/arm/mach-omap1/io.c
3 *
4 * OMAP1 I/O mapping code
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/config.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15
16#include <asm/mach/map.h>
17#include <asm/io.h>
18#include <asm/arch/tc.h>
19
20#include "../clock.h"
21
22extern void omap_check_revision(void);
23
24/*
25 * The machine specific code may provide the extra mapping besides the
26 * default mapping provided here.
27 */
28static struct map_desc omap_io_desc[] __initdata = {
29 { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
30};
31
32#ifdef CONFIG_ARCH_OMAP730
33static struct map_desc omap730_io_desc[] __initdata = {
34 { OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE },
35 { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE },
36 { OMAP730_SRAM_BASE, OMAP730_SRAM_START, OMAP730_SRAM_SIZE, MT_DEVICE }
37};
38#endif
39
40#ifdef CONFIG_ARCH_OMAP1510
41static struct map_desc omap1510_io_desc[] __initdata = {
42 { OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE },
43 { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE },
44 { OMAP1510_SRAM_BASE, OMAP1510_SRAM_START, OMAP1510_SRAM_SIZE, MT_DEVICE }
45};
46#endif
47
48#if defined(CONFIG_ARCH_OMAP16XX)
49static struct map_desc omap1610_io_desc[] __initdata = {
50 { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
51 { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
52 { OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP1610_SRAM_SIZE, MT_DEVICE }
53};
54
55static struct map_desc omap5912_io_desc[] __initdata = {
56 { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
57 { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
58/*
59 * The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page
60 * size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped.
61 * Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte
62 * can be used.
63 */
64 { OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP5912_SRAM_SIZE + 0x800, MT_DEVICE }
65};
66#endif
67
68static int initialized = 0;
69
70static void __init _omap_map_io(void)
71{
72 initialized = 1;
73
74 /* We have to initialize the IO space mapping before we can run
75 * cpu_is_omapxxx() macros. */
76 iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
77 omap_check_revision();
78
79#ifdef CONFIG_ARCH_OMAP730
80 if (cpu_is_omap730()) {
81 iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
82 }
83#endif
84#ifdef CONFIG_ARCH_OMAP1510
85 if (cpu_is_omap1510()) {
86 iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
87 }
88#endif
89#if defined(CONFIG_ARCH_OMAP16XX)
90 if (cpu_is_omap1610() || cpu_is_omap1710()) {
91 iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc));
92 }
93 if (cpu_is_omap5912()) {
94 iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc));
95 }
96#endif
97
98 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
99 * on a Posted Write in the TIPB Bridge".
100 */
101 omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
102 omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
103
104 /* Must init clocks early to assure that timer interrupt works
105 */
106 clk_init();
107}
108
109/*
110 * This should only get called from board specific init
111 */
112void omap_map_common_io(void)
113{
114 if (!initialized)
115 _omap_map_io();
116}
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
new file mode 100644
index 000000000000..214e5d17c8b5
--- /dev/null
+++ b/arch/arm/mach-omap1/serial.c
@@ -0,0 +1,200 @@
1/*
2 * linux/arch/arm/mach-omap1/id.c
3 *
4 * OMAP1 CPU identification code
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/config.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/serial.h>
17#include <linux/tty.h>
18#include <linux/serial_8250.h>
19#include <linux/serial_reg.h>
20
21#include <asm/io.h>
22#include <asm/mach-types.h>
23#include <asm/hardware/clock.h>
24
25#include <asm/arch/board.h>
26#include <asm/arch/mux.h>
27#include <asm/arch/fpga.h>
28
29static struct clk * uart1_ck = NULL;
30static struct clk * uart2_ck = NULL;
31static struct clk * uart3_ck = NULL;
32
33static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
34 int offset)
35{
36 offset <<= up->regshift;
37 return (unsigned int)__raw_readb(up->membase + offset);
38}
39
40static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
41 int value)
42{
43 offset <<= p->regshift;
44 __raw_writeb(value, p->membase + offset);
45}
46
47/*
48 * Internal UARTs need to be initialized for the 8250 autoconfig to work
49 * properly. Note that the TX watermark initialization may not be needed
50 * once the 8250.c watermark handling code is merged.
51 */
52static void __init omap_serial_reset(struct plat_serial8250_port *p)
53{
54 omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */
55 omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
56 omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
57
58 if (!cpu_is_omap1510()) {
59 omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
60 while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
61 }
62}
63
64static struct plat_serial8250_port serial_platform_data[] = {
65 {
66 .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE),
67 .mapbase = (unsigned long)OMAP_UART1_BASE,
68 .irq = INT_UART1,
69 .flags = UPF_BOOT_AUTOCONF,
70 .iotype = UPIO_MEM,
71 .regshift = 2,
72 .uartclk = OMAP16XX_BASE_BAUD * 16,
73 },
74 {
75 .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE),
76 .mapbase = (unsigned long)OMAP_UART2_BASE,
77 .irq = INT_UART2,
78 .flags = UPF_BOOT_AUTOCONF,
79 .iotype = UPIO_MEM,
80 .regshift = 2,
81 .uartclk = OMAP16XX_BASE_BAUD * 16,
82 },
83 {
84 .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE),
85 .mapbase = (unsigned long)OMAP_UART3_BASE,
86 .irq = INT_UART3,
87 .flags = UPF_BOOT_AUTOCONF,
88 .iotype = UPIO_MEM,
89 .regshift = 2,
90 .uartclk = OMAP16XX_BASE_BAUD * 16,
91 },
92 { },
93};
94
95static struct platform_device serial_device = {
96 .name = "serial8250",
97 .id = 0,
98 .dev = {
99 .platform_data = serial_platform_data,
100 },
101};
102
103/*
104 * Note that on Innovator-1510 UART2 pins conflict with USB2.
105 * By default UART2 does not work on Innovator-1510 if you have
106 * USB OHCI enabled. To use UART2, you must disable USB2 first.
107 */
108void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
109{
110 int i;
111
112 if (cpu_is_omap730()) {
113 serial_platform_data[0].regshift = 0;
114 serial_platform_data[1].regshift = 0;
115 serial_platform_data[0].irq = INT_730_UART_MODEM_1;
116 serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
117 }
118
119 if (cpu_is_omap1510()) {
120 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
121 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
122 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
123 }
124
125 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
126 unsigned char reg;
127
128 if (ports[i] == 0) {
129 serial_platform_data[i].membase = NULL;
130 serial_platform_data[i].mapbase = 0;
131 continue;
132 }
133
134 switch (i) {
135 case 0:
136 uart1_ck = clk_get(NULL, "uart1_ck");
137 if (IS_ERR(uart1_ck))
138 printk("Could not get uart1_ck\n");
139 else {
140 clk_use(uart1_ck);
141 if (cpu_is_omap1510())
142 clk_set_rate(uart1_ck, 12000000);
143 }
144 if (cpu_is_omap1510()) {
145 omap_cfg_reg(UART1_TX);
146 omap_cfg_reg(UART1_RTS);
147 if (machine_is_omap_innovator()) {
148 reg = fpga_read(OMAP1510_FPGA_POWER);
149 reg |= OMAP1510_FPGA_PCR_COM1_EN;
150 fpga_write(reg, OMAP1510_FPGA_POWER);
151 udelay(10);
152 }
153 }
154 break;
155 case 1:
156 uart2_ck = clk_get(NULL, "uart2_ck");
157 if (IS_ERR(uart2_ck))
158 printk("Could not get uart2_ck\n");
159 else {
160 clk_use(uart2_ck);
161 if (cpu_is_omap1510())
162 clk_set_rate(uart2_ck, 12000000);
163 else
164 clk_set_rate(uart2_ck, 48000000);
165 }
166 if (cpu_is_omap1510()) {
167 omap_cfg_reg(UART2_TX);
168 omap_cfg_reg(UART2_RTS);
169 if (machine_is_omap_innovator()) {
170 reg = fpga_read(OMAP1510_FPGA_POWER);
171 reg |= OMAP1510_FPGA_PCR_COM2_EN;
172 fpga_write(reg, OMAP1510_FPGA_POWER);
173 udelay(10);
174 }
175 }
176 break;
177 case 2:
178 uart3_ck = clk_get(NULL, "uart3_ck");
179 if (IS_ERR(uart3_ck))
180 printk("Could not get uart3_ck\n");
181 else {
182 clk_use(uart3_ck);
183 if (cpu_is_omap1510())
184 clk_set_rate(uart3_ck, 12000000);
185 }
186 if (cpu_is_omap1510()) {
187 omap_cfg_reg(UART3_TX);
188 omap_cfg_reg(UART3_RX);
189 }
190 break;
191 }
192 omap_serial_reset(&serial_platform_data[i]);
193 }
194}
195
196static int __init omap_init(void)
197{
198 return platform_device_register(&serial_device);
199}
200arch_initcall(omap_init);
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