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-rw-r--r--arch/arm/mach-omap1/Kconfig23
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c2
-rw-r--r--arch/arm/mach-omap1/board-fsample.c34
-rw-r--r--arch/arm/mach-omap1/board-generic.c5
-rw-r--r--arch/arm/mach-omap1/board-h2-mmc.c2
-rw-r--r--arch/arm/mach-omap1/board-h2.c7
-rw-r--r--arch/arm/mach-omap1/board-h2.h38
-rw-r--r--arch/arm/mach-omap1/board-h3-mmc.c2
-rw-r--r--arch/arm/mach-omap1/board-h3.c7
-rw-r--r--arch/arm/mach-omap1/board-h3.h35
-rw-r--r--arch/arm/mach-omap1/board-innovator.c8
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c9
-rw-r--r--arch/arm/mach-omap1/board-osk.c17
-rw-r--r--arch/arm/mach-omap1/board-palmte.c17
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c9
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c12
-rw-r--r--arch/arm/mach-omap1/board-sx1-mmc.c1
-rw-r--r--arch/arm/mach-omap1/board-sx1.c3
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c2
-rw-r--r--arch/arm/mach-omap1/clock.c407
-rw-r--r--arch/arm/mach-omap1/clock.h412
-rw-r--r--arch/arm/mach-omap1/devices.c2
-rw-r--r--arch/arm/mach-omap1/id.c4
-rw-r--r--arch/arm/mach-omap1/io.c23
-rw-r--r--arch/arm/mach-omap1/irq.c19
-rw-r--r--arch/arm/mach-omap1/mailbox.c29
-rw-r--r--arch/arm/mach-omap1/mcbsp.c52
-rw-r--r--arch/arm/mach-omap1/mux.c24
-rw-r--r--arch/arm/mach-omap1/serial.c7
29 files changed, 691 insertions, 521 deletions
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 10a301e32434..3f325d3718a9 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -7,6 +7,11 @@ config ARCH_OMAP730
7 select CPU_ARM926T 7 select CPU_ARM926T
8 select ARCH_OMAP_OTG 8 select ARCH_OMAP_OTG
9 9
10config ARCH_OMAP850
11 depends on ARCH_OMAP1
12 bool "OMAP850 Based System"
13 select CPU_ARM926T
14
10config ARCH_OMAP15XX 15config ARCH_OMAP15XX
11 depends on ARCH_OMAP1 16 depends on ARCH_OMAP1
12 default y 17 default y
@@ -46,6 +51,12 @@ config MACH_OMAP_H3
46 TI OMAP 1710 H3 board support. Say Y here if you have such 51 TI OMAP 1710 H3 board support. Say Y here if you have such
47 a board. 52 a board.
48 53
54config MACH_OMAP_HTCWIZARD
55 bool "HTC Wizard"
56 depends on ARCH_OMAP850
57 help
58 HTC Wizard smartphone support (AKA QTEK 9100, ...)
59
49config MACH_OMAP_OSK 60config MACH_OMAP_OSK
50 bool "TI OSK Support" 61 bool "TI OSK Support"
51 depends on ARCH_OMAP1 && ARCH_OMAP16XX 62 depends on ARCH_OMAP1 && ARCH_OMAP16XX
@@ -163,7 +174,7 @@ config OMAP_ARM_216MHZ
163 174
164config OMAP_ARM_195MHZ 175config OMAP_ARM_195MHZ
165 bool "OMAP ARM 195 MHz CPU" 176 bool "OMAP ARM 195 MHz CPU"
166 depends on ARCH_OMAP1 && ARCH_OMAP730 177 depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850)
167 help 178 help
168 Enable 195MHz clock for OMAP CPU. If unsure, say N. 179 Enable 195MHz clock for OMAP CPU. If unsure, say N.
169 180
@@ -175,13 +186,13 @@ config OMAP_ARM_192MHZ
175 186
176config OMAP_ARM_182MHZ 187config OMAP_ARM_182MHZ
177 bool "OMAP ARM 182 MHz CPU" 188 bool "OMAP ARM 182 MHz CPU"
178 depends on ARCH_OMAP1 && ARCH_OMAP730 189 depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850)
179 help 190 help
180 Enable 182MHz clock for OMAP CPU. If unsure, say N. 191 Enable 182MHz clock for OMAP CPU. If unsure, say N.
181 192
182config OMAP_ARM_168MHZ 193config OMAP_ARM_168MHZ
183 bool "OMAP ARM 168 MHz CPU" 194 bool "OMAP ARM 168 MHz CPU"
184 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730) 195 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
185 help 196 help
186 Enable 168MHz clock for OMAP CPU. If unsure, say N. 197 Enable 168MHz clock for OMAP CPU. If unsure, say N.
187 198
@@ -193,20 +204,20 @@ config OMAP_ARM_150MHZ
193 204
194config OMAP_ARM_120MHZ 205config OMAP_ARM_120MHZ
195 bool "OMAP ARM 120 MHz CPU" 206 bool "OMAP ARM 120 MHz CPU"
196 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730) 207 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
197 help 208 help
198 Enable 120MHz clock for OMAP CPU. If unsure, say N. 209 Enable 120MHz clock for OMAP CPU. If unsure, say N.
199 210
200config OMAP_ARM_60MHZ 211config OMAP_ARM_60MHZ
201 bool "OMAP ARM 60 MHz CPU" 212 bool "OMAP ARM 60 MHz CPU"
202 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730) 213 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
203 default y 214 default y
204 help 215 help
205 Enable 60MHz clock for OMAP CPU. If unsure, say Y. 216 Enable 60MHz clock for OMAP CPU. If unsure, say Y.
206 217
207config OMAP_ARM_30MHZ 218config OMAP_ARM_30MHZ
208 bool "OMAP ARM 30 MHz CPU" 219 bool "OMAP ARM 30 MHz CPU"
209 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730) 220 depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
210 help 221 help
211 Enable 30MHz clock for OMAP CPU. If unsure, say N. 222 Enable 30MHz clock for OMAP CPU. If unsure, say N.
212 223
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 2e618391cc51..8b40aace9db4 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -175,7 +175,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = {
175static struct omap_board_config_kernel ams_delta_config[] = { 175static struct omap_board_config_kernel ams_delta_config[] = {
176 { OMAP_TAG_LCD, &ams_delta_lcd_config }, 176 { OMAP_TAG_LCD, &ams_delta_lcd_config },
177 { OMAP_TAG_UART, &ams_delta_uart_config }, 177 { OMAP_TAG_UART, &ams_delta_uart_config },
178 { OMAP_TAG_USB, &ams_delta_usb_config },
179}; 178};
180 179
181static struct resource ams_delta_kp_resources[] = { 180static struct resource ams_delta_kp_resources[] = {
@@ -232,6 +231,7 @@ static void __init ams_delta_init(void)
232 /* Clear latch2 (NAND, LCD, modem enable) */ 231 /* Clear latch2 (NAND, LCD, modem enable) */
233 ams_delta_latch2_write(~0, 0); 232 ams_delta_latch2_write(~0, 0);
234 233
234 omap_usb_init(&ams_delta_usb_config);
235 platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); 235 platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
236} 236}
237 237
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 30308294e7c1..19e0e9232336 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -34,7 +34,39 @@
34#include <mach/keypad.h> 34#include <mach/keypad.h>
35#include <mach/common.h> 35#include <mach/common.h>
36#include <mach/board.h> 36#include <mach/board.h>
37#include <mach/board-fsample.h> 37
38/* fsample is pretty close to p2-sample */
39
40#define fsample_cpld_read(reg) __raw_readb(reg)
41#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
42
43#define FSAMPLE_CPLD_BASE 0xE8100000
44#define FSAMPLE_CPLD_SIZE SZ_4K
45#define FSAMPLE_CPLD_START 0x05080000
46
47#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
48#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
49#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
50#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
51#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
52#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
53
54#define FSAMPLE_CPLD_BIT_BT_RESET 0
55#define FSAMPLE_CPLD_BIT_LCD_RESET 1
56#define FSAMPLE_CPLD_BIT_CAM_PWDN 2
57#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
58#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
59#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
60#define FSAMPLE_CPLD_BIT_BACKLIGHT 6
61#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
62#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
63#define FSAMPLE_CPLD_BIT_OTG_RESET 9
64
65#define fsample_cpld_set(bit) \
66 fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
67
68#define fsample_cpld_clear(bit) \
69 fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
38 70
39static int fsample_keymap[] = { 71static int fsample_keymap[] = {
40 KEY(0,0,KEY_UP), 72 KEY(0,0,KEY_UP),
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 7d2670205373..e724940e86f2 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -62,7 +62,6 @@ static struct omap_uart_config generic_uart_config __initdata = {
62}; 62};
63 63
64static struct omap_board_config_kernel generic_config[] __initdata = { 64static struct omap_board_config_kernel generic_config[] __initdata = {
65 { OMAP_TAG_USB, NULL },
66 { OMAP_TAG_UART, &generic_uart_config }, 65 { OMAP_TAG_UART, &generic_uart_config },
67}; 66};
68 67
@@ -70,12 +69,12 @@ static void __init omap_generic_init(void)
70{ 69{
71#ifdef CONFIG_ARCH_OMAP15XX 70#ifdef CONFIG_ARCH_OMAP15XX
72 if (cpu_is_omap15xx()) { 71 if (cpu_is_omap15xx()) {
73 generic_config[0].data = &generic1510_usb_config; 72 omap_usb_init(&generic1510_usb_config);
74 } 73 }
75#endif 74#endif
76#if defined(CONFIG_ARCH_OMAP16XX) 75#if defined(CONFIG_ARCH_OMAP16XX)
77 if (!cpu_is_omap1510()) { 76 if (!cpu_is_omap1510()) {
78 generic_config[0].data = &generic1610_usb_config; 77 omap_usb_init(&generic1610_usb_config);
79 } 78 }
80#endif 79#endif
81 80
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index 409fa56d0a87..44d4a966bed9 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -19,6 +19,8 @@
19#include <mach/mmc.h> 19#include <mach/mmc.h>
20#include <mach/gpio.h> 20#include <mach/gpio.h>
21 21
22#include "board-h2.h"
23
22#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 24#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
23 25
24static int mmc_set_power(struct device *dev, int slot, int power_on, 26static int mmc_set_power(struct device *dev, int slot, int power_on,
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 0d784a795092..f695aa053ac8 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -46,6 +46,11 @@
46#include <mach/keypad.h> 46#include <mach/keypad.h>
47#include <mach/common.h> 47#include <mach/common.h>
48 48
49#include "board-h2.h"
50
51/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
52#define OMAP1610_ETHR_START 0x04000300
53
49static int h2_keymap[] = { 54static int h2_keymap[] = {
50 KEY(0, 0, KEY_LEFT), 55 KEY(0, 0, KEY_LEFT),
51 KEY(0, 1, KEY_RIGHT), 56 KEY(0, 1, KEY_RIGHT),
@@ -364,7 +369,6 @@ static struct omap_lcd_config h2_lcd_config __initdata = {
364}; 369};
365 370
366static struct omap_board_config_kernel h2_config[] __initdata = { 371static struct omap_board_config_kernel h2_config[] __initdata = {
367 { OMAP_TAG_USB, &h2_usb_config },
368 { OMAP_TAG_UART, &h2_uart_config }, 372 { OMAP_TAG_UART, &h2_uart_config },
369 { OMAP_TAG_LCD, &h2_lcd_config }, 373 { OMAP_TAG_LCD, &h2_lcd_config },
370}; 374};
@@ -413,6 +417,7 @@ static void __init h2_init(void)
413 omap_serial_init(); 417 omap_serial_init();
414 omap_register_i2c_bus(1, 100, h2_i2c_board_info, 418 omap_register_i2c_bus(1, 100, h2_i2c_board_info,
415 ARRAY_SIZE(h2_i2c_board_info)); 419 ARRAY_SIZE(h2_i2c_board_info));
420 omap_usb_init(&h2_usb_config);
416 h2_mmc_init(); 421 h2_mmc_init();
417} 422}
418 423
diff --git a/arch/arm/mach-omap1/board-h2.h b/arch/arm/mach-omap1/board-h2.h
new file mode 100644
index 000000000000..315e2662547e
--- /dev/null
+++ b/arch/arm/mach-omap1/board-h2.h
@@ -0,0 +1,38 @@
1/*
2 * arch/arm/mach-omap1/board-h2.h
3 *
4 * Hardware definitions for TI OMAP1610 H2 board.
5 *
6 * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_H2_H
30#define __ASM_ARCH_OMAP_H2_H
31
32#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
33# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3)
34
35extern void h2_mmc_init(void);
36
37#endif /* __ASM_ARCH_OMAP_H2_H */
38
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index fdfe793d56f2..0d8a3c195e2e 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -19,6 +19,8 @@
19#include <mach/mmc.h> 19#include <mach/mmc.h>
20#include <mach/gpio.h> 20#include <mach/gpio.h>
21 21
22#include "board-h3.h"
23
22#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 24#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
23 25
24static int mmc_set_power(struct device *dev, int slot, int power_on, 26static int mmc_set_power(struct device *dev, int slot, int power_on,
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index bf08b6ad22ee..4695965114c4 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -50,6 +50,11 @@
50#include <mach/dma.h> 50#include <mach/dma.h>
51#include <mach/common.h> 51#include <mach/common.h>
52 52
53#include "board-h3.h"
54
55/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
56#define OMAP1710_ETHR_START 0x04000300
57
53#define H3_TS_GPIO 48 58#define H3_TS_GPIO 48
54 59
55static int h3_keymap[] = { 60static int h3_keymap[] = {
@@ -418,7 +423,6 @@ static struct omap_lcd_config h3_lcd_config __initdata = {
418}; 423};
419 424
420static struct omap_board_config_kernel h3_config[] __initdata = { 425static struct omap_board_config_kernel h3_config[] __initdata = {
421 { OMAP_TAG_USB, &h3_usb_config },
422 { OMAP_TAG_UART, &h3_uart_config }, 426 { OMAP_TAG_UART, &h3_uart_config },
423 { OMAP_TAG_LCD, &h3_lcd_config }, 427 { OMAP_TAG_LCD, &h3_lcd_config },
424}; 428};
@@ -472,6 +476,7 @@ static void __init h3_init(void)
472 omap_serial_init(); 476 omap_serial_init();
473 omap_register_i2c_bus(1, 100, h3_i2c_board_info, 477 omap_register_i2c_bus(1, 100, h3_i2c_board_info,
474 ARRAY_SIZE(h3_i2c_board_info)); 478 ARRAY_SIZE(h3_i2c_board_info));
479 omap_usb_init(&h3_usb_config);
475 h3_mmc_init(); 480 h3_mmc_init();
476} 481}
477 482
diff --git a/arch/arm/mach-omap1/board-h3.h b/arch/arm/mach-omap1/board-h3.h
new file mode 100644
index 000000000000..78de535be3c5
--- /dev/null
+++ b/arch/arm/mach-omap1/board-h3.h
@@ -0,0 +1,35 @@
1/*
2 * arch/arm/mach-omap1/board-h3.h
3 *
4 * Copyright (C) 2001 RidgeRun, Inc.
5 * Copyright (C) 2004 Texas Instruments, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#ifndef __ASM_ARCH_OMAP_H3_H
28#define __ASM_ARCH_OMAP_H3_H
29
30#define H3_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
31# define H3_TPS_GPIO_MMC_PWR_EN (H3_TPS_GPIO_BASE + 4)
32
33extern void h3_mmc_init(void);
34
35#endif /* __ASM_ARCH_OMAP_H3_H */
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 071cd02a734e..2fd98260ea49 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -39,6 +39,9 @@
39#include <mach/common.h> 39#include <mach/common.h>
40#include <mach/mmc.h> 40#include <mach/mmc.h>
41 41
42/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
43#define INNOVATOR1610_ETHR_START 0x04000300
44
42static int innovator_keymap[] = { 45static int innovator_keymap[] = {
43 KEY(0, 0, KEY_F1), 46 KEY(0, 0, KEY_F1),
44 KEY(0, 3, KEY_DOWN), 47 KEY(0, 3, KEY_DOWN),
@@ -370,7 +373,6 @@ static struct omap_uart_config innovator_uart_config __initdata = {
370}; 373};
371 374
372static struct omap_board_config_kernel innovator_config[] = { 375static struct omap_board_config_kernel innovator_config[] = {
373 { OMAP_TAG_USB, NULL },
374 { OMAP_TAG_LCD, NULL }, 376 { OMAP_TAG_LCD, NULL },
375 { OMAP_TAG_UART, &innovator_uart_config }, 377 { OMAP_TAG_UART, &innovator_uart_config },
376}; 378};
@@ -392,13 +394,13 @@ static void __init innovator_init(void)
392 394
393#ifdef CONFIG_ARCH_OMAP15XX 395#ifdef CONFIG_ARCH_OMAP15XX
394 if (cpu_is_omap1510()) { 396 if (cpu_is_omap1510()) {
395 innovator_config[0].data = &innovator1510_usb_config; 397 omap_usb_init(&innovator1510_usb_config);
396 innovator_config[1].data = &innovator1510_lcd_config; 398 innovator_config[1].data = &innovator1510_lcd_config;
397 } 399 }
398#endif 400#endif
399#ifdef CONFIG_ARCH_OMAP16XX 401#ifdef CONFIG_ARCH_OMAP16XX
400 if (cpu_is_omap1610()) { 402 if (cpu_is_omap1610()) {
401 innovator_config[0].data = &h2_usb_config; 403 omap_usb_init(&h2_usb_config);
402 innovator_config[1].data = &innovator1610_lcd_config; 404 innovator_config[1].data = &innovator1610_lcd_config;
403 } 405 }
404#endif 406#endif
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index af51e0b180f2..7bc7a3cb9c51 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -233,10 +233,6 @@ static inline void nokia770_mmc_init(void)
233} 233}
234#endif 234#endif
235 235
236static struct omap_board_config_kernel nokia770_config[] __initdata = {
237 { OMAP_TAG_USB, NULL },
238};
239
240#if defined(CONFIG_OMAP_DSP) 236#if defined(CONFIG_OMAP_DSP)
241/* 237/*
242 * audio power control 238 * audio power control
@@ -371,19 +367,16 @@ static __init int omap_dsp_init(void)
371 367
372static void __init omap_nokia770_init(void) 368static void __init omap_nokia770_init(void)
373{ 369{
374 nokia770_config[0].data = &nokia770_usb_config;
375
376 platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); 370 platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices));
377 spi_register_board_info(nokia770_spi_board_info, 371 spi_register_board_info(nokia770_spi_board_info,
378 ARRAY_SIZE(nokia770_spi_board_info)); 372 ARRAY_SIZE(nokia770_spi_board_info));
379 omap_board_config = nokia770_config;
380 omap_board_config_size = ARRAY_SIZE(nokia770_config);
381 omap_gpio_init(); 373 omap_gpio_init();
382 omap_serial_init(); 374 omap_serial_init();
383 omap_register_i2c_bus(1, 100, NULL, 0); 375 omap_register_i2c_bus(1, 100, NULL, 0);
384 omap_dsp_init(); 376 omap_dsp_init();
385 ads7846_dev_init(); 377 ads7846_dev_init();
386 mipid_dev_init(); 378 mipid_dev_init();
379 omap_usb_init(&nokia770_usb_config);
387 nokia770_mmc_init(); 380 nokia770_mmc_init();
388} 381}
389 382
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 1a16ecb2ccc8..cf3247b15f87 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -52,6 +52,20 @@
52#include <mach/tc.h> 52#include <mach/tc.h>
53#include <mach/common.h> 53#include <mach/common.h>
54 54
55/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
56#define OMAP_OSK_ETHR_START 0x04800300
57
58/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with
59 * alternate pin configurations for hardware-controlled blinking.
60 */
61#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
62# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0)
63# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1)
64# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2)
65# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3)
66# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4)
67# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5)
68
55static struct mtd_partition osk_partitions[] = { 69static struct mtd_partition osk_partitions[] = {
56 /* bootloader (U-Boot, etc) in first sector */ 70 /* bootloader (U-Boot, etc) in first sector */
57 { 71 {
@@ -290,7 +304,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = {
290#endif 304#endif
291 305
292static struct omap_board_config_kernel osk_config[] __initdata = { 306static struct omap_board_config_kernel osk_config[] __initdata = {
293 { OMAP_TAG_USB, &osk_usb_config },
294 { OMAP_TAG_UART, &osk_uart_config }, 307 { OMAP_TAG_UART, &osk_uart_config },
295#ifdef CONFIG_OMAP_OSK_MISTRAL 308#ifdef CONFIG_OMAP_OSK_MISTRAL
296 { OMAP_TAG_LCD, &osk_lcd_config }, 309 { OMAP_TAG_LCD, &osk_lcd_config },
@@ -541,6 +554,8 @@ static void __init osk_init(void)
541 l |= (3 << 1); 554 l |= (3 << 1);
542 omap_writel(l, USB_TRANSCEIVER_CTRL); 555 omap_writel(l, USB_TRANSCEIVER_CTRL);
543 556
557 omap_usb_init(&osk_usb_config);
558
544 /* irq for tps65010 chip */ 559 /* irq for tps65010 chip */
545 /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */ 560 /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */
546 if (gpio_request(OMAP_MPUIO(1), "tps65010") == 0) 561 if (gpio_request(OMAP_MPUIO(1), "tps65010") == 0)
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 99f2b43f2541..886b4c0569bd 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -43,6 +43,21 @@
43#include <mach/keypad.h> 43#include <mach/keypad.h>
44#include <mach/common.h> 44#include <mach/common.h>
45 45
46#define PALMTE_USBDETECT_GPIO 0
47#define PALMTE_USB_OR_DC_GPIO 1
48#define PALMTE_TSC_GPIO 4
49#define PALMTE_PINTDAV_GPIO 6
50#define PALMTE_MMC_WP_GPIO 8
51#define PALMTE_MMC_POWER_GPIO 9
52#define PALMTE_HDQ_GPIO 11
53#define PALMTE_HEADPHONES_GPIO 14
54#define PALMTE_SPEAKER_GPIO 15
55#define PALMTE_DC_GPIO OMAP_MPUIO(2)
56#define PALMTE_MMC_SWITCH_GPIO OMAP_MPUIO(4)
57#define PALMTE_MMC1_GPIO OMAP_MPUIO(6)
58#define PALMTE_MMC2_GPIO OMAP_MPUIO(7)
59#define PALMTE_MMC3_GPIO OMAP_MPUIO(11)
60
46static void __init omap_palmte_init_irq(void) 61static void __init omap_palmte_init_irq(void)
47{ 62{
48 omap1_init_common_hw(); 63 omap1_init_common_hw();
@@ -286,7 +301,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery)
286#endif 301#endif
287 302
288static struct omap_board_config_kernel palmte_config[] __initdata = { 303static struct omap_board_config_kernel palmte_config[] __initdata = {
289 { OMAP_TAG_USB, &palmte_usb_config },
290 { OMAP_TAG_LCD, &palmte_lcd_config }, 304 { OMAP_TAG_LCD, &palmte_lcd_config },
291 { OMAP_TAG_UART, &palmte_uart_config }, 305 { OMAP_TAG_UART, &palmte_uart_config },
292}; 306};
@@ -341,6 +355,7 @@ static void __init omap_palmte_init(void)
341 spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info)); 355 spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info));
342 palmte_misc_gpio_setup(); 356 palmte_misc_gpio_setup();
343 omap_serial_init(); 357 omap_serial_init();
358 omap_usb_init(&palmte_usb_config);
344 omap_register_i2c_bus(1, 100, NULL, 0); 359 omap_register_i2c_bus(1, 100, NULL, 0);
345} 360}
346 361
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 1cbc1275c95f..4f1b44831d37 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -43,6 +43,13 @@
43#include <linux/spi/spi.h> 43#include <linux/spi/spi.h>
44#include <linux/spi/ads7846.h> 44#include <linux/spi/ads7846.h>
45 45
46#define PALMTT_USBDETECT_GPIO 0
47#define PALMTT_CABLE_GPIO 1
48#define PALMTT_LED_GPIO 3
49#define PALMTT_PENIRQ_GPIO 6
50#define PALMTT_MMC_WP_GPIO 8
51#define PALMTT_HDQ_GPIO 11
52
46static int palmtt_keymap[] = { 53static int palmtt_keymap[] = {
47 KEY(0, 0, KEY_ESC), 54 KEY(0, 0, KEY_ESC),
48 KEY(0, 1, KEY_SPACE), 55 KEY(0, 1, KEY_SPACE),
@@ -272,7 +279,6 @@ static struct omap_uart_config palmtt_uart_config __initdata = {
272}; 279};
273 280
274static struct omap_board_config_kernel palmtt_config[] __initdata = { 281static struct omap_board_config_kernel palmtt_config[] __initdata = {
275 { OMAP_TAG_USB, &palmtt_usb_config },
276 { OMAP_TAG_LCD, &palmtt_lcd_config }, 282 { OMAP_TAG_LCD, &palmtt_lcd_config },
277 { OMAP_TAG_UART, &palmtt_uart_config }, 283 { OMAP_TAG_UART, &palmtt_uart_config },
278}; 284};
@@ -297,6 +303,7 @@ static void __init omap_palmtt_init(void)
297 303
298 spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo)); 304 spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo));
299 omap_serial_init(); 305 omap_serial_init();
306 omap_usb_init(&palmtt_usb_config);
300 omap_register_i2c_bus(1, 100, NULL, 0); 307 omap_register_i2c_bus(1, 100, NULL, 0);
301} 308}
302 309
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index baf5efbfe3e8..9a55c3c58218 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -46,6 +46,16 @@
46#include <linux/spi/spi.h> 46#include <linux/spi/spi.h>
47#include <linux/spi/ads7846.h> 47#include <linux/spi/ads7846.h>
48 48
49#define PALMZ71_USBDETECT_GPIO 0
50#define PALMZ71_PENIRQ_GPIO 6
51#define PALMZ71_MMC_WP_GPIO 8
52#define PALMZ71_HDQ_GPIO 11
53
54#define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1)
55#define PALMZ71_CABLE_GPIO OMAP_MPUIO(2)
56#define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3)
57#define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4)
58
49static void __init 59static void __init
50omap_palmz71_init_irq(void) 60omap_palmz71_init_irq(void)
51{ 61{
@@ -239,7 +249,6 @@ static struct omap_uart_config palmz71_uart_config __initdata = {
239}; 249};
240 250
241static struct omap_board_config_kernel palmz71_config[] __initdata = { 251static struct omap_board_config_kernel palmz71_config[] __initdata = {
242 {OMAP_TAG_USB, &palmz71_usb_config},
243 {OMAP_TAG_LCD, &palmz71_lcd_config}, 252 {OMAP_TAG_LCD, &palmz71_lcd_config},
244 {OMAP_TAG_UART, &palmz71_uart_config}, 253 {OMAP_TAG_UART, &palmz71_uart_config},
245}; 254};
@@ -313,6 +322,7 @@ omap_palmz71_init(void)
313 322
314 spi_register_board_info(palmz71_boardinfo, 323 spi_register_board_info(palmz71_boardinfo,
315 ARRAY_SIZE(palmz71_boardinfo)); 324 ARRAY_SIZE(palmz71_boardinfo));
325 omap_usb_init(&palmz71_usb_config);
316 omap_serial_init(); 326 omap_serial_init();
317 omap_register_i2c_bus(1, 100, NULL, 0); 327 omap_register_i2c_bus(1, 100, NULL, 0);
318 palmz71_gpio_setup(0); 328 palmz71_gpio_setup(0);
diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c
index 66a4d7d5255d..58a46e4e45c3 100644
--- a/arch/arm/mach-omap1/board-sx1-mmc.c
+++ b/arch/arm/mach-omap1/board-sx1-mmc.c
@@ -17,6 +17,7 @@
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <mach/mmc.h> 18#include <mach/mmc.h>
19#include <mach/gpio.h> 19#include <mach/gpio.h>
20#include <mach/board-sx1.h>
20 21
21#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 22#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
22 23
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 28c76a1e71c0..c096577695fe 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -41,6 +41,7 @@
41#include <mach/board.h> 41#include <mach/board.h>
42#include <mach/common.h> 42#include <mach/common.h>
43#include <mach/keypad.h> 43#include <mach/keypad.h>
44#include <mach/board-sx1.h>
44 45
45/* Write to I2C device */ 46/* Write to I2C device */
46int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) 47int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
@@ -373,7 +374,6 @@ static struct omap_uart_config sx1_uart_config __initdata = {
373}; 374};
374 375
375static struct omap_board_config_kernel sx1_config[] __initdata = { 376static struct omap_board_config_kernel sx1_config[] __initdata = {
376 { OMAP_TAG_USB, &sx1_usb_config },
377 { OMAP_TAG_LCD, &sx1_lcd_config }, 377 { OMAP_TAG_LCD, &sx1_lcd_config },
378 { OMAP_TAG_UART, &sx1_uart_config }, 378 { OMAP_TAG_UART, &sx1_uart_config },
379}; 379};
@@ -388,6 +388,7 @@ static void __init omap_sx1_init(void)
388 omap_board_config_size = ARRAY_SIZE(sx1_config); 388 omap_board_config_size = ARRAY_SIZE(sx1_config);
389 omap_serial_init(); 389 omap_serial_init();
390 omap_register_i2c_bus(1, 100, NULL, 0); 390 omap_register_i2c_bus(1, 100, NULL, 0);
391 omap_usb_init(&sx1_usb_config);
391 sx1_mmc_init(); 392 sx1_mmc_init();
392 393
393 /* turn on USB power */ 394 /* turn on USB power */
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index a7653542a2b0..98275e03dad1 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -145,7 +145,6 @@ static struct omap_uart_config voiceblue_uart_config __initdata = {
145}; 145};
146 146
147static struct omap_board_config_kernel voiceblue_config[] = { 147static struct omap_board_config_kernel voiceblue_config[] = {
148 { OMAP_TAG_USB, &voiceblue_usb_config },
149 { OMAP_TAG_UART, &voiceblue_uart_config }, 148 { OMAP_TAG_UART, &voiceblue_uart_config },
150}; 149};
151 150
@@ -185,6 +184,7 @@ static void __init voiceblue_init(void)
185 omap_board_config = voiceblue_config; 184 omap_board_config = voiceblue_config;
186 omap_board_config_size = ARRAY_SIZE(voiceblue_config); 185 omap_board_config_size = ARRAY_SIZE(voiceblue_config);
187 omap_serial_init(); 186 omap_serial_init();
187 omap_usb_init(&voiceblue_usb_config);
188 omap_register_i2c_bus(1, 100, NULL, 0); 188 omap_register_i2c_bus(1, 100, NULL, 0);
189 189
190 /* There is a good chance board is going up, so enable power LED 190 /* There is a good chance board is going up, so enable power LED
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 5fba20731710..dafe4f71d15f 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -20,41 +20,161 @@
20#include <linux/io.h> 20#include <linux/io.h>
21 21
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <asm/clkdev.h>
23 24
24#include <mach/cpu.h> 25#include <mach/cpu.h>
25#include <mach/usb.h> 26#include <mach/usb.h>
26#include <mach/clock.h> 27#include <mach/clock.h>
27#include <mach/sram.h> 28#include <mach/sram.h>
28 29
30static const struct clkops clkops_generic;
31static const struct clkops clkops_uart;
32static const struct clkops clkops_dspck;
33
29#include "clock.h" 34#include "clock.h"
30 35
36static int clk_omap1_dummy_enable(struct clk *clk)
37{
38 return 0;
39}
40
41static void clk_omap1_dummy_disable(struct clk *clk)
42{
43}
44
45static const struct clkops clkops_dummy = {
46 .enable = clk_omap1_dummy_enable,
47 .disable = clk_omap1_dummy_disable,
48};
49
50static struct clk dummy_ck = {
51 .name = "dummy",
52 .ops = &clkops_dummy,
53 .flags = RATE_FIXED,
54};
55
56struct omap_clk {
57 u32 cpu;
58 struct clk_lookup lk;
59};
60
61#define CLK(dev, con, ck, cp) \
62 { \
63 .cpu = cp, \
64 .lk = { \
65 .dev_id = dev, \
66 .con_id = con, \
67 .clk = ck, \
68 }, \
69 }
70
71#define CK_310 (1 << 0)
72#define CK_730 (1 << 1)
73#define CK_1510 (1 << 2)
74#define CK_16XX (1 << 3)
75
76static struct omap_clk omap_clks[] = {
77 /* non-ULPD clocks */
78 CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310),
79 CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310),
80 /* CK_GEN1 clocks */
81 CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX),
82 CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX),
83 CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310),
84 CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
85 CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310),
86 CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
87 CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310),
88 CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
89 CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX),
90 CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310),
91 CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310),
92 CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX),
93 /* CK_GEN2 clocks */
94 CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310),
95 CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310),
96 CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310),
97 CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
98 CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310),
99 /* CK_GEN3 clocks */
100 CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_730),
101 CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310),
102 CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX),
103 CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX),
104 CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX),
105 CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310),
106 CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
107 CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310),
108 CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310),
109 CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX),
110 CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX),
111 CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_730),
112 CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310),
113 /* ULPD clocks */
114 CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310),
115 CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX),
116 CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310),
117 CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310),
118 CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX),
119 CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310),
120 CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310),
121 CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX),
122 CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX),
123 CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310),
124 CLK(NULL, "mclk", &mclk_16xx, CK_16XX),
125 CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310),
126 CLK(NULL, "bclk", &bclk_16xx, CK_16XX),
127 CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310),
128 CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
129 CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX),
130 CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX),
131 /* Virtual clocks */
132 CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
133 CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
134 CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX),
135 CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310),
136 CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
137 CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX),
138 CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310),
139 CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX),
140 CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310),
141 CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX),
142 CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310),
143 CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
144 CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
145 CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
146};
147
148static int omap1_clk_enable_generic(struct clk * clk);
149static int omap1_clk_enable(struct clk *clk);
150static void omap1_clk_disable_generic(struct clk * clk);
151static void omap1_clk_disable(struct clk *clk);
152
31__u32 arm_idlect1_mask; 153__u32 arm_idlect1_mask;
32 154
33/*------------------------------------------------------------------------- 155/*-------------------------------------------------------------------------
34 * Omap1 specific clock functions 156 * Omap1 specific clock functions
35 *-------------------------------------------------------------------------*/ 157 *-------------------------------------------------------------------------*/
36 158
37static void omap1_watchdog_recalc(struct clk * clk) 159static unsigned long omap1_watchdog_recalc(struct clk *clk)
38{ 160{
39 clk->rate = clk->parent->rate / 14; 161 return clk->parent->rate / 14;
40} 162}
41 163
42static void omap1_uart_recalc(struct clk * clk) 164static unsigned long omap1_uart_recalc(struct clk *clk)
43{ 165{
44 unsigned int val = omap_readl(clk->enable_reg); 166 unsigned int val = __raw_readl(clk->enable_reg);
45 if (val & clk->enable_bit) 167 return val & clk->enable_bit ? 48000000 : 12000000;
46 clk->rate = 48000000;
47 else
48 clk->rate = 12000000;
49} 168}
50 169
51static void omap1_sossi_recalc(struct clk *clk) 170static unsigned long omap1_sossi_recalc(struct clk *clk)
52{ 171{
53 u32 div = omap_readl(MOD_CONF_CTRL_1); 172 u32 div = omap_readl(MOD_CONF_CTRL_1);
54 173
55 div = (div >> 17) & 0x7; 174 div = (div >> 17) & 0x7;
56 div++; 175 div++;
57 clk->rate = clk->parent->rate / div; 176
177 return clk->parent->rate / div;
58} 178}
59 179
60static int omap1_clk_enable_dsp_domain(struct clk *clk) 180static int omap1_clk_enable_dsp_domain(struct clk *clk)
@@ -78,6 +198,11 @@ static void omap1_clk_disable_dsp_domain(struct clk *clk)
78 } 198 }
79} 199}
80 200
201static const struct clkops clkops_dspck = {
202 .enable = &omap1_clk_enable_dsp_domain,
203 .disable = &omap1_clk_disable_dsp_domain,
204};
205
81static int omap1_clk_enable_uart_functional(struct clk *clk) 206static int omap1_clk_enable_uart_functional(struct clk *clk)
82{ 207{
83 int ret; 208 int ret;
@@ -105,6 +230,11 @@ static void omap1_clk_disable_uart_functional(struct clk *clk)
105 omap1_clk_disable_generic(clk); 230 omap1_clk_disable_generic(clk);
106} 231}
107 232
233static const struct clkops clkops_uart = {
234 .enable = &omap1_clk_enable_uart_functional,
235 .disable = &omap1_clk_disable_uart_functional,
236};
237
108static void omap1_clk_allow_idle(struct clk *clk) 238static void omap1_clk_allow_idle(struct clk *clk)
109{ 239{
110 struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; 240 struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
@@ -197,9 +327,6 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
197 struct clk * parent; 327 struct clk * parent;
198 unsigned dsor_exp; 328 unsigned dsor_exp;
199 329
200 if (unlikely(!(clk->flags & RATE_CKCTL)))
201 return -EINVAL;
202
203 parent = clk->parent; 330 parent = clk->parent;
204 if (unlikely(parent == NULL)) 331 if (unlikely(parent == NULL))
205 return -EIO; 332 return -EIO;
@@ -215,22 +342,15 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
215 return dsor_exp; 342 return dsor_exp;
216} 343}
217 344
218static void omap1_ckctl_recalc(struct clk * clk) 345static unsigned long omap1_ckctl_recalc(struct clk *clk)
219{ 346{
220 int dsor;
221
222 /* Calculate divisor encoded as 2-bit exponent */ 347 /* Calculate divisor encoded as 2-bit exponent */
223 dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); 348 int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
224 349
225 if (unlikely(clk->rate == clk->parent->rate / dsor)) 350 return clk->parent->rate / dsor;
226 return; /* No change, quick exit */
227 clk->rate = clk->parent->rate / dsor;
228
229 if (unlikely(clk->flags & RATE_PROPAGATES))
230 propagate_rate(clk);
231} 351}
232 352
233static void omap1_ckctl_recalc_dsp_domain(struct clk * clk) 353static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk)
234{ 354{
235 int dsor; 355 int dsor;
236 356
@@ -245,12 +365,7 @@ static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
245 dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); 365 dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
246 omap1_clk_disable(&api_ck.clk); 366 omap1_clk_disable(&api_ck.clk);
247 367
248 if (unlikely(clk->rate == clk->parent->rate / dsor)) 368 return clk->parent->rate / dsor;
249 return; /* No change, quick exit */
250 clk->rate = clk->parent->rate / dsor;
251
252 if (unlikely(clk->flags & RATE_PROPAGATES))
253 propagate_rate(clk);
254} 369}
255 370
256/* MPU virtual clock functions */ 371/* MPU virtual clock functions */
@@ -289,35 +404,57 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
289 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); 404 omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
290 405
291 ck_dpll1.rate = ptr->pll_rate; 406 ck_dpll1.rate = ptr->pll_rate;
292 propagate_rate(&ck_dpll1);
293 return 0; 407 return 0;
294} 408}
295 409
296static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) 410static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate)
297{ 411{
298 int ret = -EINVAL; 412 int dsor_exp;
299 int dsor_exp; 413 u16 regval;
300 __u16 regval;
301
302 if (clk->flags & RATE_CKCTL) {
303 dsor_exp = calc_dsor_exp(clk, rate);
304 if (dsor_exp > 3)
305 dsor_exp = -EINVAL;
306 if (dsor_exp < 0)
307 return dsor_exp;
308
309 regval = __raw_readw(DSP_CKCTL);
310 regval &= ~(3 << clk->rate_offset);
311 regval |= dsor_exp << clk->rate_offset;
312 __raw_writew(regval, DSP_CKCTL);
313 clk->rate = clk->parent->rate / (1 << dsor_exp);
314 ret = 0;
315 }
316 414
317 if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) 415 dsor_exp = calc_dsor_exp(clk, rate);
318 propagate_rate(clk); 416 if (dsor_exp > 3)
417 dsor_exp = -EINVAL;
418 if (dsor_exp < 0)
419 return dsor_exp;
319 420
320 return ret; 421 regval = __raw_readw(DSP_CKCTL);
422 regval &= ~(3 << clk->rate_offset);
423 regval |= dsor_exp << clk->rate_offset;
424 __raw_writew(regval, DSP_CKCTL);
425 clk->rate = clk->parent->rate / (1 << dsor_exp);
426
427 return 0;
428}
429
430static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate)
431{
432 int dsor_exp = calc_dsor_exp(clk, rate);
433 if (dsor_exp < 0)
434 return dsor_exp;
435 if (dsor_exp > 3)
436 dsor_exp = 3;
437 return clk->parent->rate / (1 << dsor_exp);
438}
439
440static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate)
441{
442 int dsor_exp;
443 u16 regval;
444
445 dsor_exp = calc_dsor_exp(clk, rate);
446 if (dsor_exp > 3)
447 dsor_exp = -EINVAL;
448 if (dsor_exp < 0)
449 return dsor_exp;
450
451 regval = omap_readw(ARM_CKCTL);
452 regval &= ~(3 << clk->rate_offset);
453 regval |= dsor_exp << clk->rate_offset;
454 regval = verify_ckctl_value(regval);
455 omap_writew(regval, ARM_CKCTL);
456 clk->rate = clk->parent->rate / (1 << dsor_exp);
457 return 0;
321} 458}
322 459
323static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate) 460static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate)
@@ -372,14 +509,14 @@ static int omap1_set_uart_rate(struct clk * clk, unsigned long rate)
372{ 509{
373 unsigned int val; 510 unsigned int val;
374 511
375 val = omap_readl(clk->enable_reg); 512 val = __raw_readl(clk->enable_reg);
376 if (rate == 12000000) 513 if (rate == 12000000)
377 val &= ~(1 << clk->enable_bit); 514 val &= ~(1 << clk->enable_bit);
378 else if (rate == 48000000) 515 else if (rate == 48000000)
379 val |= (1 << clk->enable_bit); 516 val |= (1 << clk->enable_bit);
380 else 517 else
381 return -EINVAL; 518 return -EINVAL;
382 omap_writel(val, clk->enable_reg); 519 __raw_writel(val, clk->enable_reg);
383 clk->rate = rate; 520 clk->rate = rate;
384 521
385 return 0; 522 return 0;
@@ -398,8 +535,8 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate)
398 else 535 else
399 ratio_bits = (dsor - 2) << 2; 536 ratio_bits = (dsor - 2) << 2;
400 537
401 ratio_bits |= omap_readw(clk->enable_reg) & ~0xfd; 538 ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd;
402 omap_writew(ratio_bits, clk->enable_reg); 539 __raw_writew(ratio_bits, clk->enable_reg);
403 540
404 return 0; 541 return 0;
405} 542}
@@ -423,8 +560,6 @@ static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate)
423 omap_writel(l, MOD_CONF_CTRL_1); 560 omap_writel(l, MOD_CONF_CTRL_1);
424 561
425 clk->rate = p_rate / (div + 1); 562 clk->rate = p_rate / (div + 1);
426 if (unlikely(clk->flags & RATE_PROPAGATES))
427 propagate_rate(clk);
428 563
429 return 0; 564 return 0;
430} 565}
@@ -440,8 +575,8 @@ static void omap1_init_ext_clk(struct clk * clk)
440 __u16 ratio_bits; 575 __u16 ratio_bits;
441 576
442 /* Determine current rate and ensure clock is based on 96MHz APLL */ 577 /* Determine current rate and ensure clock is based on 96MHz APLL */
443 ratio_bits = omap_readw(clk->enable_reg) & ~1; 578 ratio_bits = __raw_readw(clk->enable_reg) & ~1;
444 omap_writew(ratio_bits, clk->enable_reg); 579 __raw_writew(ratio_bits, clk->enable_reg);
445 580
446 ratio_bits = (ratio_bits & 0xfc) >> 2; 581 ratio_bits = (ratio_bits & 0xfc) >> 2;
447 if (ratio_bits > 6) 582 if (ratio_bits > 6)
@@ -468,7 +603,7 @@ static int omap1_clk_enable(struct clk *clk)
468 omap1_clk_deny_idle(clk->parent); 603 omap1_clk_deny_idle(clk->parent);
469 } 604 }
470 605
471 ret = clk->enable(clk); 606 ret = clk->ops->enable(clk);
472 607
473 if (unlikely(ret != 0) && clk->parent) { 608 if (unlikely(ret != 0) && clk->parent) {
474 omap1_clk_disable(clk->parent); 609 omap1_clk_disable(clk->parent);
@@ -482,7 +617,7 @@ static int omap1_clk_enable(struct clk *clk)
482static void omap1_clk_disable(struct clk *clk) 617static void omap1_clk_disable(struct clk *clk)
483{ 618{
484 if (clk->usecount > 0 && !(--clk->usecount)) { 619 if (clk->usecount > 0 && !(--clk->usecount)) {
485 clk->disable(clk); 620 clk->ops->disable(clk);
486 if (likely(clk->parent)) { 621 if (likely(clk->parent)) {
487 omap1_clk_disable(clk->parent); 622 omap1_clk_disable(clk->parent);
488 if (clk->flags & CLOCK_NO_IDLE_PARENT) 623 if (clk->flags & CLOCK_NO_IDLE_PARENT)
@@ -496,9 +631,6 @@ static int omap1_clk_enable_generic(struct clk *clk)
496 __u16 regval16; 631 __u16 regval16;
497 __u32 regval32; 632 __u32 regval32;
498 633
499 if (clk->flags & ALWAYS_ENABLED)
500 return 0;
501
502 if (unlikely(clk->enable_reg == NULL)) { 634 if (unlikely(clk->enable_reg == NULL)) {
503 printk(KERN_ERR "clock.c: Enable for %s without enable code\n", 635 printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
504 clk->name); 636 clk->name);
@@ -506,25 +638,13 @@ static int omap1_clk_enable_generic(struct clk *clk)
506 } 638 }
507 639
508 if (clk->flags & ENABLE_REG_32BIT) { 640 if (clk->flags & ENABLE_REG_32BIT) {
509 if (clk->flags & VIRTUAL_IO_ADDRESS) { 641 regval32 = __raw_readl(clk->enable_reg);
510 regval32 = __raw_readl(clk->enable_reg); 642 regval32 |= (1 << clk->enable_bit);
511 regval32 |= (1 << clk->enable_bit); 643 __raw_writel(regval32, clk->enable_reg);
512 __raw_writel(regval32, clk->enable_reg);
513 } else {
514 regval32 = omap_readl(clk->enable_reg);
515 regval32 |= (1 << clk->enable_bit);
516 omap_writel(regval32, clk->enable_reg);
517 }
518 } else { 644 } else {
519 if (clk->flags & VIRTUAL_IO_ADDRESS) { 645 regval16 = __raw_readw(clk->enable_reg);
520 regval16 = __raw_readw(clk->enable_reg); 646 regval16 |= (1 << clk->enable_bit);
521 regval16 |= (1 << clk->enable_bit); 647 __raw_writew(regval16, clk->enable_reg);
522 __raw_writew(regval16, clk->enable_reg);
523 } else {
524 regval16 = omap_readw(clk->enable_reg);
525 regval16 |= (1 << clk->enable_bit);
526 omap_writew(regval16, clk->enable_reg);
527 }
528 } 648 }
529 649
530 return 0; 650 return 0;
@@ -539,44 +659,26 @@ static void omap1_clk_disable_generic(struct clk *clk)
539 return; 659 return;
540 660
541 if (clk->flags & ENABLE_REG_32BIT) { 661 if (clk->flags & ENABLE_REG_32BIT) {
542 if (clk->flags & VIRTUAL_IO_ADDRESS) { 662 regval32 = __raw_readl(clk->enable_reg);
543 regval32 = __raw_readl(clk->enable_reg); 663 regval32 &= ~(1 << clk->enable_bit);
544 regval32 &= ~(1 << clk->enable_bit); 664 __raw_writel(regval32, clk->enable_reg);
545 __raw_writel(regval32, clk->enable_reg);
546 } else {
547 regval32 = omap_readl(clk->enable_reg);
548 regval32 &= ~(1 << clk->enable_bit);
549 omap_writel(regval32, clk->enable_reg);
550 }
551 } else { 665 } else {
552 if (clk->flags & VIRTUAL_IO_ADDRESS) { 666 regval16 = __raw_readw(clk->enable_reg);
553 regval16 = __raw_readw(clk->enable_reg); 667 regval16 &= ~(1 << clk->enable_bit);
554 regval16 &= ~(1 << clk->enable_bit); 668 __raw_writew(regval16, clk->enable_reg);
555 __raw_writew(regval16, clk->enable_reg);
556 } else {
557 regval16 = omap_readw(clk->enable_reg);
558 regval16 &= ~(1 << clk->enable_bit);
559 omap_writew(regval16, clk->enable_reg);
560 }
561 } 669 }
562} 670}
563 671
672static const struct clkops clkops_generic = {
673 .enable = &omap1_clk_enable_generic,
674 .disable = &omap1_clk_disable_generic,
675};
676
564static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) 677static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
565{ 678{
566 int dsor_exp;
567
568 if (clk->flags & RATE_FIXED) 679 if (clk->flags & RATE_FIXED)
569 return clk->rate; 680 return clk->rate;
570 681
571 if (clk->flags & RATE_CKCTL) {
572 dsor_exp = calc_dsor_exp(clk, rate);
573 if (dsor_exp < 0)
574 return dsor_exp;
575 if (dsor_exp > 3)
576 dsor_exp = 3;
577 return clk->parent->rate / (1 << dsor_exp);
578 }
579
580 if (clk->round_rate != NULL) 682 if (clk->round_rate != NULL)
581 return clk->round_rate(clk, rate); 683 return clk->round_rate(clk, rate);
582 684
@@ -586,30 +688,9 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
586static int omap1_clk_set_rate(struct clk *clk, unsigned long rate) 688static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
587{ 689{
588 int ret = -EINVAL; 690 int ret = -EINVAL;
589 int dsor_exp;
590 __u16 regval;
591 691
592 if (clk->set_rate) 692 if (clk->set_rate)
593 ret = clk->set_rate(clk, rate); 693 ret = clk->set_rate(clk, rate);
594 else if (clk->flags & RATE_CKCTL) {
595 dsor_exp = calc_dsor_exp(clk, rate);
596 if (dsor_exp > 3)
597 dsor_exp = -EINVAL;
598 if (dsor_exp < 0)
599 return dsor_exp;
600
601 regval = omap_readw(ARM_CKCTL);
602 regval &= ~(3 << clk->rate_offset);
603 regval |= dsor_exp << clk->rate_offset;
604 regval = verify_ckctl_value(regval);
605 omap_writew(regval, ARM_CKCTL);
606 clk->rate = clk->parent->rate / (1 << dsor_exp);
607 ret = 0;
608 }
609
610 if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
611 propagate_rate(clk);
612
613 return ret; 694 return ret;
614} 695}
615 696
@@ -632,17 +713,10 @@ static void __init omap1_clk_disable_unused(struct clk *clk)
632 } 713 }
633 714
634 /* Is the clock already disabled? */ 715 /* Is the clock already disabled? */
635 if (clk->flags & ENABLE_REG_32BIT) { 716 if (clk->flags & ENABLE_REG_32BIT)
636 if (clk->flags & VIRTUAL_IO_ADDRESS) 717 regval32 = __raw_readl(clk->enable_reg);
637 regval32 = __raw_readl(clk->enable_reg); 718 else
638 else 719 regval32 = __raw_readw(clk->enable_reg);
639 regval32 = omap_readl(clk->enable_reg);
640 } else {
641 if (clk->flags & VIRTUAL_IO_ADDRESS)
642 regval32 = __raw_readw(clk->enable_reg);
643 else
644 regval32 = omap_readw(clk->enable_reg);
645 }
646 720
647 if ((regval32 & (1 << clk->enable_bit)) == 0) 721 if ((regval32 & (1 << clk->enable_bit)) == 0)
648 return; 722 return;
@@ -659,7 +733,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk)
659 } 733 }
660 734
661 printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); 735 printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name);
662 clk->disable(clk); 736 clk->ops->disable(clk);
663 printk(" done\n"); 737 printk(" done\n");
664} 738}
665 739
@@ -677,10 +751,10 @@ static struct clk_functions omap1_clk_functions = {
677 751
678int __init omap1_clk_init(void) 752int __init omap1_clk_init(void)
679{ 753{
680 struct clk ** clkp; 754 struct omap_clk *c;
681 const struct omap_clock_config *info; 755 const struct omap_clock_config *info;
682 int crystal_type = 0; /* Default 12 MHz */ 756 int crystal_type = 0; /* Default 12 MHz */
683 u32 reg; 757 u32 reg, cpu_mask;
684 758
685#ifdef CONFIG_DEBUG_LL 759#ifdef CONFIG_DEBUG_LL
686 /* Resets some clocks that may be left on from bootloader, 760 /* Resets some clocks that may be left on from bootloader,
@@ -700,27 +774,24 @@ int __init omap1_clk_init(void)
700 /* By default all idlect1 clocks are allowed to idle */ 774 /* By default all idlect1 clocks are allowed to idle */
701 arm_idlect1_mask = ~0; 775 arm_idlect1_mask = ~0;
702 776
703 for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) { 777 for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++)
704 if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) { 778 clk_init_one(c->lk.clk);
705 clk_register(*clkp);
706 continue;
707 }
708
709 if (((*clkp)->flags &CLOCK_IN_OMAP16XX) && cpu_is_omap16xx()) {
710 clk_register(*clkp);
711 continue;
712 }
713
714 if (((*clkp)->flags &CLOCK_IN_OMAP730) && cpu_is_omap730()) {
715 clk_register(*clkp);
716 continue;
717 }
718 779
719 if (((*clkp)->flags &CLOCK_IN_OMAP310) && cpu_is_omap310()) { 780 cpu_mask = 0;
720 clk_register(*clkp); 781 if (cpu_is_omap16xx())
721 continue; 782 cpu_mask |= CK_16XX;
783 if (cpu_is_omap1510())
784 cpu_mask |= CK_1510;
785 if (cpu_is_omap730())
786 cpu_mask |= CK_730;
787 if (cpu_is_omap310())
788 cpu_mask |= CK_310;
789
790 for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++)
791 if (c->cpu & cpu_mask) {
792 clkdev_add(&c->lk);
793 clk_register(c->lk.clk);
722 } 794 }
723 }
724 795
725 info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); 796 info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
726 if (info != NULL) { 797 if (info != NULL) {
@@ -769,7 +840,6 @@ int __init omap1_clk_init(void)
769 } 840 }
770 } 841 }
771 } 842 }
772 propagate_rate(&ck_dpll1);
773#else 843#else
774 /* Find the highest supported frequency and enable it */ 844 /* Find the highest supported frequency and enable it */
775 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { 845 if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
@@ -778,9 +848,9 @@ int __init omap1_clk_init(void)
778 omap_writew(0x2290, DPLL_CTL); 848 omap_writew(0x2290, DPLL_CTL);
779 omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL); 849 omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL);
780 ck_dpll1.rate = 60000000; 850 ck_dpll1.rate = 60000000;
781 propagate_rate(&ck_dpll1);
782 } 851 }
783#endif 852#endif
853 propagate_rate(&ck_dpll1);
784 /* Cache rates for clocks connected to ck_ref (not dpll1) */ 854 /* Cache rates for clocks connected to ck_ref (not dpll1) */
785 propagate_rate(&ck_ref); 855 propagate_rate(&ck_ref);
786 printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): " 856 printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
@@ -832,4 +902,3 @@ int __init omap1_clk_init(void)
832 902
833 return 0; 903 return 0;
834} 904}
835
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index c1dcdf18d8dd..17f874271255 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -13,27 +13,22 @@
13#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H 13#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H 14#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
15 15
16static int omap1_clk_enable_generic(struct clk * clk); 16static unsigned long omap1_ckctl_recalc(struct clk *clk);
17static void omap1_clk_disable_generic(struct clk * clk); 17static unsigned long omap1_watchdog_recalc(struct clk *clk);
18static void omap1_ckctl_recalc(struct clk * clk);
19static void omap1_watchdog_recalc(struct clk * clk);
20static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); 18static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
21static void omap1_sossi_recalc(struct clk *clk); 19static unsigned long omap1_sossi_recalc(struct clk *clk);
22static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); 20static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);
23static int omap1_clk_enable_dsp_domain(struct clk * clk);
24static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate); 21static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate);
25static void omap1_clk_disable_dsp_domain(struct clk * clk);
26static int omap1_set_uart_rate(struct clk * clk, unsigned long rate); 22static int omap1_set_uart_rate(struct clk * clk, unsigned long rate);
27static void omap1_uart_recalc(struct clk * clk); 23static unsigned long omap1_uart_recalc(struct clk *clk);
28static int omap1_clk_enable_uart_functional(struct clk * clk);
29static void omap1_clk_disable_uart_functional(struct clk * clk);
30static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate); 24static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate);
31static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate); 25static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate);
32static void omap1_init_ext_clk(struct clk * clk); 26static void omap1_init_ext_clk(struct clk * clk);
33static int omap1_select_table_rate(struct clk * clk, unsigned long rate); 27static int omap1_select_table_rate(struct clk * clk, unsigned long rate);
34static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate); 28static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate);
35static int omap1_clk_enable(struct clk *clk); 29
36static void omap1_clk_disable(struct clk *clk); 30static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);
31static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);
37 32
38struct mpu_rate { 33struct mpu_rate {
39 unsigned long rate; 34 unsigned long rate;
@@ -152,101 +147,84 @@ static struct mpu_rate rate_table[] = {
152 147
153static struct clk ck_ref = { 148static struct clk ck_ref = {
154 .name = "ck_ref", 149 .name = "ck_ref",
150 .ops = &clkops_null,
155 .rate = 12000000, 151 .rate = 12000000,
156 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
157 CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
158 .enable = &omap1_clk_enable_generic,
159 .disable = &omap1_clk_disable_generic,
160}; 152};
161 153
162static struct clk ck_dpll1 = { 154static struct clk ck_dpll1 = {
163 .name = "ck_dpll1", 155 .name = "ck_dpll1",
156 .ops = &clkops_null,
164 .parent = &ck_ref, 157 .parent = &ck_ref,
165 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
166 CLOCK_IN_OMAP310 | RATE_PROPAGATES | ALWAYS_ENABLED,
167 .enable = &omap1_clk_enable_generic,
168 .disable = &omap1_clk_disable_generic,
169}; 158};
170 159
171static struct arm_idlect1_clk ck_dpll1out = { 160static struct arm_idlect1_clk ck_dpll1out = {
172 .clk = { 161 .clk = {
173 .name = "ck_dpll1out", 162 .name = "ck_dpll1out",
163 .ops = &clkops_generic,
174 .parent = &ck_dpll1, 164 .parent = &ck_dpll1,
175 .flags = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL | 165 .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT,
176 ENABLE_REG_32BIT | RATE_PROPAGATES, 166 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
177 .enable_reg = (void __iomem *)ARM_IDLECT2,
178 .enable_bit = EN_CKOUT_ARM, 167 .enable_bit = EN_CKOUT_ARM,
179 .recalc = &followparent_recalc, 168 .recalc = &followparent_recalc,
180 .enable = &omap1_clk_enable_generic,
181 .disable = &omap1_clk_disable_generic,
182 }, 169 },
183 .idlect_shift = 12, 170 .idlect_shift = 12,
184}; 171};
185 172
186static struct clk sossi_ck = { 173static struct clk sossi_ck = {
187 .name = "ck_sossi", 174 .name = "ck_sossi",
175 .ops = &clkops_generic,
188 .parent = &ck_dpll1out.clk, 176 .parent = &ck_dpll1out.clk,
189 .flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT | 177 .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT,
190 ENABLE_REG_32BIT, 178 .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1),
191 .enable_reg = (void __iomem *)MOD_CONF_CTRL_1,
192 .enable_bit = 16, 179 .enable_bit = 16,
193 .recalc = &omap1_sossi_recalc, 180 .recalc = &omap1_sossi_recalc,
194 .set_rate = &omap1_set_sossi_rate, 181 .set_rate = &omap1_set_sossi_rate,
195 .enable = &omap1_clk_enable_generic,
196 .disable = &omap1_clk_disable_generic,
197}; 182};
198 183
199static struct clk arm_ck = { 184static struct clk arm_ck = {
200 .name = "arm_ck", 185 .name = "arm_ck",
186 .ops = &clkops_null,
201 .parent = &ck_dpll1, 187 .parent = &ck_dpll1,
202 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
203 CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES |
204 ALWAYS_ENABLED,
205 .rate_offset = CKCTL_ARMDIV_OFFSET, 188 .rate_offset = CKCTL_ARMDIV_OFFSET,
206 .recalc = &omap1_ckctl_recalc, 189 .recalc = &omap1_ckctl_recalc,
207 .enable = &omap1_clk_enable_generic, 190 .round_rate = omap1_clk_round_rate_ckctl_arm,
208 .disable = &omap1_clk_disable_generic, 191 .set_rate = omap1_clk_set_rate_ckctl_arm,
209}; 192};
210 193
211static struct arm_idlect1_clk armper_ck = { 194static struct arm_idlect1_clk armper_ck = {
212 .clk = { 195 .clk = {
213 .name = "armper_ck", 196 .name = "armper_ck",
197 .ops = &clkops_generic,
214 .parent = &ck_dpll1, 198 .parent = &ck_dpll1,
215 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 199 .flags = CLOCK_IDLE_CONTROL,
216 CLOCK_IN_OMAP310 | RATE_CKCTL | 200 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
217 CLOCK_IDLE_CONTROL,
218 .enable_reg = (void __iomem *)ARM_IDLECT2,
219 .enable_bit = EN_PERCK, 201 .enable_bit = EN_PERCK,
220 .rate_offset = CKCTL_PERDIV_OFFSET, 202 .rate_offset = CKCTL_PERDIV_OFFSET,
221 .recalc = &omap1_ckctl_recalc, 203 .recalc = &omap1_ckctl_recalc,
222 .enable = &omap1_clk_enable_generic, 204 .round_rate = omap1_clk_round_rate_ckctl_arm,
223 .disable = &omap1_clk_disable_generic, 205 .set_rate = omap1_clk_set_rate_ckctl_arm,
224 }, 206 },
225 .idlect_shift = 2, 207 .idlect_shift = 2,
226}; 208};
227 209
228static struct clk arm_gpio_ck = { 210static struct clk arm_gpio_ck = {
229 .name = "arm_gpio_ck", 211 .name = "arm_gpio_ck",
212 .ops = &clkops_generic,
230 .parent = &ck_dpll1, 213 .parent = &ck_dpll1,
231 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, 214 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
232 .enable_reg = (void __iomem *)ARM_IDLECT2,
233 .enable_bit = EN_GPIOCK, 215 .enable_bit = EN_GPIOCK,
234 .recalc = &followparent_recalc, 216 .recalc = &followparent_recalc,
235 .enable = &omap1_clk_enable_generic,
236 .disable = &omap1_clk_disable_generic,
237}; 217};
238 218
239static struct arm_idlect1_clk armxor_ck = { 219static struct arm_idlect1_clk armxor_ck = {
240 .clk = { 220 .clk = {
241 .name = "armxor_ck", 221 .name = "armxor_ck",
222 .ops = &clkops_generic,
242 .parent = &ck_ref, 223 .parent = &ck_ref,
243 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 224 .flags = CLOCK_IDLE_CONTROL,
244 CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, 225 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
245 .enable_reg = (void __iomem *)ARM_IDLECT2,
246 .enable_bit = EN_XORPCK, 226 .enable_bit = EN_XORPCK,
247 .recalc = &followparent_recalc, 227 .recalc = &followparent_recalc,
248 .enable = &omap1_clk_enable_generic,
249 .disable = &omap1_clk_disable_generic,
250 }, 228 },
251 .idlect_shift = 1, 229 .idlect_shift = 1,
252}; 230};
@@ -254,14 +232,12 @@ static struct arm_idlect1_clk armxor_ck = {
254static struct arm_idlect1_clk armtim_ck = { 232static struct arm_idlect1_clk armtim_ck = {
255 .clk = { 233 .clk = {
256 .name = "armtim_ck", 234 .name = "armtim_ck",
235 .ops = &clkops_generic,
257 .parent = &ck_ref, 236 .parent = &ck_ref,
258 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 237 .flags = CLOCK_IDLE_CONTROL,
259 CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, 238 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
260 .enable_reg = (void __iomem *)ARM_IDLECT2,
261 .enable_bit = EN_TIMCK, 239 .enable_bit = EN_TIMCK,
262 .recalc = &followparent_recalc, 240 .recalc = &followparent_recalc,
263 .enable = &omap1_clk_enable_generic,
264 .disable = &omap1_clk_disable_generic,
265 }, 241 },
266 .idlect_shift = 9, 242 .idlect_shift = 9,
267}; 243};
@@ -269,201 +245,166 @@ static struct arm_idlect1_clk armtim_ck = {
269static struct arm_idlect1_clk armwdt_ck = { 245static struct arm_idlect1_clk armwdt_ck = {
270 .clk = { 246 .clk = {
271 .name = "armwdt_ck", 247 .name = "armwdt_ck",
248 .ops = &clkops_generic,
272 .parent = &ck_ref, 249 .parent = &ck_ref,
273 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 250 .flags = CLOCK_IDLE_CONTROL,
274 CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, 251 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
275 .enable_reg = (void __iomem *)ARM_IDLECT2,
276 .enable_bit = EN_WDTCK, 252 .enable_bit = EN_WDTCK,
277 .recalc = &omap1_watchdog_recalc, 253 .recalc = &omap1_watchdog_recalc,
278 .enable = &omap1_clk_enable_generic,
279 .disable = &omap1_clk_disable_generic,
280 }, 254 },
281 .idlect_shift = 0, 255 .idlect_shift = 0,
282}; 256};
283 257
284static struct clk arminth_ck16xx = { 258static struct clk arminth_ck16xx = {
285 .name = "arminth_ck", 259 .name = "arminth_ck",
260 .ops = &clkops_null,
286 .parent = &arm_ck, 261 .parent = &arm_ck,
287 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
288 .recalc = &followparent_recalc, 262 .recalc = &followparent_recalc,
289 /* Note: On 16xx the frequency can be divided by 2 by programming 263 /* Note: On 16xx the frequency can be divided by 2 by programming
290 * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 264 * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
291 * 265 *
292 * 1510 version is in TC clocks. 266 * 1510 version is in TC clocks.
293 */ 267 */
294 .enable = &omap1_clk_enable_generic,
295 .disable = &omap1_clk_disable_generic,
296}; 268};
297 269
298static struct clk dsp_ck = { 270static struct clk dsp_ck = {
299 .name = "dsp_ck", 271 .name = "dsp_ck",
272 .ops = &clkops_generic,
300 .parent = &ck_dpll1, 273 .parent = &ck_dpll1,
301 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 274 .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL),
302 RATE_CKCTL,
303 .enable_reg = (void __iomem *)ARM_CKCTL,
304 .enable_bit = EN_DSPCK, 275 .enable_bit = EN_DSPCK,
305 .rate_offset = CKCTL_DSPDIV_OFFSET, 276 .rate_offset = CKCTL_DSPDIV_OFFSET,
306 .recalc = &omap1_ckctl_recalc, 277 .recalc = &omap1_ckctl_recalc,
307 .enable = &omap1_clk_enable_generic, 278 .round_rate = omap1_clk_round_rate_ckctl_arm,
308 .disable = &omap1_clk_disable_generic, 279 .set_rate = omap1_clk_set_rate_ckctl_arm,
309}; 280};
310 281
311static struct clk dspmmu_ck = { 282static struct clk dspmmu_ck = {
312 .name = "dspmmu_ck", 283 .name = "dspmmu_ck",
284 .ops = &clkops_null,
313 .parent = &ck_dpll1, 285 .parent = &ck_dpll1,
314 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
315 RATE_CKCTL | ALWAYS_ENABLED,
316 .rate_offset = CKCTL_DSPMMUDIV_OFFSET, 286 .rate_offset = CKCTL_DSPMMUDIV_OFFSET,
317 .recalc = &omap1_ckctl_recalc, 287 .recalc = &omap1_ckctl_recalc,
318 .enable = &omap1_clk_enable_generic, 288 .round_rate = omap1_clk_round_rate_ckctl_arm,
319 .disable = &omap1_clk_disable_generic, 289 .set_rate = omap1_clk_set_rate_ckctl_arm,
320}; 290};
321 291
322static struct clk dspper_ck = { 292static struct clk dspper_ck = {
323 .name = "dspper_ck", 293 .name = "dspper_ck",
294 .ops = &clkops_dspck,
324 .parent = &ck_dpll1, 295 .parent = &ck_dpll1,
325 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
326 RATE_CKCTL | VIRTUAL_IO_ADDRESS,
327 .enable_reg = DSP_IDLECT2, 296 .enable_reg = DSP_IDLECT2,
328 .enable_bit = EN_PERCK, 297 .enable_bit = EN_PERCK,
329 .rate_offset = CKCTL_PERDIV_OFFSET, 298 .rate_offset = CKCTL_PERDIV_OFFSET,
330 .recalc = &omap1_ckctl_recalc_dsp_domain, 299 .recalc = &omap1_ckctl_recalc_dsp_domain,
300 .round_rate = omap1_clk_round_rate_ckctl_arm,
331 .set_rate = &omap1_clk_set_rate_dsp_domain, 301 .set_rate = &omap1_clk_set_rate_dsp_domain,
332 .enable = &omap1_clk_enable_dsp_domain,
333 .disable = &omap1_clk_disable_dsp_domain,
334}; 302};
335 303
336static struct clk dspxor_ck = { 304static struct clk dspxor_ck = {
337 .name = "dspxor_ck", 305 .name = "dspxor_ck",
306 .ops = &clkops_dspck,
338 .parent = &ck_ref, 307 .parent = &ck_ref,
339 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
340 VIRTUAL_IO_ADDRESS,
341 .enable_reg = DSP_IDLECT2, 308 .enable_reg = DSP_IDLECT2,
342 .enable_bit = EN_XORPCK, 309 .enable_bit = EN_XORPCK,
343 .recalc = &followparent_recalc, 310 .recalc = &followparent_recalc,
344 .enable = &omap1_clk_enable_dsp_domain,
345 .disable = &omap1_clk_disable_dsp_domain,
346}; 311};
347 312
348static struct clk dsptim_ck = { 313static struct clk dsptim_ck = {
349 .name = "dsptim_ck", 314 .name = "dsptim_ck",
315 .ops = &clkops_dspck,
350 .parent = &ck_ref, 316 .parent = &ck_ref,
351 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
352 VIRTUAL_IO_ADDRESS,
353 .enable_reg = DSP_IDLECT2, 317 .enable_reg = DSP_IDLECT2,
354 .enable_bit = EN_DSPTIMCK, 318 .enable_bit = EN_DSPTIMCK,
355 .recalc = &followparent_recalc, 319 .recalc = &followparent_recalc,
356 .enable = &omap1_clk_enable_dsp_domain,
357 .disable = &omap1_clk_disable_dsp_domain,
358}; 320};
359 321
360/* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */ 322/* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */
361static struct arm_idlect1_clk tc_ck = { 323static struct arm_idlect1_clk tc_ck = {
362 .clk = { 324 .clk = {
363 .name = "tc_ck", 325 .name = "tc_ck",
326 .ops = &clkops_null,
364 .parent = &ck_dpll1, 327 .parent = &ck_dpll1,
365 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 328 .flags = CLOCK_IDLE_CONTROL,
366 CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
367 RATE_CKCTL | RATE_PROPAGATES |
368 ALWAYS_ENABLED | CLOCK_IDLE_CONTROL,
369 .rate_offset = CKCTL_TCDIV_OFFSET, 329 .rate_offset = CKCTL_TCDIV_OFFSET,
370 .recalc = &omap1_ckctl_recalc, 330 .recalc = &omap1_ckctl_recalc,
371 .enable = &omap1_clk_enable_generic, 331 .round_rate = omap1_clk_round_rate_ckctl_arm,
372 .disable = &omap1_clk_disable_generic, 332 .set_rate = omap1_clk_set_rate_ckctl_arm,
373 }, 333 },
374 .idlect_shift = 6, 334 .idlect_shift = 6,
375}; 335};
376 336
377static struct clk arminth_ck1510 = { 337static struct clk arminth_ck1510 = {
378 .name = "arminth_ck", 338 .name = "arminth_ck",
339 .ops = &clkops_null,
379 .parent = &tc_ck.clk, 340 .parent = &tc_ck.clk,
380 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
381 ALWAYS_ENABLED,
382 .recalc = &followparent_recalc, 341 .recalc = &followparent_recalc,
383 /* Note: On 1510 the frequency follows TC_CK 342 /* Note: On 1510 the frequency follows TC_CK
384 * 343 *
385 * 16xx version is in MPU clocks. 344 * 16xx version is in MPU clocks.
386 */ 345 */
387 .enable = &omap1_clk_enable_generic,
388 .disable = &omap1_clk_disable_generic,
389}; 346};
390 347
391static struct clk tipb_ck = { 348static struct clk tipb_ck = {
392 /* No-idle controlled by "tc_ck" */ 349 /* No-idle controlled by "tc_ck" */
393 .name = "tipb_ck", 350 .name = "tipb_ck",
351 .ops = &clkops_null,
394 .parent = &tc_ck.clk, 352 .parent = &tc_ck.clk,
395 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
396 ALWAYS_ENABLED,
397 .recalc = &followparent_recalc, 353 .recalc = &followparent_recalc,
398 .enable = &omap1_clk_enable_generic,
399 .disable = &omap1_clk_disable_generic,
400}; 354};
401 355
402static struct clk l3_ocpi_ck = { 356static struct clk l3_ocpi_ck = {
403 /* No-idle controlled by "tc_ck" */ 357 /* No-idle controlled by "tc_ck" */
404 .name = "l3_ocpi_ck", 358 .name = "l3_ocpi_ck",
359 .ops = &clkops_generic,
405 .parent = &tc_ck.clk, 360 .parent = &tc_ck.clk,
406 .flags = CLOCK_IN_OMAP16XX, 361 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
407 .enable_reg = (void __iomem *)ARM_IDLECT3,
408 .enable_bit = EN_OCPI_CK, 362 .enable_bit = EN_OCPI_CK,
409 .recalc = &followparent_recalc, 363 .recalc = &followparent_recalc,
410 .enable = &omap1_clk_enable_generic,
411 .disable = &omap1_clk_disable_generic,
412}; 364};
413 365
414static struct clk tc1_ck = { 366static struct clk tc1_ck = {
415 .name = "tc1_ck", 367 .name = "tc1_ck",
368 .ops = &clkops_generic,
416 .parent = &tc_ck.clk, 369 .parent = &tc_ck.clk,
417 .flags = CLOCK_IN_OMAP16XX, 370 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
418 .enable_reg = (void __iomem *)ARM_IDLECT3,
419 .enable_bit = EN_TC1_CK, 371 .enable_bit = EN_TC1_CK,
420 .recalc = &followparent_recalc, 372 .recalc = &followparent_recalc,
421 .enable = &omap1_clk_enable_generic,
422 .disable = &omap1_clk_disable_generic,
423}; 373};
424 374
425static struct clk tc2_ck = { 375static struct clk tc2_ck = {
426 .name = "tc2_ck", 376 .name = "tc2_ck",
377 .ops = &clkops_generic,
427 .parent = &tc_ck.clk, 378 .parent = &tc_ck.clk,
428 .flags = CLOCK_IN_OMAP16XX, 379 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
429 .enable_reg = (void __iomem *)ARM_IDLECT3,
430 .enable_bit = EN_TC2_CK, 380 .enable_bit = EN_TC2_CK,
431 .recalc = &followparent_recalc, 381 .recalc = &followparent_recalc,
432 .enable = &omap1_clk_enable_generic,
433 .disable = &omap1_clk_disable_generic,
434}; 382};
435 383
436static struct clk dma_ck = { 384static struct clk dma_ck = {
437 /* No-idle controlled by "tc_ck" */ 385 /* No-idle controlled by "tc_ck" */
438 .name = "dma_ck", 386 .name = "dma_ck",
387 .ops = &clkops_null,
439 .parent = &tc_ck.clk, 388 .parent = &tc_ck.clk,
440 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
441 CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
442 .recalc = &followparent_recalc, 389 .recalc = &followparent_recalc,
443 .enable = &omap1_clk_enable_generic,
444 .disable = &omap1_clk_disable_generic,
445}; 390};
446 391
447static struct clk dma_lcdfree_ck = { 392static struct clk dma_lcdfree_ck = {
448 .name = "dma_lcdfree_ck", 393 .name = "dma_lcdfree_ck",
394 .ops = &clkops_null,
449 .parent = &tc_ck.clk, 395 .parent = &tc_ck.clk,
450 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
451 .recalc = &followparent_recalc, 396 .recalc = &followparent_recalc,
452 .enable = &omap1_clk_enable_generic,
453 .disable = &omap1_clk_disable_generic,
454}; 397};
455 398
456static struct arm_idlect1_clk api_ck = { 399static struct arm_idlect1_clk api_ck = {
457 .clk = { 400 .clk = {
458 .name = "api_ck", 401 .name = "api_ck",
402 .ops = &clkops_generic,
459 .parent = &tc_ck.clk, 403 .parent = &tc_ck.clk,
460 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 404 .flags = CLOCK_IDLE_CONTROL,
461 CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, 405 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
462 .enable_reg = (void __iomem *)ARM_IDLECT2,
463 .enable_bit = EN_APICK, 406 .enable_bit = EN_APICK,
464 .recalc = &followparent_recalc, 407 .recalc = &followparent_recalc,
465 .enable = &omap1_clk_enable_generic,
466 .disable = &omap1_clk_disable_generic,
467 }, 408 },
468 .idlect_shift = 8, 409 .idlect_shift = 8,
469}; 410};
@@ -471,276 +412,238 @@ static struct arm_idlect1_clk api_ck = {
471static struct arm_idlect1_clk lb_ck = { 412static struct arm_idlect1_clk lb_ck = {
472 .clk = { 413 .clk = {
473 .name = "lb_ck", 414 .name = "lb_ck",
415 .ops = &clkops_generic,
474 .parent = &tc_ck.clk, 416 .parent = &tc_ck.clk,
475 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | 417 .flags = CLOCK_IDLE_CONTROL,
476 CLOCK_IDLE_CONTROL, 418 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
477 .enable_reg = (void __iomem *)ARM_IDLECT2,
478 .enable_bit = EN_LBCK, 419 .enable_bit = EN_LBCK,
479 .recalc = &followparent_recalc, 420 .recalc = &followparent_recalc,
480 .enable = &omap1_clk_enable_generic,
481 .disable = &omap1_clk_disable_generic,
482 }, 421 },
483 .idlect_shift = 4, 422 .idlect_shift = 4,
484}; 423};
485 424
486static struct clk rhea1_ck = { 425static struct clk rhea1_ck = {
487 .name = "rhea1_ck", 426 .name = "rhea1_ck",
427 .ops = &clkops_null,
488 .parent = &tc_ck.clk, 428 .parent = &tc_ck.clk,
489 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
490 .recalc = &followparent_recalc, 429 .recalc = &followparent_recalc,
491 .enable = &omap1_clk_enable_generic,
492 .disable = &omap1_clk_disable_generic,
493}; 430};
494 431
495static struct clk rhea2_ck = { 432static struct clk rhea2_ck = {
496 .name = "rhea2_ck", 433 .name = "rhea2_ck",
434 .ops = &clkops_null,
497 .parent = &tc_ck.clk, 435 .parent = &tc_ck.clk,
498 .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
499 .recalc = &followparent_recalc, 436 .recalc = &followparent_recalc,
500 .enable = &omap1_clk_enable_generic,
501 .disable = &omap1_clk_disable_generic,
502}; 437};
503 438
504static struct clk lcd_ck_16xx = { 439static struct clk lcd_ck_16xx = {
505 .name = "lcd_ck", 440 .name = "lcd_ck",
441 .ops = &clkops_generic,
506 .parent = &ck_dpll1, 442 .parent = &ck_dpll1,
507 .flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730 | RATE_CKCTL, 443 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
508 .enable_reg = (void __iomem *)ARM_IDLECT2,
509 .enable_bit = EN_LCDCK, 444 .enable_bit = EN_LCDCK,
510 .rate_offset = CKCTL_LCDDIV_OFFSET, 445 .rate_offset = CKCTL_LCDDIV_OFFSET,
511 .recalc = &omap1_ckctl_recalc, 446 .recalc = &omap1_ckctl_recalc,
512 .enable = &omap1_clk_enable_generic, 447 .round_rate = omap1_clk_round_rate_ckctl_arm,
513 .disable = &omap1_clk_disable_generic, 448 .set_rate = omap1_clk_set_rate_ckctl_arm,
514}; 449};
515 450
516static struct arm_idlect1_clk lcd_ck_1510 = { 451static struct arm_idlect1_clk lcd_ck_1510 = {
517 .clk = { 452 .clk = {
518 .name = "lcd_ck", 453 .name = "lcd_ck",
454 .ops = &clkops_generic,
519 .parent = &ck_dpll1, 455 .parent = &ck_dpll1,
520 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | 456 .flags = CLOCK_IDLE_CONTROL,
521 RATE_CKCTL | CLOCK_IDLE_CONTROL, 457 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
522 .enable_reg = (void __iomem *)ARM_IDLECT2,
523 .enable_bit = EN_LCDCK, 458 .enable_bit = EN_LCDCK,
524 .rate_offset = CKCTL_LCDDIV_OFFSET, 459 .rate_offset = CKCTL_LCDDIV_OFFSET,
525 .recalc = &omap1_ckctl_recalc, 460 .recalc = &omap1_ckctl_recalc,
526 .enable = &omap1_clk_enable_generic, 461 .round_rate = omap1_clk_round_rate_ckctl_arm,
527 .disable = &omap1_clk_disable_generic, 462 .set_rate = omap1_clk_set_rate_ckctl_arm,
528 }, 463 },
529 .idlect_shift = 3, 464 .idlect_shift = 3,
530}; 465};
531 466
532static struct clk uart1_1510 = { 467static struct clk uart1_1510 = {
533 .name = "uart1_ck", 468 .name = "uart1_ck",
469 .ops = &clkops_null,
534 /* Direct from ULPD, no real parent */ 470 /* Direct from ULPD, no real parent */
535 .parent = &armper_ck.clk, 471 .parent = &armper_ck.clk,
536 .rate = 12000000, 472 .rate = 12000000,
537 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | 473 .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
538 ENABLE_REG_32BIT | ALWAYS_ENABLED | 474 .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
539 CLOCK_NO_IDLE_PARENT,
540 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
541 .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ 475 .enable_bit = 29, /* Chooses between 12MHz and 48MHz */
542 .set_rate = &omap1_set_uart_rate, 476 .set_rate = &omap1_set_uart_rate,
543 .recalc = &omap1_uart_recalc, 477 .recalc = &omap1_uart_recalc,
544 .enable = &omap1_clk_enable_generic,
545 .disable = &omap1_clk_disable_generic,
546}; 478};
547 479
548static struct uart_clk uart1_16xx = { 480static struct uart_clk uart1_16xx = {
549 .clk = { 481 .clk = {
550 .name = "uart1_ck", 482 .name = "uart1_ck",
483 .ops = &clkops_uart,
551 /* Direct from ULPD, no real parent */ 484 /* Direct from ULPD, no real parent */
552 .parent = &armper_ck.clk, 485 .parent = &armper_ck.clk,
553 .rate = 48000000, 486 .rate = 48000000,
554 .flags = CLOCK_IN_OMAP16XX | RATE_FIXED | 487 .flags = RATE_FIXED | ENABLE_REG_32BIT |
555 ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, 488 CLOCK_NO_IDLE_PARENT,
556 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, 489 .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
557 .enable_bit = 29, 490 .enable_bit = 29,
558 .enable = &omap1_clk_enable_uart_functional,
559 .disable = &omap1_clk_disable_uart_functional,
560 }, 491 },
561 .sysc_addr = 0xfffb0054, 492 .sysc_addr = 0xfffb0054,
562}; 493};
563 494
564static struct clk uart2_ck = { 495static struct clk uart2_ck = {
565 .name = "uart2_ck", 496 .name = "uart2_ck",
497 .ops = &clkops_null,
566 /* Direct from ULPD, no real parent */ 498 /* Direct from ULPD, no real parent */
567 .parent = &armper_ck.clk, 499 .parent = &armper_ck.clk,
568 .rate = 12000000, 500 .rate = 12000000,
569 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 501 .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
570 CLOCK_IN_OMAP310 | ENABLE_REG_32BIT | 502 .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
571 ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
572 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
573 .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ 503 .enable_bit = 30, /* Chooses between 12MHz and 48MHz */
574 .set_rate = &omap1_set_uart_rate, 504 .set_rate = &omap1_set_uart_rate,
575 .recalc = &omap1_uart_recalc, 505 .recalc = &omap1_uart_recalc,
576 .enable = &omap1_clk_enable_generic,
577 .disable = &omap1_clk_disable_generic,
578}; 506};
579 507
580static struct clk uart3_1510 = { 508static struct clk uart3_1510 = {
581 .name = "uart3_ck", 509 .name = "uart3_ck",
510 .ops = &clkops_null,
582 /* Direct from ULPD, no real parent */ 511 /* Direct from ULPD, no real parent */
583 .parent = &armper_ck.clk, 512 .parent = &armper_ck.clk,
584 .rate = 12000000, 513 .rate = 12000000,
585 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | 514 .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
586 ENABLE_REG_32BIT | ALWAYS_ENABLED | 515 .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
587 CLOCK_NO_IDLE_PARENT,
588 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
589 .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ 516 .enable_bit = 31, /* Chooses between 12MHz and 48MHz */
590 .set_rate = &omap1_set_uart_rate, 517 .set_rate = &omap1_set_uart_rate,
591 .recalc = &omap1_uart_recalc, 518 .recalc = &omap1_uart_recalc,
592 .enable = &omap1_clk_enable_generic,
593 .disable = &omap1_clk_disable_generic,
594}; 519};
595 520
596static struct uart_clk uart3_16xx = { 521static struct uart_clk uart3_16xx = {
597 .clk = { 522 .clk = {
598 .name = "uart3_ck", 523 .name = "uart3_ck",
524 .ops = &clkops_uart,
599 /* Direct from ULPD, no real parent */ 525 /* Direct from ULPD, no real parent */
600 .parent = &armper_ck.clk, 526 .parent = &armper_ck.clk,
601 .rate = 48000000, 527 .rate = 48000000,
602 .flags = CLOCK_IN_OMAP16XX | RATE_FIXED | 528 .flags = RATE_FIXED | ENABLE_REG_32BIT |
603 ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, 529 CLOCK_NO_IDLE_PARENT,
604 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, 530 .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
605 .enable_bit = 31, 531 .enable_bit = 31,
606 .enable = &omap1_clk_enable_uart_functional,
607 .disable = &omap1_clk_disable_uart_functional,
608 }, 532 },
609 .sysc_addr = 0xfffb9854, 533 .sysc_addr = 0xfffb9854,
610}; 534};
611 535
612static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ 536static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
613 .name = "usb_clko", 537 .name = "usb_clko",
538 .ops = &clkops_generic,
614 /* Direct from ULPD, no parent */ 539 /* Direct from ULPD, no parent */
615 .rate = 6000000, 540 .rate = 6000000,
616 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 541 .flags = RATE_FIXED | ENABLE_REG_32BIT,
617 CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT, 542 .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
618 .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL,
619 .enable_bit = USB_MCLK_EN_BIT, 543 .enable_bit = USB_MCLK_EN_BIT,
620 .enable = &omap1_clk_enable_generic,
621 .disable = &omap1_clk_disable_generic,
622}; 544};
623 545
624static struct clk usb_hhc_ck1510 = { 546static struct clk usb_hhc_ck1510 = {
625 .name = "usb_hhc_ck", 547 .name = "usb_hhc_ck",
548 .ops = &clkops_generic,
626 /* Direct from ULPD, no parent */ 549 /* Direct from ULPD, no parent */
627 .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ 550 .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
628 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | 551 .flags = RATE_FIXED | ENABLE_REG_32BIT,
629 RATE_FIXED | ENABLE_REG_32BIT, 552 .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
630 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
631 .enable_bit = USB_HOST_HHC_UHOST_EN, 553 .enable_bit = USB_HOST_HHC_UHOST_EN,
632 .enable = &omap1_clk_enable_generic,
633 .disable = &omap1_clk_disable_generic,
634}; 554};
635 555
636static struct clk usb_hhc_ck16xx = { 556static struct clk usb_hhc_ck16xx = {
637 .name = "usb_hhc_ck", 557 .name = "usb_hhc_ck",
558 .ops = &clkops_generic,
638 /* Direct from ULPD, no parent */ 559 /* Direct from ULPD, no parent */
639 .rate = 48000000, 560 .rate = 48000000,
640 /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ 561 /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
641 .flags = CLOCK_IN_OMAP16XX | 562 .flags = RATE_FIXED | ENABLE_REG_32BIT,
642 RATE_FIXED | ENABLE_REG_32BIT, 563 .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
643 .enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
644 .enable_bit = 8 /* UHOST_EN */, 564 .enable_bit = 8 /* UHOST_EN */,
645 .enable = &omap1_clk_enable_generic,
646 .disable = &omap1_clk_disable_generic,
647}; 565};
648 566
649static struct clk usb_dc_ck = { 567static struct clk usb_dc_ck = {
650 .name = "usb_dc_ck", 568 .name = "usb_dc_ck",
569 .ops = &clkops_generic,
651 /* Direct from ULPD, no parent */ 570 /* Direct from ULPD, no parent */
652 .rate = 48000000, 571 .rate = 48000000,
653 .flags = CLOCK_IN_OMAP16XX | RATE_FIXED, 572 .flags = RATE_FIXED,
654 .enable_reg = (void __iomem *)SOFT_REQ_REG, 573 .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
655 .enable_bit = 4, 574 .enable_bit = 4,
656 .enable = &omap1_clk_enable_generic,
657 .disable = &omap1_clk_disable_generic,
658}; 575};
659 576
660static struct clk mclk_1510 = { 577static struct clk mclk_1510 = {
661 .name = "mclk", 578 .name = "mclk",
579 .ops = &clkops_generic,
662 /* Direct from ULPD, no parent. May be enabled by ext hardware. */ 580 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
663 .rate = 12000000, 581 .rate = 12000000,
664 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, 582 .flags = RATE_FIXED,
665 .enable_reg = (void __iomem *)SOFT_REQ_REG, 583 .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
666 .enable_bit = 6, 584 .enable_bit = 6,
667 .enable = &omap1_clk_enable_generic,
668 .disable = &omap1_clk_disable_generic,
669}; 585};
670 586
671static struct clk mclk_16xx = { 587static struct clk mclk_16xx = {
672 .name = "mclk", 588 .name = "mclk",
589 .ops = &clkops_generic,
673 /* Direct from ULPD, no parent. May be enabled by ext hardware. */ 590 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
674 .flags = CLOCK_IN_OMAP16XX, 591 .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL),
675 .enable_reg = (void __iomem *)COM_CLK_DIV_CTRL_SEL,
676 .enable_bit = COM_ULPD_PLL_CLK_REQ, 592 .enable_bit = COM_ULPD_PLL_CLK_REQ,
677 .set_rate = &omap1_set_ext_clk_rate, 593 .set_rate = &omap1_set_ext_clk_rate,
678 .round_rate = &omap1_round_ext_clk_rate, 594 .round_rate = &omap1_round_ext_clk_rate,
679 .init = &omap1_init_ext_clk, 595 .init = &omap1_init_ext_clk,
680 .enable = &omap1_clk_enable_generic,
681 .disable = &omap1_clk_disable_generic,
682}; 596};
683 597
684static struct clk bclk_1510 = { 598static struct clk bclk_1510 = {
685 .name = "bclk", 599 .name = "bclk",
600 .ops = &clkops_generic,
686 /* Direct from ULPD, no parent. May be enabled by ext hardware. */ 601 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
687 .rate = 12000000, 602 .rate = 12000000,
688 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, 603 .flags = RATE_FIXED,
689 .enable = &omap1_clk_enable_generic,
690 .disable = &omap1_clk_disable_generic,
691}; 604};
692 605
693static struct clk bclk_16xx = { 606static struct clk bclk_16xx = {
694 .name = "bclk", 607 .name = "bclk",
608 .ops = &clkops_generic,
695 /* Direct from ULPD, no parent. May be enabled by ext hardware. */ 609 /* Direct from ULPD, no parent. May be enabled by ext hardware. */
696 .flags = CLOCK_IN_OMAP16XX, 610 .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL),
697 .enable_reg = (void __iomem *)SWD_CLK_DIV_CTRL_SEL,
698 .enable_bit = SWD_ULPD_PLL_CLK_REQ, 611 .enable_bit = SWD_ULPD_PLL_CLK_REQ,
699 .set_rate = &omap1_set_ext_clk_rate, 612 .set_rate = &omap1_set_ext_clk_rate,
700 .round_rate = &omap1_round_ext_clk_rate, 613 .round_rate = &omap1_round_ext_clk_rate,
701 .init = &omap1_init_ext_clk, 614 .init = &omap1_init_ext_clk,
702 .enable = &omap1_clk_enable_generic,
703 .disable = &omap1_clk_disable_generic,
704}; 615};
705 616
706static struct clk mmc1_ck = { 617static struct clk mmc1_ck = {
707 .name = "mmc_ck", 618 .name = "mmc_ck",
619 .ops = &clkops_generic,
708 /* Functional clock is direct from ULPD, interface clock is ARMPER */ 620 /* Functional clock is direct from ULPD, interface clock is ARMPER */
709 .parent = &armper_ck.clk, 621 .parent = &armper_ck.clk,
710 .rate = 48000000, 622 .rate = 48000000,
711 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 623 .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
712 CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT | 624 .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
713 CLOCK_NO_IDLE_PARENT,
714 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
715 .enable_bit = 23, 625 .enable_bit = 23,
716 .enable = &omap1_clk_enable_generic,
717 .disable = &omap1_clk_disable_generic,
718}; 626};
719 627
720static struct clk mmc2_ck = { 628static struct clk mmc2_ck = {
721 .name = "mmc_ck", 629 .name = "mmc_ck",
722 .id = 1, 630 .id = 1,
631 .ops = &clkops_generic,
723 /* Functional clock is direct from ULPD, interface clock is ARMPER */ 632 /* Functional clock is direct from ULPD, interface clock is ARMPER */
724 .parent = &armper_ck.clk, 633 .parent = &armper_ck.clk,
725 .rate = 48000000, 634 .rate = 48000000,
726 .flags = CLOCK_IN_OMAP16XX | 635 .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
727 RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, 636 .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
728 .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
729 .enable_bit = 20, 637 .enable_bit = 20,
730 .enable = &omap1_clk_enable_generic,
731 .disable = &omap1_clk_disable_generic,
732}; 638};
733 639
734static struct clk virtual_ck_mpu = { 640static struct clk virtual_ck_mpu = {
735 .name = "mpu", 641 .name = "mpu",
736 .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 642 .ops = &clkops_null,
737 CLOCK_IN_OMAP310 | VIRTUAL_CLOCK | ALWAYS_ENABLED,
738 .parent = &arm_ck, /* Is smarter alias for */ 643 .parent = &arm_ck, /* Is smarter alias for */
739 .recalc = &followparent_recalc, 644 .recalc = &followparent_recalc,
740 .set_rate = &omap1_select_table_rate, 645 .set_rate = &omap1_select_table_rate,
741 .round_rate = &omap1_round_to_table_rate, 646 .round_rate = &omap1_round_to_table_rate,
742 .enable = &omap1_clk_enable_generic,
743 .disable = &omap1_clk_disable_generic,
744}; 647};
745 648
746/* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK 649/* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK
@@ -748,78 +651,19 @@ remains active during MPU idle whenever this is enabled */
748static struct clk i2c_fck = { 651static struct clk i2c_fck = {
749 .name = "i2c_fck", 652 .name = "i2c_fck",
750 .id = 1, 653 .id = 1,
751 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 654 .ops = &clkops_null,
752 VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | 655 .flags = CLOCK_NO_IDLE_PARENT,
753 ALWAYS_ENABLED,
754 .parent = &armxor_ck.clk, 656 .parent = &armxor_ck.clk,
755 .recalc = &followparent_recalc, 657 .recalc = &followparent_recalc,
756 .enable = &omap1_clk_enable_generic,
757 .disable = &omap1_clk_disable_generic,
758}; 658};
759 659
760static struct clk i2c_ick = { 660static struct clk i2c_ick = {
761 .name = "i2c_ick", 661 .name = "i2c_ick",
762 .id = 1, 662 .id = 1,
763 .flags = CLOCK_IN_OMAP16XX | 663 .ops = &clkops_null,
764 VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | 664 .flags = CLOCK_NO_IDLE_PARENT,
765 ALWAYS_ENABLED,
766 .parent = &armper_ck.clk, 665 .parent = &armper_ck.clk,
767 .recalc = &followparent_recalc, 666 .recalc = &followparent_recalc,
768 .enable = &omap1_clk_enable_generic,
769 .disable = &omap1_clk_disable_generic,
770};
771
772static struct clk * onchip_clks[] = {
773 /* non-ULPD clocks */
774 &ck_ref,
775 &ck_dpll1,
776 /* CK_GEN1 clocks */
777 &ck_dpll1out.clk,
778 &sossi_ck,
779 &arm_ck,
780 &armper_ck.clk,
781 &arm_gpio_ck,
782 &armxor_ck.clk,
783 &armtim_ck.clk,
784 &armwdt_ck.clk,
785 &arminth_ck1510, &arminth_ck16xx,
786 /* CK_GEN2 clocks */
787 &dsp_ck,
788 &dspmmu_ck,
789 &dspper_ck,
790 &dspxor_ck,
791 &dsptim_ck,
792 /* CK_GEN3 clocks */
793 &tc_ck.clk,
794 &tipb_ck,
795 &l3_ocpi_ck,
796 &tc1_ck,
797 &tc2_ck,
798 &dma_ck,
799 &dma_lcdfree_ck,
800 &api_ck.clk,
801 &lb_ck.clk,
802 &rhea1_ck,
803 &rhea2_ck,
804 &lcd_ck_16xx,
805 &lcd_ck_1510.clk,
806 /* ULPD clocks */
807 &uart1_1510,
808 &uart1_16xx.clk,
809 &uart2_ck,
810 &uart3_1510,
811 &uart3_16xx.clk,
812 &usb_clko,
813 &usb_hhc_ck1510, &usb_hhc_ck16xx,
814 &usb_dc_ck,
815 &mclk_1510, &mclk_16xx,
816 &bclk_1510, &bclk_16xx,
817 &mmc1_ck,
818 &mmc2_ck,
819 /* Virtual clocks */
820 &virtual_ck_mpu,
821 &i2c_fck,
822 &i2c_ick,
823}; 667};
824 668
825#endif 669#endif
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index ba5d7c08dc17..bbbaeb0abcd3 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -86,7 +86,7 @@ static struct resource mbox_resources[] = {
86}; 86};
87 87
88static struct platform_device mbox_device = { 88static struct platform_device mbox_device = {
89 .name = "mailbox", 89 .name = "omap1-mailbox",
90 .id = -1, 90 .id = -1,
91 .num_resources = ARRAY_SIZE(mbox_resources), 91 .num_resources = ARRAY_SIZE(mbox_resources),
92 .resource = mbox_resources, 92 .resource = mbox_resources,
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index 89bb8756f450..4ef26faf083e 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -38,6 +38,7 @@ static struct omap_id omap_ids[] __initdata = {
38 { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000}, 38 { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
39 { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100}, 39 { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
40 { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300}, 40 { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
41 { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320500, .type = 0x08500000},
41 { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000}, 42 { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
42 { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000}, 43 { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
43 { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000}, 44 { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
@@ -77,7 +78,7 @@ static u16 __init omap_get_jtag_id(void)
77 prod_id = omap_readl(OMAP_PRODUCTION_ID_1); 78 prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
78 omap_id = omap_readl(OMAP32_ID_1); 79 omap_id = omap_readl(OMAP32_ID_1);
79 80
80 /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */ 81 /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730/850 */
81 if (((prod_id >> 20) == 0) || (prod_id == omap_id)) 82 if (((prod_id >> 20) == 0) || (prod_id == omap_id))
82 prod_id = 0; 83 prod_id = 0;
83 else 84 else
@@ -178,6 +179,7 @@ void __init omap_check_revision(void)
178 179
179 switch (cpu_type) { 180 switch (cpu_type) {
180 case 0x07: 181 case 0x07:
182 case 0x08:
181 omap_revision |= 0x07; 183 omap_revision |= 0x07;
182 break; 184 break;
183 case 0x03: 185 case 0x03:
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 4c3e582f3d3c..3afe540149f7 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -52,6 +52,22 @@ static struct map_desc omap730_io_desc[] __initdata = {
52}; 52};
53#endif 53#endif
54 54
55#ifdef CONFIG_ARCH_OMAP850
56static struct map_desc omap850_io_desc[] __initdata = {
57 {
58 .virtual = OMAP850_DSP_BASE,
59 .pfn = __phys_to_pfn(OMAP850_DSP_START),
60 .length = OMAP850_DSP_SIZE,
61 .type = MT_DEVICE
62 }, {
63 .virtual = OMAP850_DSPREG_BASE,
64 .pfn = __phys_to_pfn(OMAP850_DSPREG_START),
65 .length = OMAP850_DSPREG_SIZE,
66 .type = MT_DEVICE
67 }
68};
69#endif
70
55#ifdef CONFIG_ARCH_OMAP15XX 71#ifdef CONFIG_ARCH_OMAP15XX
56static struct map_desc omap1510_io_desc[] __initdata = { 72static struct map_desc omap1510_io_desc[] __initdata = {
57 { 73 {
@@ -109,6 +125,13 @@ void __init omap1_map_common_io(void)
109 iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc)); 125 iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
110 } 126 }
111#endif 127#endif
128
129#ifdef CONFIG_ARCH_OMAP850
130 if (cpu_is_omap850()) {
131 iotable_init(omap850_io_desc, ARRAY_SIZE(omap850_io_desc));
132 }
133#endif
134
112#ifdef CONFIG_ARCH_OMAP15XX 135#ifdef CONFIG_ARCH_OMAP15XX
113 if (cpu_is_omap15xx()) { 136 if (cpu_is_omap15xx()) {
114 iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); 137 iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 9ad5197075ff..de03c8448994 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -145,6 +145,14 @@ static struct omap_irq_bank omap730_irq_banks[] = {
145}; 145};
146#endif 146#endif
147 147
148#ifdef CONFIG_ARCH_OMAP850
149static struct omap_irq_bank omap850_irq_banks[] = {
150 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
151 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
152 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 },
153};
154#endif
155
148#ifdef CONFIG_ARCH_OMAP15XX 156#ifdef CONFIG_ARCH_OMAP15XX
149static struct omap_irq_bank omap1510_irq_banks[] = { 157static struct omap_irq_bank omap1510_irq_banks[] = {
150 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff }, 158 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff },
@@ -184,6 +192,12 @@ void __init omap_init_irq(void)
184 irq_bank_count = ARRAY_SIZE(omap730_irq_banks); 192 irq_bank_count = ARRAY_SIZE(omap730_irq_banks);
185 } 193 }
186#endif 194#endif
195#ifdef CONFIG_ARCH_OMAP850
196 if (cpu_is_omap850()) {
197 irq_banks = omap850_irq_banks;
198 irq_bank_count = ARRAY_SIZE(omap850_irq_banks);
199 }
200#endif
187#ifdef CONFIG_ARCH_OMAP15XX 201#ifdef CONFIG_ARCH_OMAP15XX
188 if (cpu_is_omap1510()) { 202 if (cpu_is_omap1510()) {
189 irq_banks = omap1510_irq_banks; 203 irq_banks = omap1510_irq_banks;
@@ -214,9 +228,8 @@ void __init omap_init_irq(void)
214 irq_bank_writel(0x03, 1, IRQ_CONTROL_REG_OFFSET); 228 irq_bank_writel(0x03, 1, IRQ_CONTROL_REG_OFFSET);
215 229
216 /* Enable interrupts in global mask */ 230 /* Enable interrupts in global mask */
217 if (cpu_is_omap730()) { 231 if (cpu_is_omap7xx())
218 irq_bank_writel(0x0, 0, IRQ_GMR_REG_OFFSET); 232 irq_bank_writel(0x0, 0, IRQ_GMR_REG_OFFSET);
219 }
220 233
221 /* Install the interrupt handlers for each bank */ 234 /* Install the interrupt handlers for each bank */
222 for (i = 0; i < irq_bank_count; i++) { 235 for (i = 0; i < irq_bank_count; i++) {
@@ -236,6 +249,8 @@ void __init omap_init_irq(void)
236 249
237 if (cpu_is_omap730()) 250 if (cpu_is_omap730())
238 omap_unmask_irq(INT_730_IH2_IRQ); 251 omap_unmask_irq(INT_730_IH2_IRQ);
252 else if (cpu_is_omap850())
253 omap_unmask_irq(INT_850_IH2_IRQ);
239 else if (cpu_is_omap15xx()) 254 else if (cpu_is_omap15xx())
240 omap_unmask_irq(INT_1510_IH2_IRQ); 255 omap_unmask_irq(INT_1510_IH2_IRQ);
241 else if (cpu_is_omap16xx()) 256 else if (cpu_is_omap16xx())
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c
index 59abbf331a96..0af4d6c85b47 100644
--- a/arch/arm/mach-omap1/mailbox.c
+++ b/arch/arm/mach-omap1/mailbox.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Mailbox reservation modules for DSP 2 * Mailbox reservation modules for DSP
3 * 3 *
4 * Copyright (C) 2006 Nokia Corporation 4 * Copyright (C) 2006-2009 Nokia Corporation
5 * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 5 * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
@@ -27,7 +27,7 @@
27#define MAILBOX_DSP2ARM1_Flag 0x1c 27#define MAILBOX_DSP2ARM1_Flag 0x1c
28#define MAILBOX_DSP2ARM2_Flag 0x20 28#define MAILBOX_DSP2ARM2_Flag 0x20
29 29
30unsigned long mbox_base; 30static void __iomem *mbox_base;
31 31
32struct omap_mbox1_fifo { 32struct omap_mbox1_fifo {
33 unsigned long cmd; 33 unsigned long cmd;
@@ -40,14 +40,14 @@ struct omap_mbox1_priv {
40 struct omap_mbox1_fifo rx_fifo; 40 struct omap_mbox1_fifo rx_fifo;
41}; 41};
42 42
43static inline int mbox_read_reg(unsigned int reg) 43static inline int mbox_read_reg(size_t ofs)
44{ 44{
45 return __raw_readw(mbox_base + reg); 45 return __raw_readw(mbox_base + ofs);
46} 46}
47 47
48static inline void mbox_write_reg(unsigned int val, unsigned int reg) 48static inline void mbox_write_reg(u32 val, size_t ofs)
49{ 49{
50 __raw_writew(val, mbox_base + reg); 50 __raw_writew(val, mbox_base + ofs);
51} 51}
52 52
53/* msg */ 53/* msg */
@@ -143,7 +143,7 @@ struct omap_mbox mbox_dsp_info = {
143}; 143};
144EXPORT_SYMBOL(mbox_dsp_info); 144EXPORT_SYMBOL(mbox_dsp_info);
145 145
146static int __init omap1_mbox_probe(struct platform_device *pdev) 146static int __devinit omap1_mbox_probe(struct platform_device *pdev)
147{ 147{
148 struct resource *res; 148 struct resource *res;
149 int ret = 0; 149 int ret = 0;
@@ -170,12 +170,10 @@ static int __init omap1_mbox_probe(struct platform_device *pdev)
170 } 170 }
171 mbox_dsp_info.irq = res->start; 171 mbox_dsp_info.irq = res->start;
172 172
173 ret = omap_mbox_register(&mbox_dsp_info); 173 return omap_mbox_register(&pdev->dev, &mbox_dsp_info);
174
175 return ret;
176} 174}
177 175
178static int omap1_mbox_remove(struct platform_device *pdev) 176static int __devexit omap1_mbox_remove(struct platform_device *pdev)
179{ 177{
180 omap_mbox_unregister(&mbox_dsp_info); 178 omap_mbox_unregister(&mbox_dsp_info);
181 179
@@ -184,9 +182,9 @@ static int omap1_mbox_remove(struct platform_device *pdev)
184 182
185static struct platform_driver omap1_mbox_driver = { 183static struct platform_driver omap1_mbox_driver = {
186 .probe = omap1_mbox_probe, 184 .probe = omap1_mbox_probe,
187 .remove = omap1_mbox_remove, 185 .remove = __devexit_p(omap1_mbox_remove),
188 .driver = { 186 .driver = {
189 .name = "mailbox", 187 .name = "omap1-mailbox",
190 }, 188 },
191}; 189};
192 190
@@ -203,4 +201,7 @@ static void __exit omap1_mbox_exit(void)
203module_init(omap1_mbox_init); 201module_init(omap1_mbox_init);
204module_exit(omap1_mbox_exit); 202module_exit(omap1_mbox_exit);
205 203
206MODULE_LICENSE("GPL"); 204MODULE_LICENSE("GPL v2");
205MODULE_DESCRIPTION("omap mailbox: omap1 architecture specific functions");
206MODULE_AUTHOR("Hiroshi DOYU" <Hiroshi.DOYU@nokia.com>);
207MODULE_ALIAS("platform:omap1-mailbox");
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 575ba31295cf..d040c3f1027f 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -28,9 +28,9 @@
28#define DPS_RSTCT2_PER_EN (1 << 0) 28#define DPS_RSTCT2_PER_EN (1 << 0)
29#define DSP_RSTCT2_WD_PER_EN (1 << 1) 29#define DSP_RSTCT2_WD_PER_EN (1 << 1)
30 30
31#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) 31static int dsp_use;
32const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" }; 32static struct clk *api_clk;
33#endif 33static struct clk *dsp_clk;
34 34
35static void omap1_mcbsp_request(unsigned int id) 35static void omap1_mcbsp_request(unsigned int id)
36{ 36{
@@ -39,20 +39,40 @@ static void omap1_mcbsp_request(unsigned int id)
39 * are DSP public peripherals. 39 * are DSP public peripherals.
40 */ 40 */
41 if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { 41 if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
42 omap_dsp_request_mem(); 42 if (dsp_use++ == 0) {
43 /* 43 api_clk = clk_get(NULL, "api_clk");
44 * DSP external peripheral reset 44 dsp_clk = clk_get(NULL, "dsp_clk");
45 * FIXME: This should be moved to dsp code 45 if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
46 */ 46 clk_enable(api_clk);
47 __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN | 47 clk_enable(dsp_clk);
48 DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2); 48
49 omap_dsp_request_mem();
50 /*
51 * DSP external peripheral reset
52 * FIXME: This should be moved to dsp code
53 */
54 __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
55 DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
56 }
57 }
49 } 58 }
50} 59}
51 60
52static void omap1_mcbsp_free(unsigned int id) 61static void omap1_mcbsp_free(unsigned int id)
53{ 62{
54 if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) 63 if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
55 omap_dsp_release_mem(); 64 if (--dsp_use == 0) {
65 omap_dsp_release_mem();
66 if (!IS_ERR(api_clk)) {
67 clk_disable(api_clk);
68 clk_put(api_clk);
69 }
70 if (!IS_ERR(dsp_clk)) {
71 clk_disable(dsp_clk);
72 clk_put(dsp_clk);
73 }
74 }
75 }
56} 76}
57 77
58static struct omap_mcbsp_ops omap1_mcbsp_ops = { 78static struct omap_mcbsp_ops omap1_mcbsp_ops = {
@@ -94,8 +114,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
94 .rx_irq = INT_McBSP1RX, 114 .rx_irq = INT_McBSP1RX,
95 .tx_irq = INT_McBSP1TX, 115 .tx_irq = INT_McBSP1TX,
96 .ops = &omap1_mcbsp_ops, 116 .ops = &omap1_mcbsp_ops,
97 .clk_names = clk_names,
98 .num_clks = 3,
99 }, 117 },
100 { 118 {
101 .phys_base = OMAP1510_MCBSP2_BASE, 119 .phys_base = OMAP1510_MCBSP2_BASE,
@@ -112,8 +130,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
112 .rx_irq = INT_McBSP3RX, 130 .rx_irq = INT_McBSP3RX,
113 .tx_irq = INT_McBSP3TX, 131 .tx_irq = INT_McBSP3TX,
114 .ops = &omap1_mcbsp_ops, 132 .ops = &omap1_mcbsp_ops,
115 .clk_names = clk_names,
116 .num_clks = 3,
117 }, 133 },
118}; 134};
119#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) 135#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
@@ -131,8 +147,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
131 .rx_irq = INT_McBSP1RX, 147 .rx_irq = INT_McBSP1RX,
132 .tx_irq = INT_McBSP1TX, 148 .tx_irq = INT_McBSP1TX,
133 .ops = &omap1_mcbsp_ops, 149 .ops = &omap1_mcbsp_ops,
134 .clk_names = clk_names,
135 .num_clks = 3,
136 }, 150 },
137 { 151 {
138 .phys_base = OMAP1610_MCBSP2_BASE, 152 .phys_base = OMAP1610_MCBSP2_BASE,
@@ -149,8 +163,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
149 .rx_irq = INT_McBSP3RX, 163 .rx_irq = INT_McBSP3RX,
150 .tx_irq = INT_McBSP3TX, 164 .tx_irq = INT_McBSP3TX,
151 .ops = &omap1_mcbsp_ops, 165 .ops = &omap1_mcbsp_ops,
152 .clk_names = clk_names,
153 .num_clks = 3,
154 }, 166 },
155}; 167};
156#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) 168#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 062c905c2ba6..721e0d9d8b1d 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -58,6 +58,25 @@ MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0)
58#define OMAP730_PINS_SZ 0 58#define OMAP730_PINS_SZ 0
59#endif /* CONFIG_ARCH_OMAP730 */ 59#endif /* CONFIG_ARCH_OMAP730 */
60 60
61#ifdef CONFIG_ARCH_OMAP850
62struct pin_config __initdata_or_module omap850_pins[] = {
63MUX_CFG_850("E2_850_KBR0", 12, 21, 0, 20, 1, 0)
64MUX_CFG_850("J7_850_KBR1", 12, 25, 0, 24, 1, 0)
65MUX_CFG_850("E1_850_KBR2", 12, 29, 0, 28, 1, 0)
66MUX_CFG_850("F3_850_KBR3", 13, 1, 0, 0, 1, 0)
67MUX_CFG_850("D2_850_KBR4", 13, 5, 0, 4, 1, 0)
68MUX_CFG_850("C2_850_KBC0", 13, 9, 0, 8, 1, 0)
69MUX_CFG_850("D3_850_KBC1", 13, 13, 0, 12, 1, 0)
70MUX_CFG_850("E4_850_KBC2", 13, 17, 0, 16, 1, 0)
71MUX_CFG_850("F4_850_KBC3", 13, 21, 0, 20, 1, 0)
72MUX_CFG_850("E3_850_KBC4", 13, 25, 0, 24, 1, 0)
73
74MUX_CFG_850("AA17_850_USB_DM", 2, 21, 0, 20, 0, 0)
75MUX_CFG_850("W16_850_USB_PU_EN", 2, 25, 0, 24, 0, 0)
76MUX_CFG_850("W17_850_USB_VBUSI", 2, 29, 0, 28, 0, 0)
77};
78#endif
79
61#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) 80#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
62static struct pin_config __initdata_or_module omap1xxx_pins[] = { 81static struct pin_config __initdata_or_module omap1xxx_pins[] = {
63/* 82/*
@@ -419,6 +438,11 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
419 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", 438 printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
420 cfg->pull_name, cfg->pull_reg, pull_orig, pull); 439 cfg->pull_name, cfg->pull_reg, pull_orig, pull);
421 } 440 }
441
442#ifdef CONFIG_ARCH_OMAP850
443 omap_mux_register(omap850_pins, ARRAY_SIZE(omap850_pins));
444#endif
445
422#endif 446#endif
423 447
424#ifdef CONFIG_OMAP_MUX_ERRORS 448#ifdef CONFIG_OMAP_MUX_ERRORS
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 0002084e0655..842090b148f1 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -121,6 +121,13 @@ void __init omap_serial_init(void)
121 serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; 121 serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
122 } 122 }
123 123
124 if (cpu_is_omap850()) {
125 serial_platform_data[0].regshift = 0;
126 serial_platform_data[1].regshift = 0;
127 serial_platform_data[0].irq = INT_850_UART_MODEM_1;
128 serial_platform_data[1].irq = INT_850_UART_MODEM_IRDA_2;
129 }
130
124 if (cpu_is_omap15xx()) { 131 if (cpu_is_omap15xx()) {
125 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; 132 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
126 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; 133 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-25 12:35:48 -0400