diff options
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r-- | arch/arm/mach-omap1/Kconfig | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap1/dma.h | 41 | ||||
-rw-r--r-- | arch/arm/mach-omap1/pm.c | 84 |
3 files changed, 40 insertions, 91 deletions
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index 903da8eb886c..cdd05f2e67ee 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig | |||
@@ -55,12 +55,6 @@ config MACH_OMAP_H3 | |||
55 | TI OMAP 1710 H3 board support. Say Y here if you have such | 55 | TI OMAP 1710 H3 board support. Say Y here if you have such |
56 | a board. | 56 | a board. |
57 | 57 | ||
58 | config MACH_OMAP_HTCWIZARD | ||
59 | bool "HTC Wizard" | ||
60 | depends on ARCH_OMAP850 | ||
61 | help | ||
62 | HTC Wizard smartphone support (AKA QTEK 9100, ...) | ||
63 | |||
64 | config MACH_HERALD | 58 | config MACH_HERALD |
65 | bool "HTC Herald" | 59 | bool "HTC Herald" |
66 | depends on ARCH_OMAP850 | 60 | depends on ARCH_OMAP850 |
diff --git a/arch/arm/mach-omap1/dma.h b/arch/arm/mach-omap1/dma.h index da6345dab03f..d05909c96715 100644 --- a/arch/arm/mach-omap1/dma.h +++ b/arch/arm/mach-omap1/dma.h | |||
@@ -21,21 +21,10 @@ | |||
21 | 21 | ||
22 | /* DMA channels for omap1 */ | 22 | /* DMA channels for omap1 */ |
23 | #define OMAP_DMA_NO_DEVICE 0 | 23 | #define OMAP_DMA_NO_DEVICE 0 |
24 | #define OMAP_DMA_MCSI1_TX 1 | ||
25 | #define OMAP_DMA_MCSI1_RX 2 | ||
26 | #define OMAP_DMA_I2C_RX 3 | ||
27 | #define OMAP_DMA_I2C_TX 4 | ||
28 | #define OMAP_DMA_EXT_NDMA_REQ 5 | ||
29 | #define OMAP_DMA_EXT_NDMA_REQ2 6 | ||
30 | #define OMAP_DMA_UWIRE_TX 7 | ||
31 | #define OMAP_DMA_MCBSP1_TX 8 | 24 | #define OMAP_DMA_MCBSP1_TX 8 |
32 | #define OMAP_DMA_MCBSP1_RX 9 | 25 | #define OMAP_DMA_MCBSP1_RX 9 |
33 | #define OMAP_DMA_MCBSP3_TX 10 | 26 | #define OMAP_DMA_MCBSP3_TX 10 |
34 | #define OMAP_DMA_MCBSP3_RX 11 | 27 | #define OMAP_DMA_MCBSP3_RX 11 |
35 | #define OMAP_DMA_UART1_TX 12 | ||
36 | #define OMAP_DMA_UART1_RX 13 | ||
37 | #define OMAP_DMA_UART2_TX 14 | ||
38 | #define OMAP_DMA_UART2_RX 15 | ||
39 | #define OMAP_DMA_MCBSP2_TX 16 | 28 | #define OMAP_DMA_MCBSP2_TX 16 |
40 | #define OMAP_DMA_MCBSP2_RX 17 | 29 | #define OMAP_DMA_MCBSP2_RX 17 |
41 | #define OMAP_DMA_UART3_TX 18 | 30 | #define OMAP_DMA_UART3_TX 18 |
@@ -43,41 +32,11 @@ | |||
43 | #define OMAP_DMA_CAMERA_IF_RX 20 | 32 | #define OMAP_DMA_CAMERA_IF_RX 20 |
44 | #define OMAP_DMA_MMC_TX 21 | 33 | #define OMAP_DMA_MMC_TX 21 |
45 | #define OMAP_DMA_MMC_RX 22 | 34 | #define OMAP_DMA_MMC_RX 22 |
46 | #define OMAP_DMA_NAND 23 | ||
47 | #define OMAP_DMA_IRQ_LCD_LINE 24 | ||
48 | #define OMAP_DMA_MEMORY_STICK 25 | ||
49 | #define OMAP_DMA_USB_W2FC_RX0 26 | 35 | #define OMAP_DMA_USB_W2FC_RX0 26 |
50 | #define OMAP_DMA_USB_W2FC_RX1 27 | ||
51 | #define OMAP_DMA_USB_W2FC_RX2 28 | ||
52 | #define OMAP_DMA_USB_W2FC_TX0 29 | 36 | #define OMAP_DMA_USB_W2FC_TX0 29 |
53 | #define OMAP_DMA_USB_W2FC_TX1 30 | ||
54 | #define OMAP_DMA_USB_W2FC_TX2 31 | ||
55 | 37 | ||
56 | /* These are only for 1610 */ | 38 | /* These are only for 1610 */ |
57 | #define OMAP_DMA_CRYPTO_DES_IN 32 | ||
58 | #define OMAP_DMA_SPI_TX 33 | ||
59 | #define OMAP_DMA_SPI_RX 34 | ||
60 | #define OMAP_DMA_CRYPTO_HASH 35 | ||
61 | #define OMAP_DMA_CCP_ATTN 36 | ||
62 | #define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37 | ||
63 | #define OMAP_DMA_CMT_APE_TX_CHAN_0 38 | ||
64 | #define OMAP_DMA_CMT_APE_RV_CHAN_0 39 | ||
65 | #define OMAP_DMA_CMT_APE_TX_CHAN_1 40 | ||
66 | #define OMAP_DMA_CMT_APE_RV_CHAN_1 41 | ||
67 | #define OMAP_DMA_CMT_APE_TX_CHAN_2 42 | ||
68 | #define OMAP_DMA_CMT_APE_RV_CHAN_2 43 | ||
69 | #define OMAP_DMA_CMT_APE_TX_CHAN_3 44 | ||
70 | #define OMAP_DMA_CMT_APE_RV_CHAN_3 45 | ||
71 | #define OMAP_DMA_CMT_APE_TX_CHAN_4 46 | ||
72 | #define OMAP_DMA_CMT_APE_RV_CHAN_4 47 | ||
73 | #define OMAP_DMA_CMT_APE_TX_CHAN_5 48 | ||
74 | #define OMAP_DMA_CMT_APE_RV_CHAN_5 49 | ||
75 | #define OMAP_DMA_CMT_APE_TX_CHAN_6 50 | ||
76 | #define OMAP_DMA_CMT_APE_RV_CHAN_6 51 | ||
77 | #define OMAP_DMA_CMT_APE_TX_CHAN_7 52 | ||
78 | #define OMAP_DMA_CMT_APE_RV_CHAN_7 53 | ||
79 | #define OMAP_DMA_MMC2_TX 54 | 39 | #define OMAP_DMA_MMC2_TX 54 |
80 | #define OMAP_DMA_MMC2_RX 55 | 40 | #define OMAP_DMA_MMC2_RX 55 |
81 | #define OMAP_DMA_CRYPTO_DES_OUT 56 | ||
82 | 41 | ||
83 | #endif /* __OMAP1_DMA_CHANNEL_H */ | 42 | #endif /* __OMAP1_DMA_CHANNEL_H */ |
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 7a7690ab6cb8..dd712f109738 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -37,12 +37,14 @@ | |||
37 | 37 | ||
38 | #include <linux/suspend.h> | 38 | #include <linux/suspend.h> |
39 | #include <linux/sched.h> | 39 | #include <linux/sched.h> |
40 | #include <linux/proc_fs.h> | 40 | #include <linux/debugfs.h> |
41 | #include <linux/seq_file.h> | ||
41 | #include <linux/interrupt.h> | 42 | #include <linux/interrupt.h> |
42 | #include <linux/sysfs.h> | 43 | #include <linux/sysfs.h> |
43 | #include <linux/module.h> | 44 | #include <linux/module.h> |
44 | #include <linux/io.h> | 45 | #include <linux/io.h> |
45 | #include <linux/atomic.h> | 46 | #include <linux/atomic.h> |
47 | #include <linux/cpu.h> | ||
46 | 48 | ||
47 | #include <asm/fncpy.h> | 49 | #include <asm/fncpy.h> |
48 | #include <asm/system_misc.h> | 50 | #include <asm/system_misc.h> |
@@ -422,23 +424,12 @@ void omap1_pm_suspend(void) | |||
422 | omap_rev()); | 424 | omap_rev()); |
423 | } | 425 | } |
424 | 426 | ||
425 | #if defined(DEBUG) && defined(CONFIG_PROC_FS) | 427 | #ifdef CONFIG_DEBUG_FS |
426 | static int g_read_completed; | ||
427 | |||
428 | /* | 428 | /* |
429 | * Read system PM registers for debugging | 429 | * Read system PM registers for debugging |
430 | */ | 430 | */ |
431 | static int omap_pm_read_proc( | 431 | static int omap_pm_debug_show(struct seq_file *m, void *v) |
432 | char *page_buffer, | ||
433 | char **my_first_byte, | ||
434 | off_t virtual_start, | ||
435 | int length, | ||
436 | int *eof, | ||
437 | void *data) | ||
438 | { | 432 | { |
439 | int my_buffer_offset = 0; | ||
440 | char * const my_base = page_buffer; | ||
441 | |||
442 | ARM_SAVE(ARM_CKCTL); | 433 | ARM_SAVE(ARM_CKCTL); |
443 | ARM_SAVE(ARM_IDLECT1); | 434 | ARM_SAVE(ARM_IDLECT1); |
444 | ARM_SAVE(ARM_IDLECT2); | 435 | ARM_SAVE(ARM_IDLECT2); |
@@ -479,10 +470,7 @@ static int omap_pm_read_proc( | |||
479 | MPUI1610_SAVE(EMIFS_CONFIG); | 470 | MPUI1610_SAVE(EMIFS_CONFIG); |
480 | } | 471 | } |
481 | 472 | ||
482 | if (virtual_start == 0) { | 473 | seq_printf(m, |
483 | g_read_completed = 0; | ||
484 | |||
485 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | ||
486 | "ARM_CKCTL_REG: 0x%-8x \n" | 474 | "ARM_CKCTL_REG: 0x%-8x \n" |
487 | "ARM_IDLECT1_REG: 0x%-8x \n" | 475 | "ARM_IDLECT1_REG: 0x%-8x \n" |
488 | "ARM_IDLECT2_REG: 0x%-8x \n" | 476 | "ARM_IDLECT2_REG: 0x%-8x \n" |
@@ -512,8 +500,8 @@ static int omap_pm_read_proc( | |||
512 | ULPD_SHOW(ULPD_STATUS_REQ), | 500 | ULPD_SHOW(ULPD_STATUS_REQ), |
513 | ULPD_SHOW(ULPD_POWER_CTRL)); | 501 | ULPD_SHOW(ULPD_POWER_CTRL)); |
514 | 502 | ||
515 | if (cpu_is_omap7xx()) { | 503 | if (cpu_is_omap7xx()) { |
516 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | 504 | seq_printf(m, |
517 | "MPUI7XX_CTRL_REG 0x%-8x \n" | 505 | "MPUI7XX_CTRL_REG 0x%-8x \n" |
518 | "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n" | 506 | "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n" |
519 | "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n" | 507 | "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n" |
@@ -526,8 +514,8 @@ static int omap_pm_read_proc( | |||
526 | MPUI7XX_SHOW(MPUI_DSP_API_CONFIG), | 514 | MPUI7XX_SHOW(MPUI_DSP_API_CONFIG), |
527 | MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG), | 515 | MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG), |
528 | MPUI7XX_SHOW(EMIFS_CONFIG)); | 516 | MPUI7XX_SHOW(EMIFS_CONFIG)); |
529 | } else if (cpu_is_omap15xx()) { | 517 | } else if (cpu_is_omap15xx()) { |
530 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | 518 | seq_printf(m, |
531 | "MPUI1510_CTRL_REG 0x%-8x \n" | 519 | "MPUI1510_CTRL_REG 0x%-8x \n" |
532 | "MPUI1510_DSP_STATUS_REG: 0x%-8x \n" | 520 | "MPUI1510_DSP_STATUS_REG: 0x%-8x \n" |
533 | "MPUI1510_DSP_BOOT_CONFIG_REG: 0x%-8x \n" | 521 | "MPUI1510_DSP_BOOT_CONFIG_REG: 0x%-8x \n" |
@@ -540,8 +528,8 @@ static int omap_pm_read_proc( | |||
540 | MPUI1510_SHOW(MPUI_DSP_API_CONFIG), | 528 | MPUI1510_SHOW(MPUI_DSP_API_CONFIG), |
541 | MPUI1510_SHOW(EMIFF_SDRAM_CONFIG), | 529 | MPUI1510_SHOW(EMIFF_SDRAM_CONFIG), |
542 | MPUI1510_SHOW(EMIFS_CONFIG)); | 530 | MPUI1510_SHOW(EMIFS_CONFIG)); |
543 | } else if (cpu_is_omap16xx()) { | 531 | } else if (cpu_is_omap16xx()) { |
544 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | 532 | seq_printf(m, |
545 | "MPUI1610_CTRL_REG 0x%-8x \n" | 533 | "MPUI1610_CTRL_REG 0x%-8x \n" |
546 | "MPUI1610_DSP_STATUS_REG: 0x%-8x \n" | 534 | "MPUI1610_DSP_STATUS_REG: 0x%-8x \n" |
547 | "MPUI1610_DSP_BOOT_CONFIG_REG: 0x%-8x \n" | 535 | "MPUI1610_DSP_BOOT_CONFIG_REG: 0x%-8x \n" |
@@ -554,28 +542,37 @@ static int omap_pm_read_proc( | |||
554 | MPUI1610_SHOW(MPUI_DSP_API_CONFIG), | 542 | MPUI1610_SHOW(MPUI_DSP_API_CONFIG), |
555 | MPUI1610_SHOW(EMIFF_SDRAM_CONFIG), | 543 | MPUI1610_SHOW(EMIFF_SDRAM_CONFIG), |
556 | MPUI1610_SHOW(EMIFS_CONFIG)); | 544 | MPUI1610_SHOW(EMIFS_CONFIG)); |
557 | } | ||
558 | |||
559 | g_read_completed++; | ||
560 | } else if (g_read_completed >= 1) { | ||
561 | *eof = 1; | ||
562 | return 0; | ||
563 | } | 545 | } |
564 | g_read_completed++; | ||
565 | 546 | ||
566 | *my_first_byte = page_buffer; | 547 | return 0; |
567 | return my_buffer_offset; | ||
568 | } | 548 | } |
569 | 549 | ||
570 | static void omap_pm_init_proc(void) | 550 | static int omap_pm_debug_open(struct inode *inode, struct file *file) |
571 | { | 551 | { |
572 | /* XXX Appears to leak memory */ | 552 | return single_open(file, omap_pm_debug_show, |
573 | create_proc_read_entry("driver/omap_pm", | 553 | &inode->i_private); |
574 | S_IWUSR | S_IRUGO, NULL, | ||
575 | omap_pm_read_proc, NULL); | ||
576 | } | 554 | } |
577 | 555 | ||
578 | #endif /* DEBUG && CONFIG_PROC_FS */ | 556 | static const struct file_operations omap_pm_debug_fops = { |
557 | .open = omap_pm_debug_open, | ||
558 | .read = seq_read, | ||
559 | .llseek = seq_lseek, | ||
560 | .release = seq_release, | ||
561 | }; | ||
562 | |||
563 | static void omap_pm_init_debugfs(void) | ||
564 | { | ||
565 | struct dentry *d; | ||
566 | |||
567 | d = debugfs_create_dir("pm_debug", NULL); | ||
568 | if (!d) | ||
569 | return; | ||
570 | |||
571 | (void) debugfs_create_file("omap_pm", S_IWUSR | S_IRUGO, | ||
572 | d, NULL, &omap_pm_debug_fops); | ||
573 | } | ||
574 | |||
575 | #endif /* CONFIG_DEBUG_FS */ | ||
579 | 576 | ||
580 | /* | 577 | /* |
581 | * omap_pm_prepare - Do preliminary suspend work. | 578 | * omap_pm_prepare - Do preliminary suspend work. |
@@ -584,8 +581,7 @@ static void omap_pm_init_proc(void) | |||
584 | static int omap_pm_prepare(void) | 581 | static int omap_pm_prepare(void) |
585 | { | 582 | { |
586 | /* We cannot sleep in idle until we have resumed */ | 583 | /* We cannot sleep in idle until we have resumed */ |
587 | disable_hlt(); | 584 | cpu_idle_poll_ctrl(true); |
588 | |||
589 | return 0; | 585 | return 0; |
590 | } | 586 | } |
591 | 587 | ||
@@ -621,7 +617,7 @@ static int omap_pm_enter(suspend_state_t state) | |||
621 | 617 | ||
622 | static void omap_pm_finish(void) | 618 | static void omap_pm_finish(void) |
623 | { | 619 | { |
624 | enable_hlt(); | 620 | cpu_idle_poll_ctrl(false); |
625 | } | 621 | } |
626 | 622 | ||
627 | 623 | ||
@@ -701,8 +697,8 @@ static int __init omap_pm_init(void) | |||
701 | 697 | ||
702 | suspend_set_ops(&omap_pm_ops); | 698 | suspend_set_ops(&omap_pm_ops); |
703 | 699 | ||
704 | #if defined(DEBUG) && defined(CONFIG_PROC_FS) | 700 | #ifdef CONFIG_DEBUG_FS |
705 | omap_pm_init_proc(); | 701 | omap_pm_init_debugfs(); |
706 | #endif | 702 | #endif |
707 | 703 | ||
708 | #ifdef CONFIG_OMAP_32K_TIMER | 704 | #ifdef CONFIG_OMAP_32K_TIMER |