diff options
Diffstat (limited to 'arch/arm/mach-omap1/pm.c')
-rw-r--r-- | arch/arm/mach-omap1/pm.c | 114 |
1 files changed, 57 insertions, 57 deletions
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 5218943c91c0..b1d3f9fade23 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -48,21 +48,21 @@ | |||
48 | #include <asm/mach/time.h> | 48 | #include <asm/mach/time.h> |
49 | #include <asm/mach/irq.h> | 49 | #include <asm/mach/irq.h> |
50 | 50 | ||
51 | #include <mach/cpu.h> | 51 | #include <plat/cpu.h> |
52 | #include <mach/irqs.h> | 52 | #include <mach/irqs.h> |
53 | #include <mach/clock.h> | 53 | #include <plat/clock.h> |
54 | #include <mach/sram.h> | 54 | #include <plat/sram.h> |
55 | #include <mach/tc.h> | 55 | #include <plat/tc.h> |
56 | #include <mach/mux.h> | 56 | #include <plat/mux.h> |
57 | #include <mach/dma.h> | 57 | #include <plat/dma.h> |
58 | #include <mach/dmtimer.h> | 58 | #include <plat/dmtimer.h> |
59 | 59 | ||
60 | #include "pm.h" | 60 | #include "pm.h" |
61 | 61 | ||
62 | static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; | 62 | static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; |
63 | static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; | 63 | static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE]; |
64 | static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; | 64 | static unsigned short ulpd_sleep_save[ULPD_SLEEP_SAVE_SIZE]; |
65 | static unsigned int mpui730_sleep_save[MPUI730_SLEEP_SAVE_SIZE]; | 65 | static unsigned int mpui7xx_sleep_save[MPUI7XX_SLEEP_SAVE_SIZE]; |
66 | static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; | 66 | static unsigned int mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_SIZE]; |
67 | static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; | 67 | static unsigned int mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_SIZE]; |
68 | 68 | ||
@@ -183,9 +183,9 @@ static void omap_pm_wakeup_setup(void) | |||
183 | * drivers must still separately call omap_set_gpio_wakeup() to | 183 | * drivers must still separately call omap_set_gpio_wakeup() to |
184 | * wake up to a GPIO interrupt. | 184 | * wake up to a GPIO interrupt. |
185 | */ | 185 | */ |
186 | if (cpu_is_omap730()) | 186 | if (cpu_is_omap7xx()) |
187 | level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) | | 187 | level1_wake = OMAP_IRQ_BIT(INT_7XX_GPIO_BANK1) | |
188 | OMAP_IRQ_BIT(INT_730_IH2_IRQ); | 188 | OMAP_IRQ_BIT(INT_7XX_IH2_IRQ); |
189 | else if (cpu_is_omap15xx()) | 189 | else if (cpu_is_omap15xx()) |
190 | level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | | 190 | level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | |
191 | OMAP_IRQ_BIT(INT_1510_IH2_IRQ); | 191 | OMAP_IRQ_BIT(INT_1510_IH2_IRQ); |
@@ -195,10 +195,10 @@ static void omap_pm_wakeup_setup(void) | |||
195 | 195 | ||
196 | omap_writel(~level1_wake, OMAP_IH1_MIR); | 196 | omap_writel(~level1_wake, OMAP_IH1_MIR); |
197 | 197 | ||
198 | if (cpu_is_omap730()) { | 198 | if (cpu_is_omap7xx()) { |
199 | omap_writel(~level2_wake, OMAP_IH2_0_MIR); | 199 | omap_writel(~level2_wake, OMAP_IH2_0_MIR); |
200 | omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) | | 200 | omap_writel(~(OMAP_IRQ_BIT(INT_7XX_WAKE_UP_REQ) | |
201 | OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)), | 201 | OMAP_IRQ_BIT(INT_7XX_MPUIO_KEYPAD)), |
202 | OMAP_IH2_1_MIR); | 202 | OMAP_IH2_1_MIR); |
203 | } else if (cpu_is_omap15xx()) { | 203 | } else if (cpu_is_omap15xx()) { |
204 | level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); | 204 | level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); |
@@ -253,15 +253,15 @@ void omap1_pm_suspend(void) | |||
253 | * Save interrupt, MPUI, ARM and UPLD control registers. | 253 | * Save interrupt, MPUI, ARM and UPLD control registers. |
254 | */ | 254 | */ |
255 | 255 | ||
256 | if (cpu_is_omap730()) { | 256 | if (cpu_is_omap7xx()) { |
257 | MPUI730_SAVE(OMAP_IH1_MIR); | 257 | MPUI7XX_SAVE(OMAP_IH1_MIR); |
258 | MPUI730_SAVE(OMAP_IH2_0_MIR); | 258 | MPUI7XX_SAVE(OMAP_IH2_0_MIR); |
259 | MPUI730_SAVE(OMAP_IH2_1_MIR); | 259 | MPUI7XX_SAVE(OMAP_IH2_1_MIR); |
260 | MPUI730_SAVE(MPUI_CTRL); | 260 | MPUI7XX_SAVE(MPUI_CTRL); |
261 | MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); | 261 | MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); |
262 | MPUI730_SAVE(MPUI_DSP_API_CONFIG); | 262 | MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); |
263 | MPUI730_SAVE(EMIFS_CONFIG); | 263 | MPUI7XX_SAVE(EMIFS_CONFIG); |
264 | MPUI730_SAVE(EMIFF_SDRAM_CONFIG); | 264 | MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); |
265 | 265 | ||
266 | } else if (cpu_is_omap15xx()) { | 266 | } else if (cpu_is_omap15xx()) { |
267 | MPUI1510_SAVE(OMAP_IH1_MIR); | 267 | MPUI1510_SAVE(OMAP_IH1_MIR); |
@@ -306,7 +306,7 @@ void omap1_pm_suspend(void) | |||
306 | omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); | 306 | omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); |
307 | 307 | ||
308 | /* shut down dsp_ck */ | 308 | /* shut down dsp_ck */ |
309 | if (!cpu_is_omap730()) | 309 | if (!cpu_is_omap7xx()) |
310 | omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); | 310 | omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); |
311 | 311 | ||
312 | /* temporarily enabling api_ck to access DSP registers */ | 312 | /* temporarily enabling api_ck to access DSP registers */ |
@@ -383,12 +383,12 @@ void omap1_pm_suspend(void) | |||
383 | ULPD_RESTORE(ULPD_CLOCK_CTRL); | 383 | ULPD_RESTORE(ULPD_CLOCK_CTRL); |
384 | ULPD_RESTORE(ULPD_STATUS_REQ); | 384 | ULPD_RESTORE(ULPD_STATUS_REQ); |
385 | 385 | ||
386 | if (cpu_is_omap730()) { | 386 | if (cpu_is_omap7xx()) { |
387 | MPUI730_RESTORE(EMIFS_CONFIG); | 387 | MPUI7XX_RESTORE(EMIFS_CONFIG); |
388 | MPUI730_RESTORE(EMIFF_SDRAM_CONFIG); | 388 | MPUI7XX_RESTORE(EMIFF_SDRAM_CONFIG); |
389 | MPUI730_RESTORE(OMAP_IH1_MIR); | 389 | MPUI7XX_RESTORE(OMAP_IH1_MIR); |
390 | MPUI730_RESTORE(OMAP_IH2_0_MIR); | 390 | MPUI7XX_RESTORE(OMAP_IH2_0_MIR); |
391 | MPUI730_RESTORE(OMAP_IH2_1_MIR); | 391 | MPUI7XX_RESTORE(OMAP_IH2_1_MIR); |
392 | } else if (cpu_is_omap15xx()) { | 392 | } else if (cpu_is_omap15xx()) { |
393 | MPUI1510_RESTORE(MPUI_CTRL); | 393 | MPUI1510_RESTORE(MPUI_CTRL); |
394 | MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); | 394 | MPUI1510_RESTORE(MPUI_DSP_BOOT_CONFIG); |
@@ -461,13 +461,13 @@ static int omap_pm_read_proc( | |||
461 | ULPD_SAVE(ULPD_DPLL_CTRL); | 461 | ULPD_SAVE(ULPD_DPLL_CTRL); |
462 | ULPD_SAVE(ULPD_POWER_CTRL); | 462 | ULPD_SAVE(ULPD_POWER_CTRL); |
463 | 463 | ||
464 | if (cpu_is_omap730()) { | 464 | if (cpu_is_omap7xx()) { |
465 | MPUI730_SAVE(MPUI_CTRL); | 465 | MPUI7XX_SAVE(MPUI_CTRL); |
466 | MPUI730_SAVE(MPUI_DSP_STATUS); | 466 | MPUI7XX_SAVE(MPUI_DSP_STATUS); |
467 | MPUI730_SAVE(MPUI_DSP_BOOT_CONFIG); | 467 | MPUI7XX_SAVE(MPUI_DSP_BOOT_CONFIG); |
468 | MPUI730_SAVE(MPUI_DSP_API_CONFIG); | 468 | MPUI7XX_SAVE(MPUI_DSP_API_CONFIG); |
469 | MPUI730_SAVE(EMIFF_SDRAM_CONFIG); | 469 | MPUI7XX_SAVE(EMIFF_SDRAM_CONFIG); |
470 | MPUI730_SAVE(EMIFS_CONFIG); | 470 | MPUI7XX_SAVE(EMIFS_CONFIG); |
471 | } else if (cpu_is_omap15xx()) { | 471 | } else if (cpu_is_omap15xx()) { |
472 | MPUI1510_SAVE(MPUI_CTRL); | 472 | MPUI1510_SAVE(MPUI_CTRL); |
473 | MPUI1510_SAVE(MPUI_DSP_STATUS); | 473 | MPUI1510_SAVE(MPUI_DSP_STATUS); |
@@ -517,20 +517,20 @@ static int omap_pm_read_proc( | |||
517 | ULPD_SHOW(ULPD_STATUS_REQ), | 517 | ULPD_SHOW(ULPD_STATUS_REQ), |
518 | ULPD_SHOW(ULPD_POWER_CTRL)); | 518 | ULPD_SHOW(ULPD_POWER_CTRL)); |
519 | 519 | ||
520 | if (cpu_is_omap730()) { | 520 | if (cpu_is_omap7xx()) { |
521 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | 521 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
522 | "MPUI730_CTRL_REG 0x%-8x \n" | 522 | "MPUI7XX_CTRL_REG 0x%-8x \n" |
523 | "MPUI730_DSP_STATUS_REG: 0x%-8x \n" | 523 | "MPUI7XX_DSP_STATUS_REG: 0x%-8x \n" |
524 | "MPUI730_DSP_BOOT_CONFIG_REG: 0x%-8x \n" | 524 | "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n" |
525 | "MPUI730_DSP_API_CONFIG_REG: 0x%-8x \n" | 525 | "MPUI7XX_DSP_API_CONFIG_REG: 0x%-8x \n" |
526 | "MPUI730_SDRAM_CONFIG_REG: 0x%-8x \n" | 526 | "MPUI7XX_SDRAM_CONFIG_REG: 0x%-8x \n" |
527 | "MPUI730_EMIFS_CONFIG_REG: 0x%-8x \n", | 527 | "MPUI7XX_EMIFS_CONFIG_REG: 0x%-8x \n", |
528 | MPUI730_SHOW(MPUI_CTRL), | 528 | MPUI7XX_SHOW(MPUI_CTRL), |
529 | MPUI730_SHOW(MPUI_DSP_STATUS), | 529 | MPUI7XX_SHOW(MPUI_DSP_STATUS), |
530 | MPUI730_SHOW(MPUI_DSP_BOOT_CONFIG), | 530 | MPUI7XX_SHOW(MPUI_DSP_BOOT_CONFIG), |
531 | MPUI730_SHOW(MPUI_DSP_API_CONFIG), | 531 | MPUI7XX_SHOW(MPUI_DSP_API_CONFIG), |
532 | MPUI730_SHOW(EMIFF_SDRAM_CONFIG), | 532 | MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG), |
533 | MPUI730_SHOW(EMIFS_CONFIG)); | 533 | MPUI7XX_SHOW(EMIFS_CONFIG)); |
534 | } else if (cpu_is_omap15xx()) { | 534 | } else if (cpu_is_omap15xx()) { |
535 | my_buffer_offset += sprintf(my_base + my_buffer_offset, | 535 | my_buffer_offset += sprintf(my_base + my_buffer_offset, |
536 | "MPUI1510_CTRL_REG 0x%-8x \n" | 536 | "MPUI1510_CTRL_REG 0x%-8x \n" |
@@ -668,9 +668,9 @@ static int __init omap_pm_init(void) | |||
668 | * These routines need to be in SRAM as that's the only | 668 | * These routines need to be in SRAM as that's the only |
669 | * memory the MPU can see when it wakes up. | 669 | * memory the MPU can see when it wakes up. |
670 | */ | 670 | */ |
671 | if (cpu_is_omap730()) { | 671 | if (cpu_is_omap7xx()) { |
672 | omap_sram_suspend = omap_sram_push(omap730_cpu_suspend, | 672 | omap_sram_suspend = omap_sram_push(omap7xx_cpu_suspend, |
673 | omap730_cpu_suspend_sz); | 673 | omap7xx_cpu_suspend_sz); |
674 | } else if (cpu_is_omap15xx()) { | 674 | } else if (cpu_is_omap15xx()) { |
675 | omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, | 675 | omap_sram_suspend = omap_sram_push(omap1510_cpu_suspend, |
676 | omap1510_cpu_suspend_sz); | 676 | omap1510_cpu_suspend_sz); |
@@ -686,8 +686,8 @@ static int __init omap_pm_init(void) | |||
686 | 686 | ||
687 | pm_idle = omap1_pm_idle; | 687 | pm_idle = omap1_pm_idle; |
688 | 688 | ||
689 | if (cpu_is_omap730()) | 689 | if (cpu_is_omap7xx()) |
690 | setup_irq(INT_730_WAKE_UP_REQ, &omap_wakeup_irq); | 690 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); |
691 | else if (cpu_is_omap16xx()) | 691 | else if (cpu_is_omap16xx()) |
692 | setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq); | 692 | setup_irq(INT_1610_WAKE_UP_REQ, &omap_wakeup_irq); |
693 | 693 | ||
@@ -700,8 +700,8 @@ static int __init omap_pm_init(void) | |||
700 | omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL); | 700 | omap_writew(ULPD_POWER_CTRL_REG_VAL, ULPD_POWER_CTRL); |
701 | 701 | ||
702 | /* Configure IDLECT3 */ | 702 | /* Configure IDLECT3 */ |
703 | if (cpu_is_omap730()) | 703 | if (cpu_is_omap7xx()) |
704 | omap_writel(OMAP730_IDLECT3_VAL, OMAP730_IDLECT3); | 704 | omap_writel(OMAP7XX_IDLECT3_VAL, OMAP7XX_IDLECT3); |
705 | else if (cpu_is_omap16xx()) | 705 | else if (cpu_is_omap16xx()) |
706 | omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); | 706 | omap_writel(OMAP1610_IDLECT3_VAL, OMAP1610_IDLECT3); |
707 | 707 | ||