diff options
Diffstat (limited to 'arch/arm/mach-omap1/clock.h')
| -rw-r--r-- | arch/arm/mach-omap1/clock.h | 35 |
1 files changed, 26 insertions, 9 deletions
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index f7df00205c4a..6eadf72828d8 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h | |||
| @@ -17,6 +17,8 @@ static int omap1_clk_enable_generic(struct clk * clk); | |||
| 17 | static void omap1_clk_disable_generic(struct clk * clk); | 17 | static void omap1_clk_disable_generic(struct clk * clk); |
| 18 | static void omap1_ckctl_recalc(struct clk * clk); | 18 | static void omap1_ckctl_recalc(struct clk * clk); |
| 19 | static void omap1_watchdog_recalc(struct clk * clk); | 19 | static void omap1_watchdog_recalc(struct clk * clk); |
| 20 | static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); | ||
| 21 | static void omap1_sossi_recalc(struct clk *clk); | ||
| 20 | static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); | 22 | static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); |
| 21 | static int omap1_clk_enable_dsp_domain(struct clk * clk); | 23 | static int omap1_clk_enable_dsp_domain(struct clk * clk); |
| 22 | static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate); | 24 | static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate); |
| @@ -168,9 +170,10 @@ static struct clk ck_dpll1 = { | |||
| 168 | 170 | ||
| 169 | static struct arm_idlect1_clk ck_dpll1out = { | 171 | static struct arm_idlect1_clk ck_dpll1out = { |
| 170 | .clk = { | 172 | .clk = { |
| 171 | .name = "ck_dpll1out", | 173 | .name = "ck_dpll1out", |
| 172 | .parent = &ck_dpll1, | 174 | .parent = &ck_dpll1, |
| 173 | .flags = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL, | 175 | .flags = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL | |
| 176 | ENABLE_REG_32BIT | RATE_PROPAGATES, | ||
| 174 | .enable_reg = (void __iomem *)ARM_IDLECT2, | 177 | .enable_reg = (void __iomem *)ARM_IDLECT2, |
| 175 | .enable_bit = EN_CKOUT_ARM, | 178 | .enable_bit = EN_CKOUT_ARM, |
| 176 | .recalc = &followparent_recalc, | 179 | .recalc = &followparent_recalc, |
| @@ -180,6 +183,19 @@ static struct arm_idlect1_clk ck_dpll1out = { | |||
| 180 | .idlect_shift = 12, | 183 | .idlect_shift = 12, |
| 181 | }; | 184 | }; |
| 182 | 185 | ||
| 186 | static struct clk sossi_ck = { | ||
| 187 | .name = "ck_sossi", | ||
| 188 | .parent = &ck_dpll1out.clk, | ||
| 189 | .flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT | | ||
| 190 | ENABLE_REG_32BIT, | ||
| 191 | .enable_reg = (void __iomem *)MOD_CONF_CTRL_1, | ||
| 192 | .enable_bit = 16, | ||
| 193 | .recalc = &omap1_sossi_recalc, | ||
| 194 | .set_rate = &omap1_set_sossi_rate, | ||
| 195 | .enable = &omap1_clk_enable_generic, | ||
| 196 | .disable = &omap1_clk_disable_generic, | ||
| 197 | }; | ||
| 198 | |||
| 183 | static struct clk arm_ck = { | 199 | static struct clk arm_ck = { |
| 184 | .name = "arm_ck", | 200 | .name = "arm_ck", |
| 185 | .parent = &ck_dpll1, | 201 | .parent = &ck_dpll1, |
| @@ -282,7 +298,7 @@ static struct clk arminth_ck16xx = { | |||
| 282 | static struct clk dsp_ck = { | 298 | static struct clk dsp_ck = { |
| 283 | .name = "dsp_ck", | 299 | .name = "dsp_ck", |
| 284 | .parent = &ck_dpll1, | 300 | .parent = &ck_dpll1, |
| 285 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 301 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 286 | RATE_CKCTL, | 302 | RATE_CKCTL, |
| 287 | .enable_reg = (void __iomem *)ARM_CKCTL, | 303 | .enable_reg = (void __iomem *)ARM_CKCTL, |
| 288 | .enable_bit = EN_DSPCK, | 304 | .enable_bit = EN_DSPCK, |
| @@ -295,7 +311,7 @@ static struct clk dsp_ck = { | |||
| 295 | static struct clk dspmmu_ck = { | 311 | static struct clk dspmmu_ck = { |
| 296 | .name = "dspmmu_ck", | 312 | .name = "dspmmu_ck", |
| 297 | .parent = &ck_dpll1, | 313 | .parent = &ck_dpll1, |
| 298 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 314 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 299 | RATE_CKCTL | ALWAYS_ENABLED, | 315 | RATE_CKCTL | ALWAYS_ENABLED, |
| 300 | .rate_offset = CKCTL_DSPMMUDIV_OFFSET, | 316 | .rate_offset = CKCTL_DSPMMUDIV_OFFSET, |
| 301 | .recalc = &omap1_ckctl_recalc, | 317 | .recalc = &omap1_ckctl_recalc, |
| @@ -306,7 +322,7 @@ static struct clk dspmmu_ck = { | |||
| 306 | static struct clk dspper_ck = { | 322 | static struct clk dspper_ck = { |
| 307 | .name = "dspper_ck", | 323 | .name = "dspper_ck", |
| 308 | .parent = &ck_dpll1, | 324 | .parent = &ck_dpll1, |
| 309 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 325 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 310 | RATE_CKCTL | VIRTUAL_IO_ADDRESS, | 326 | RATE_CKCTL | VIRTUAL_IO_ADDRESS, |
| 311 | .enable_reg = (void __iomem *)DSP_IDLECT2, | 327 | .enable_reg = (void __iomem *)DSP_IDLECT2, |
| 312 | .enable_bit = EN_PERCK, | 328 | .enable_bit = EN_PERCK, |
| @@ -320,7 +336,7 @@ static struct clk dspper_ck = { | |||
| 320 | static struct clk dspxor_ck = { | 336 | static struct clk dspxor_ck = { |
| 321 | .name = "dspxor_ck", | 337 | .name = "dspxor_ck", |
| 322 | .parent = &ck_ref, | 338 | .parent = &ck_ref, |
| 323 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 339 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 324 | VIRTUAL_IO_ADDRESS, | 340 | VIRTUAL_IO_ADDRESS, |
| 325 | .enable_reg = (void __iomem *)DSP_IDLECT2, | 341 | .enable_reg = (void __iomem *)DSP_IDLECT2, |
| 326 | .enable_bit = EN_XORPCK, | 342 | .enable_bit = EN_XORPCK, |
| @@ -332,7 +348,7 @@ static struct clk dspxor_ck = { | |||
| 332 | static struct clk dsptim_ck = { | 348 | static struct clk dsptim_ck = { |
| 333 | .name = "dsptim_ck", | 349 | .name = "dsptim_ck", |
| 334 | .parent = &ck_ref, | 350 | .parent = &ck_ref, |
| 335 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 351 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 336 | VIRTUAL_IO_ADDRESS, | 352 | VIRTUAL_IO_ADDRESS, |
| 337 | .enable_reg = (void __iomem *)DSP_IDLECT2, | 353 | .enable_reg = (void __iomem *)DSP_IDLECT2, |
| 338 | .enable_bit = EN_DSPTIMCK, | 354 | .enable_bit = EN_DSPTIMCK, |
| @@ -374,7 +390,7 @@ static struct clk arminth_ck1510 = { | |||
| 374 | 390 | ||
| 375 | static struct clk tipb_ck = { | 391 | static struct clk tipb_ck = { |
| 376 | /* No-idle controlled by "tc_ck" */ | 392 | /* No-idle controlled by "tc_ck" */ |
| 377 | .name = "tibp_ck", | 393 | .name = "tipb_ck", |
| 378 | .parent = &tc_ck.clk, | 394 | .parent = &tc_ck.clk, |
| 379 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | | 395 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | |
| 380 | ALWAYS_ENABLED, | 396 | ALWAYS_ENABLED, |
| @@ -733,7 +749,7 @@ remains active during MPU idle whenever this is enabled */ | |||
| 733 | static struct clk i2c_fck = { | 749 | static struct clk i2c_fck = { |
| 734 | .name = "i2c_fck", | 750 | .name = "i2c_fck", |
| 735 | .id = 1, | 751 | .id = 1, |
| 736 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | | 752 | .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | |
| 737 | VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | | 753 | VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | |
| 738 | ALWAYS_ENABLED, | 754 | ALWAYS_ENABLED, |
| 739 | .parent = &armxor_ck.clk, | 755 | .parent = &armxor_ck.clk, |
| @@ -760,6 +776,7 @@ static struct clk * onchip_clks[] = { | |||
| 760 | &ck_dpll1, | 776 | &ck_dpll1, |
| 761 | /* CK_GEN1 clocks */ | 777 | /* CK_GEN1 clocks */ |
| 762 | &ck_dpll1out.clk, | 778 | &ck_dpll1out.clk, |
| 779 | &sossi_ck, | ||
| 763 | &arm_ck, | 780 | &arm_ck, |
| 764 | &armper_ck.clk, | 781 | &armper_ck.clk, |
| 765 | &arm_gpio_ck, | 782 | &arm_gpio_ck, |
