diff options
Diffstat (limited to 'arch/arm/mach-omap1/clock.c')
-rw-r--r-- | arch/arm/mach-omap1/clock.c | 32 |
1 files changed, 12 insertions, 20 deletions
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index ccf989f4aa7d..dafe4f71d15f 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -156,27 +156,25 @@ __u32 arm_idlect1_mask; | |||
156 | * Omap1 specific clock functions | 156 | * Omap1 specific clock functions |
157 | *-------------------------------------------------------------------------*/ | 157 | *-------------------------------------------------------------------------*/ |
158 | 158 | ||
159 | static void omap1_watchdog_recalc(struct clk * clk) | 159 | static unsigned long omap1_watchdog_recalc(struct clk *clk) |
160 | { | 160 | { |
161 | clk->rate = clk->parent->rate / 14; | 161 | return clk->parent->rate / 14; |
162 | } | 162 | } |
163 | 163 | ||
164 | static void omap1_uart_recalc(struct clk * clk) | 164 | static unsigned long omap1_uart_recalc(struct clk *clk) |
165 | { | 165 | { |
166 | unsigned int val = __raw_readl(clk->enable_reg); | 166 | unsigned int val = __raw_readl(clk->enable_reg); |
167 | if (val & clk->enable_bit) | 167 | return val & clk->enable_bit ? 48000000 : 12000000; |
168 | clk->rate = 48000000; | ||
169 | else | ||
170 | clk->rate = 12000000; | ||
171 | } | 168 | } |
172 | 169 | ||
173 | static void omap1_sossi_recalc(struct clk *clk) | 170 | static unsigned long omap1_sossi_recalc(struct clk *clk) |
174 | { | 171 | { |
175 | u32 div = omap_readl(MOD_CONF_CTRL_1); | 172 | u32 div = omap_readl(MOD_CONF_CTRL_1); |
176 | 173 | ||
177 | div = (div >> 17) & 0x7; | 174 | div = (div >> 17) & 0x7; |
178 | div++; | 175 | div++; |
179 | clk->rate = clk->parent->rate / div; | 176 | |
177 | return clk->parent->rate / div; | ||
180 | } | 178 | } |
181 | 179 | ||
182 | static int omap1_clk_enable_dsp_domain(struct clk *clk) | 180 | static int omap1_clk_enable_dsp_domain(struct clk *clk) |
@@ -344,19 +342,15 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) | |||
344 | return dsor_exp; | 342 | return dsor_exp; |
345 | } | 343 | } |
346 | 344 | ||
347 | static void omap1_ckctl_recalc(struct clk * clk) | 345 | static unsigned long omap1_ckctl_recalc(struct clk *clk) |
348 | { | 346 | { |
349 | int dsor; | ||
350 | |||
351 | /* Calculate divisor encoded as 2-bit exponent */ | 347 | /* Calculate divisor encoded as 2-bit exponent */ |
352 | dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); | 348 | int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); |
353 | 349 | ||
354 | if (unlikely(clk->rate == clk->parent->rate / dsor)) | 350 | return clk->parent->rate / dsor; |
355 | return; /* No change, quick exit */ | ||
356 | clk->rate = clk->parent->rate / dsor; | ||
357 | } | 351 | } |
358 | 352 | ||
359 | static void omap1_ckctl_recalc_dsp_domain(struct clk * clk) | 353 | static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) |
360 | { | 354 | { |
361 | int dsor; | 355 | int dsor; |
362 | 356 | ||
@@ -371,9 +365,7 @@ static void omap1_ckctl_recalc_dsp_domain(struct clk * clk) | |||
371 | dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); | 365 | dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); |
372 | omap1_clk_disable(&api_ck.clk); | 366 | omap1_clk_disable(&api_ck.clk); |
373 | 367 | ||
374 | if (unlikely(clk->rate == clk->parent->rate / dsor)) | 368 | return clk->parent->rate / dsor; |
375 | return; /* No change, quick exit */ | ||
376 | clk->rate = clk->parent->rate / dsor; | ||
377 | } | 369 | } |
378 | 370 | ||
379 | /* MPU virtual clock functions */ | 371 | /* MPU virtual clock functions */ |