diff options
Diffstat (limited to 'arch/arm/mach-omap1/clock.c')
-rw-r--r-- | arch/arm/mach-omap1/clock.c | 38 |
1 files changed, 20 insertions, 18 deletions
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 436eed22801b..42cbe203da36 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -22,10 +22,10 @@ | |||
22 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
23 | #include <asm/clkdev.h> | 23 | #include <asm/clkdev.h> |
24 | 24 | ||
25 | #include <mach/cpu.h> | 25 | #include <plat/cpu.h> |
26 | #include <mach/usb.h> | 26 | #include <plat/usb.h> |
27 | #include <mach/clock.h> | 27 | #include <plat/clock.h> |
28 | #include <mach/sram.h> | 28 | #include <plat/sram.h> |
29 | 29 | ||
30 | static const struct clkops clkops_generic; | 30 | static const struct clkops clkops_generic; |
31 | static const struct clkops clkops_uart; | 31 | static const struct clkops clkops_uart; |
@@ -69,13 +69,13 @@ struct omap_clk { | |||
69 | } | 69 | } |
70 | 70 | ||
71 | #define CK_310 (1 << 0) | 71 | #define CK_310 (1 << 0) |
72 | #define CK_730 (1 << 1) | 72 | #define CK_7XX (1 << 1) |
73 | #define CK_1510 (1 << 2) | 73 | #define CK_1510 (1 << 2) |
74 | #define CK_16XX (1 << 3) | 74 | #define CK_16XX (1 << 3) |
75 | 75 | ||
76 | static struct omap_clk omap_clks[] = { | 76 | static struct omap_clk omap_clks[] = { |
77 | /* non-ULPD clocks */ | 77 | /* non-ULPD clocks */ |
78 | CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310), | 78 | CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
79 | CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), | 79 | CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), |
80 | /* CK_GEN1 clocks */ | 80 | /* CK_GEN1 clocks */ |
81 | CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), | 81 | CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), |
@@ -83,7 +83,7 @@ static struct omap_clk omap_clks[] = { | |||
83 | CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), | 83 | CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), |
84 | CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), | 84 | CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), |
85 | CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310), | 85 | CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310), |
86 | CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), | 86 | CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
87 | CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), | 87 | CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), |
88 | CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), | 88 | CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), |
89 | CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), | 89 | CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), |
@@ -97,9 +97,9 @@ static struct omap_clk omap_clks[] = { | |||
97 | CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), | 97 | CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), |
98 | CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), | 98 | CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), |
99 | /* CK_GEN3 clocks */ | 99 | /* CK_GEN3 clocks */ |
100 | CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_730), | 100 | CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
101 | CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), | 101 | CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), |
102 | CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX), | 102 | CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX | CK_7XX), |
103 | CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), | 103 | CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), |
104 | CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), | 104 | CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), |
105 | CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), | 105 | CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), |
@@ -108,7 +108,7 @@ static struct omap_clk omap_clks[] = { | |||
108 | CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), | 108 | CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), |
109 | CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), | 109 | CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), |
110 | CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), | 110 | CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), |
111 | CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_730), | 111 | CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_7XX), |
112 | CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), | 112 | CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), |
113 | /* ULPD clocks */ | 113 | /* ULPD clocks */ |
114 | CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), | 114 | CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), |
@@ -120,12 +120,14 @@ static struct omap_clk omap_clks[] = { | |||
120 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), | 120 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), |
121 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), | 121 | CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), |
122 | CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), | 122 | CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), |
123 | CLK(NULL, "usb_dc_ck", &usb_dc_ck7xx, CK_7XX), | ||
123 | CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), | 124 | CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), |
124 | CLK(NULL, "mclk", &mclk_16xx, CK_16XX), | 125 | CLK(NULL, "mclk", &mclk_16xx, CK_16XX), |
125 | CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), | 126 | CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), |
126 | CLK(NULL, "bclk", &bclk_16xx, CK_16XX), | 127 | CLK(NULL, "bclk", &bclk_16xx, CK_16XX), |
127 | CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), | 128 | CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), |
128 | CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), | 129 | CLK("mmci-omap.0", "fck", &mmc3_ck, CK_7XX), |
130 | CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), | ||
129 | CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), | 131 | CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), |
130 | CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), | 132 | CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), |
131 | /* Virtual clocks */ | 133 | /* Virtual clocks */ |
@@ -398,7 +400,7 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate) | |||
398 | * Reprogramming the DPLL is tricky, it must be done from SRAM. | 400 | * Reprogramming the DPLL is tricky, it must be done from SRAM. |
399 | * (on 730, bit 13 must always be 1) | 401 | * (on 730, bit 13 must always be 1) |
400 | */ | 402 | */ |
401 | if (cpu_is_omap730()) | 403 | if (cpu_is_omap7xx()) |
402 | omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000); | 404 | omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000); |
403 | else | 405 | else |
404 | omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); | 406 | omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); |
@@ -783,8 +785,8 @@ int __init omap1_clk_init(void) | |||
783 | cpu_mask |= CK_16XX; | 785 | cpu_mask |= CK_16XX; |
784 | if (cpu_is_omap1510()) | 786 | if (cpu_is_omap1510()) |
785 | cpu_mask |= CK_1510; | 787 | cpu_mask |= CK_1510; |
786 | if (cpu_is_omap730()) | 788 | if (cpu_is_omap7xx()) |
787 | cpu_mask |= CK_730; | 789 | cpu_mask |= CK_7XX; |
788 | if (cpu_is_omap310()) | 790 | if (cpu_is_omap310()) |
789 | cpu_mask |= CK_310; | 791 | cpu_mask |= CK_310; |
790 | 792 | ||
@@ -800,7 +802,7 @@ int __init omap1_clk_init(void) | |||
800 | crystal_type = info->system_clock_type; | 802 | crystal_type = info->system_clock_type; |
801 | } | 803 | } |
802 | 804 | ||
803 | #if defined(CONFIG_ARCH_OMAP730) | 805 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) |
804 | ck_ref.rate = 13000000; | 806 | ck_ref.rate = 13000000; |
805 | #elif defined(CONFIG_ARCH_OMAP16XX) | 807 | #elif defined(CONFIG_ARCH_OMAP16XX) |
806 | if (crystal_type == 2) | 808 | if (crystal_type == 2) |
@@ -847,7 +849,7 @@ int __init omap1_clk_init(void) | |||
847 | printk(KERN_ERR "System frequencies not set. Check your config.\n"); | 849 | printk(KERN_ERR "System frequencies not set. Check your config.\n"); |
848 | /* Guess sane values (60MHz) */ | 850 | /* Guess sane values (60MHz) */ |
849 | omap_writew(0x2290, DPLL_CTL); | 851 | omap_writew(0x2290, DPLL_CTL); |
850 | omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL); | 852 | omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL); |
851 | ck_dpll1.rate = 60000000; | 853 | ck_dpll1.rate = 60000000; |
852 | } | 854 | } |
853 | #endif | 855 | #endif |
@@ -862,7 +864,7 @@ int __init omap1_clk_init(void) | |||
862 | 864 | ||
863 | #if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE) | 865 | #if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE) |
864 | /* Select slicer output as OMAP input clock */ | 866 | /* Select slicer output as OMAP input clock */ |
865 | omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL); | 867 | omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1, OMAP7XX_PCC_UPLD_CTRL); |
866 | #endif | 868 | #endif |
867 | 869 | ||
868 | /* Amstrad Delta wants BCLK high when inactive */ | 870 | /* Amstrad Delta wants BCLK high when inactive */ |
@@ -873,7 +875,7 @@ int __init omap1_clk_init(void) | |||
873 | 875 | ||
874 | /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ | 876 | /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ |
875 | /* (on 730, bit 13 must not be cleared) */ | 877 | /* (on 730, bit 13 must not be cleared) */ |
876 | if (cpu_is_omap730()) | 878 | if (cpu_is_omap7xx()) |
877 | omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); | 879 | omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL); |
878 | else | 880 | else |
879 | omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); | 881 | omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); |