diff options
Diffstat (limited to 'arch/arm/mach-omap1/clock.c')
| -rw-r--r-- | arch/arm/mach-omap1/clock.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 9d862f86bba6..75110ba10424 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
| @@ -50,10 +50,10 @@ static int omap1_clk_enable_dsp_domain(struct clk *clk) | |||
| 50 | { | 50 | { |
| 51 | int retval; | 51 | int retval; |
| 52 | 52 | ||
| 53 | retval = omap1_clk_use(&api_ck.clk); | 53 | retval = omap1_clk_enable(&api_ck.clk); |
| 54 | if (!retval) { | 54 | if (!retval) { |
| 55 | retval = omap1_clk_enable(clk); | 55 | retval = omap1_clk_enable_generic(clk); |
| 56 | omap1_clk_unuse(&api_ck.clk); | 56 | omap1_clk_disable(&api_ck.clk); |
| 57 | } | 57 | } |
| 58 | 58 | ||
| 59 | return retval; | 59 | return retval; |
| @@ -61,9 +61,9 @@ static int omap1_clk_enable_dsp_domain(struct clk *clk) | |||
| 61 | 61 | ||
| 62 | static void omap1_clk_disable_dsp_domain(struct clk *clk) | 62 | static void omap1_clk_disable_dsp_domain(struct clk *clk) |
| 63 | { | 63 | { |
| 64 | if (omap1_clk_use(&api_ck.clk) == 0) { | 64 | if (omap1_clk_enable(&api_ck.clk) == 0) { |
| 65 | omap1_clk_disable(clk); | 65 | omap1_clk_disable_generic(clk); |
| 66 | omap1_clk_unuse(&api_ck.clk); | 66 | omap1_clk_disable(&api_ck.clk); |
| 67 | } | 67 | } |
| 68 | } | 68 | } |
| 69 | 69 | ||
| @@ -72,7 +72,7 @@ static int omap1_clk_enable_uart_functional(struct clk *clk) | |||
| 72 | int ret; | 72 | int ret; |
| 73 | struct uart_clk *uclk; | 73 | struct uart_clk *uclk; |
| 74 | 74 | ||
| 75 | ret = omap1_clk_enable(clk); | 75 | ret = omap1_clk_enable_generic(clk); |
| 76 | if (ret == 0) { | 76 | if (ret == 0) { |
| 77 | /* Set smart idle acknowledgement mode */ | 77 | /* Set smart idle acknowledgement mode */ |
| 78 | uclk = (struct uart_clk *)clk; | 78 | uclk = (struct uart_clk *)clk; |
| @@ -91,7 +91,7 @@ static void omap1_clk_disable_uart_functional(struct clk *clk) | |||
| 91 | uclk = (struct uart_clk *)clk; | 91 | uclk = (struct uart_clk *)clk; |
| 92 | omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr); | 92 | omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr); |
| 93 | 93 | ||
| 94 | omap1_clk_disable(clk); | 94 | omap1_clk_disable_generic(clk); |
| 95 | } | 95 | } |
| 96 | 96 | ||
| 97 | static void omap1_clk_allow_idle(struct clk *clk) | 97 | static void omap1_clk_allow_idle(struct clk *clk) |
| @@ -230,9 +230,9 @@ static void omap1_ckctl_recalc_dsp_domain(struct clk * clk) | |||
| 230 | * Note that DSP_CKCTL virt addr = phys addr, so | 230 | * Note that DSP_CKCTL virt addr = phys addr, so |
| 231 | * we must use __raw_readw() instead of omap_readw(). | 231 | * we must use __raw_readw() instead of omap_readw(). |
| 232 | */ | 232 | */ |
| 233 | omap1_clk_use(&api_ck.clk); | 233 | omap1_clk_enable(&api_ck.clk); |
| 234 | dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); | 234 | dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); |
| 235 | omap1_clk_unuse(&api_ck.clk); | 235 | omap1_clk_disable(&api_ck.clk); |
| 236 | 236 | ||
| 237 | if (unlikely(clk->rate == clk->parent->rate / dsor)) | 237 | if (unlikely(clk->rate == clk->parent->rate / dsor)) |
| 238 | return; /* No change, quick exit */ | 238 | return; /* No change, quick exit */ |
| @@ -412,12 +412,12 @@ static void omap1_init_ext_clk(struct clk * clk) | |||
| 412 | clk-> rate = 96000000 / dsor; | 412 | clk-> rate = 96000000 / dsor; |
| 413 | } | 413 | } |
| 414 | 414 | ||
| 415 | static int omap1_clk_use(struct clk *clk) | 415 | static int omap1_clk_enable(struct clk *clk) |
| 416 | { | 416 | { |
| 417 | int ret = 0; | 417 | int ret = 0; |
| 418 | if (clk->usecount++ == 0) { | 418 | if (clk->usecount++ == 0) { |
| 419 | if (likely(clk->parent)) { | 419 | if (likely(clk->parent)) { |
| 420 | ret = omap1_clk_use(clk->parent); | 420 | ret = omap1_clk_enable(clk->parent); |
| 421 | 421 | ||
| 422 | if (unlikely(ret != 0)) { | 422 | if (unlikely(ret != 0)) { |
| 423 | clk->usecount--; | 423 | clk->usecount--; |
| @@ -432,7 +432,7 @@ static int omap1_clk_use(struct clk *clk) | |||
| 432 | ret = clk->enable(clk); | 432 | ret = clk->enable(clk); |
| 433 | 433 | ||
| 434 | if (unlikely(ret != 0) && clk->parent) { | 434 | if (unlikely(ret != 0) && clk->parent) { |
| 435 | omap1_clk_unuse(clk->parent); | 435 | omap1_clk_disable(clk->parent); |
| 436 | clk->usecount--; | 436 | clk->usecount--; |
| 437 | } | 437 | } |
| 438 | } | 438 | } |
| @@ -440,12 +440,12 @@ static int omap1_clk_use(struct clk *clk) | |||
| 440 | return ret; | 440 | return ret; |
| 441 | } | 441 | } |
| 442 | 442 | ||
| 443 | static void omap1_clk_unuse(struct clk *clk) | 443 | static void omap1_clk_disable(struct clk *clk) |
| 444 | { | 444 | { |
| 445 | if (clk->usecount > 0 && !(--clk->usecount)) { | 445 | if (clk->usecount > 0 && !(--clk->usecount)) { |
| 446 | clk->disable(clk); | 446 | clk->disable(clk); |
| 447 | if (likely(clk->parent)) { | 447 | if (likely(clk->parent)) { |
| 448 | omap1_clk_unuse(clk->parent); | 448 | omap1_clk_disable(clk->parent); |
| 449 | if (clk->flags & CLOCK_NO_IDLE_PARENT) | 449 | if (clk->flags & CLOCK_NO_IDLE_PARENT) |
| 450 | if (!cpu_is_omap24xx()) | 450 | if (!cpu_is_omap24xx()) |
| 451 | omap1_clk_allow_idle(clk->parent); | 451 | omap1_clk_allow_idle(clk->parent); |
| @@ -453,7 +453,7 @@ static void omap1_clk_unuse(struct clk *clk) | |||
| 453 | } | 453 | } |
| 454 | } | 454 | } |
| 455 | 455 | ||
| 456 | static int omap1_clk_enable(struct clk *clk) | 456 | static int omap1_clk_enable_generic(struct clk *clk) |
| 457 | { | 457 | { |
| 458 | __u16 regval16; | 458 | __u16 regval16; |
| 459 | __u32 regval32; | 459 | __u32 regval32; |
| @@ -492,7 +492,7 @@ static int omap1_clk_enable(struct clk *clk) | |||
| 492 | return 0; | 492 | return 0; |
| 493 | } | 493 | } |
| 494 | 494 | ||
| 495 | static void omap1_clk_disable(struct clk *clk) | 495 | static void omap1_clk_disable_generic(struct clk *clk) |
| 496 | { | 496 | { |
| 497 | __u16 regval16; | 497 | __u16 regval16; |
| 498 | __u32 regval32; | 498 | __u32 regval32; |
| @@ -654,8 +654,8 @@ late_initcall(omap1_late_clk_reset); | |||
| 654 | #endif | 654 | #endif |
| 655 | 655 | ||
| 656 | static struct clk_functions omap1_clk_functions = { | 656 | static struct clk_functions omap1_clk_functions = { |
| 657 | .clk_use = omap1_clk_use, | 657 | .clk_enable = omap1_clk_enable, |
| 658 | .clk_unuse = omap1_clk_unuse, | 658 | .clk_disable = omap1_clk_disable, |
| 659 | .clk_round_rate = omap1_clk_round_rate, | 659 | .clk_round_rate = omap1_clk_round_rate, |
| 660 | .clk_set_rate = omap1_clk_set_rate, | 660 | .clk_set_rate = omap1_clk_set_rate, |
| 661 | }; | 661 | }; |
| @@ -780,9 +780,9 @@ int __init omap1_clk_init(void) | |||
| 780 | * Only enable those clocks we will need, let the drivers | 780 | * Only enable those clocks we will need, let the drivers |
| 781 | * enable other clocks as necessary | 781 | * enable other clocks as necessary |
| 782 | */ | 782 | */ |
| 783 | clk_use(&armper_ck.clk); | 783 | clk_enable(&armper_ck.clk); |
| 784 | clk_use(&armxor_ck.clk); | 784 | clk_enable(&armxor_ck.clk); |
| 785 | clk_use(&armtim_ck.clk); /* This should be done by timer code */ | 785 | clk_enable(&armtim_ck.clk); /* This should be done by timer code */ |
| 786 | 786 | ||
| 787 | if (cpu_is_omap1510()) | 787 | if (cpu_is_omap1510()) |
| 788 | clk_enable(&arm_gpio_ck); | 788 | clk_enable(&arm_gpio_ck); |
