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Diffstat (limited to 'arch/arm/mach-omap1/board-fsample.c')
-rw-r--r--arch/arm/mach-omap1/board-fsample.c76
1 files changed, 36 insertions, 40 deletions
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index a6b1bea50371..b09dfe6d6e8d 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -297,6 +297,39 @@ static struct omap_board_config_kernel fsample_config[] __initdata = {
297 297
298static void __init omap_fsample_init(void) 298static void __init omap_fsample_init(void)
299{ 299{
300 /* Early, board-dependent init */
301
302 /*
303 * Hold GSM Reset until needed
304 */
305 omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
306
307 /*
308 * UARTs -> done automagically by 8250 driver
309 */
310
311 /*
312 * CSx timings, GPIO Mux ... setup
313 */
314
315 /* Flash: CS0 timings setup */
316 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
317 omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
318
319 /*
320 * Ethernet support through the debug board
321 * CS1 timings setup
322 */
323 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
324 omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
325
326 /*
327 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
328 * It is used as the Ethernet controller interrupt
329 */
330 omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
331 OMAP7XX_IO_CONF_9);
332
300 fsample_init_smc91x(); 333 fsample_init_smc91x();
301 334
302 if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0) 335 if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
@@ -326,12 +359,6 @@ static void __init omap_fsample_init(void)
326 omap_register_i2c_bus(1, 100, NULL, 0); 359 omap_register_i2c_bus(1, 100, NULL, 0);
327} 360}
328 361
329static void __init omap_fsample_init_irq(void)
330{
331 omap1_init_common_hw();
332 omap1_init_irq();
333}
334
335/* Only FPGA needs to be mapped here. All others are done with ioremap */ 362/* Only FPGA needs to be mapped here. All others are done with ioremap */
336static struct map_desc omap_fsample_io_desc[] __initdata = { 363static struct map_desc omap_fsample_io_desc[] __initdata = {
337 { 364 {
@@ -350,49 +377,18 @@ static struct map_desc omap_fsample_io_desc[] __initdata = {
350 377
351static void __init omap_fsample_map_io(void) 378static void __init omap_fsample_map_io(void)
352{ 379{
353 omap1_map_common_io(); 380 omap15xx_map_io();
354 iotable_init(omap_fsample_io_desc, 381 iotable_init(omap_fsample_io_desc,
355 ARRAY_SIZE(omap_fsample_io_desc)); 382 ARRAY_SIZE(omap_fsample_io_desc));
356
357 /* Early, board-dependent init */
358
359 /*
360 * Hold GSM Reset until needed
361 */
362 omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
363
364 /*
365 * UARTs -> done automagically by 8250 driver
366 */
367
368 /*
369 * CSx timings, GPIO Mux ... setup
370 */
371
372 /* Flash: CS0 timings setup */
373 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
374 omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
375
376 /*
377 * Ethernet support through the debug board
378 * CS1 timings setup
379 */
380 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
381 omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
382
383 /*
384 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
385 * It is used as the Ethernet controller interrupt
386 */
387 omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
388} 383}
389 384
390MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") 385MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
391/* Maintainer: Brian Swetland <swetland@google.com> */ 386/* Maintainer: Brian Swetland <swetland@google.com> */
392 .boot_params = 0x10000100, 387 .boot_params = 0x10000100,
393 .map_io = omap_fsample_map_io, 388 .map_io = omap_fsample_map_io,
389 .init_early = omap1_init_early,
394 .reserve = omap_reserve, 390 .reserve = omap_reserve,
395 .init_irq = omap_fsample_init_irq, 391 .init_irq = omap1_init_irq,
396 .init_machine = omap_fsample_init, 392 .init_machine = omap_fsample_init,
397 .timer = &omap1_timer, 393 .timer = &omap1_timer,
398MACHINE_END 394MACHINE_END