diff options
Diffstat (limited to 'arch/arm/mach-ns9xxx/board-a9m9750dev.c')
-rw-r--r-- | arch/arm/mach-ns9xxx/board-a9m9750dev.c | 70 |
1 files changed, 44 insertions, 26 deletions
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c index 925048e7adfe..0f65177f9e5f 100644 --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
14 | 14 | ||
15 | #include <asm/mach/map.h> | 15 | #include <asm/mach/map.h> |
16 | #include <asm/gpio.h> | ||
16 | 17 | ||
17 | #include <asm/arch-ns9xxx/board.h> | 18 | #include <asm/arch-ns9xxx/board.h> |
18 | #include <asm/arch-ns9xxx/regs-sys.h> | 19 | #include <asm/arch-ns9xxx/regs-sys.h> |
@@ -44,7 +45,13 @@ static void a9m9750dev_fpga_ack_irq(unsigned int irq) | |||
44 | 45 | ||
45 | static void a9m9750dev_fpga_mask_irq(unsigned int irq) | 46 | static void a9m9750dev_fpga_mask_irq(unsigned int irq) |
46 | { | 47 | { |
47 | FPGA_IER &= ~(1 << (irq - FPGA_IRQ(0))); | 48 | u8 ier; |
49 | |||
50 | ier = __raw_readb(FPGA_IER); | ||
51 | |||
52 | ier &= ~(1 << (irq - FPGA_IRQ(0))); | ||
53 | |||
54 | __raw_writeb(ier, FPGA_IER); | ||
48 | } | 55 | } |
49 | 56 | ||
50 | static void a9m9750dev_fpga_maskack_irq(unsigned int irq) | 57 | static void a9m9750dev_fpga_maskack_irq(unsigned int irq) |
@@ -55,7 +62,13 @@ static void a9m9750dev_fpga_maskack_irq(unsigned int irq) | |||
55 | 62 | ||
56 | static void a9m9750dev_fpga_unmask_irq(unsigned int irq) | 63 | static void a9m9750dev_fpga_unmask_irq(unsigned int irq) |
57 | { | 64 | { |
58 | FPGA_IER |= 1 << (irq - FPGA_IRQ(0)); | 65 | u8 ier; |
66 | |||
67 | ier = __raw_readb(FPGA_IER); | ||
68 | |||
69 | ier |= 1 << (irq - FPGA_IRQ(0)); | ||
70 | |||
71 | __raw_writeb(ier, FPGA_IER); | ||
59 | } | 72 | } |
60 | 73 | ||
61 | static struct irq_chip a9m9750dev_fpga_chip = { | 74 | static struct irq_chip a9m9750dev_fpga_chip = { |
@@ -68,30 +81,34 @@ static struct irq_chip a9m9750dev_fpga_chip = { | |||
68 | static void a9m9750dev_fpga_demux_handler(unsigned int irq, | 81 | static void a9m9750dev_fpga_demux_handler(unsigned int irq, |
69 | struct irq_desc *desc) | 82 | struct irq_desc *desc) |
70 | { | 83 | { |
71 | int stat = FPGA_ISR; | 84 | u8 stat = __raw_readb(FPGA_ISR); |
85 | |||
86 | desc->chip->mask_ack(irq); | ||
72 | 87 | ||
73 | while (stat != 0) { | 88 | while (stat != 0) { |
74 | int irqno = fls(stat) - 1; | 89 | int irqno = fls(stat) - 1; |
90 | struct irq_desc *fpgadesc; | ||
75 | 91 | ||
76 | stat &= ~(1 << irqno); | 92 | stat &= ~(1 << irqno); |
77 | 93 | ||
78 | desc = irq_desc + FPGA_IRQ(irqno); | 94 | fpgadesc = irq_desc + FPGA_IRQ(irqno); |
79 | 95 | ||
80 | desc_handle_irq(FPGA_IRQ(irqno), desc); | 96 | desc_handle_irq(FPGA_IRQ(irqno), fpgadesc); |
81 | } | 97 | } |
98 | |||
99 | desc->chip->unmask(irq); | ||
82 | } | 100 | } |
83 | 101 | ||
84 | void __init board_a9m9750dev_init_irq(void) | 102 | void __init board_a9m9750dev_init_irq(void) |
85 | { | 103 | { |
86 | u32 reg; | 104 | u32 eic; |
87 | int i; | 105 | int i; |
88 | 106 | ||
89 | /* | 107 | if (gpio_request(11, "board a9m9750dev extirq2") == 0) |
90 | * configure gpio for IRQ_EXT2 | 108 | ns9xxx_gpio_configure(11, 0, 1); |
91 | * use GPIO 11, because GPIO 32 is used for the LCD | 109 | else |
92 | */ | 110 | printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_EXT2\n", |
93 | /* XXX: proper GPIO handling */ | 111 | __func__); |
94 | BBU_GCONFb1(1) &= ~0x2000; | ||
95 | 112 | ||
96 | for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { | 113 | for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { |
97 | set_irq_chip(i, &a9m9750dev_fpga_chip); | 114 | set_irq_chip(i, &a9m9750dev_fpga_chip); |
@@ -100,10 +117,10 @@ void __init board_a9m9750dev_init_irq(void) | |||
100 | } | 117 | } |
101 | 118 | ||
102 | /* IRQ_EXT2: level sensitive + active low */ | 119 | /* IRQ_EXT2: level sensitive + active low */ |
103 | reg = SYS_EIC(2); | 120 | eic = __raw_readl(SYS_EIC(2)); |
104 | REGSET(reg, SYS_EIC, PLTY, AL); | 121 | REGSET(eic, SYS_EIC, PLTY, AL); |
105 | REGSET(reg, SYS_EIC, LVEDG, LEVEL); | 122 | REGSET(eic, SYS_EIC, LVEDG, LEVEL); |
106 | SYS_EIC(2) = reg; | 123 | __raw_writel(eic, SYS_EIC(2)); |
107 | 124 | ||
108 | set_irq_chained_handler(IRQ_EXT2, | 125 | set_irq_chained_handler(IRQ_EXT2, |
109 | a9m9750dev_fpga_demux_handler); | 126 | a9m9750dev_fpga_demux_handler); |
@@ -167,17 +184,18 @@ void __init board_a9m9750dev_init_machine(void) | |||
167 | u32 reg; | 184 | u32 reg; |
168 | 185 | ||
169 | /* setup static CS0: memory base ... */ | 186 | /* setup static CS0: memory base ... */ |
170 | REGSETIM(SYS_SMCSSMB(0), SYS_SMCSSMB, CSxB, | 187 | reg = __raw_readl(SYS_SMCSSMB(0)); |
171 | NS9XXX_CSxSTAT_PHYS(0) >> 12); | 188 | REGSETIM(reg, SYS_SMCSSMB, CSxB, NS9XXX_CSxSTAT_PHYS(0) >> 12); |
189 | __raw_writel(reg, SYS_SMCSSMB(0)); | ||
172 | 190 | ||
173 | /* ... and mask */ | 191 | /* ... and mask */ |
174 | reg = SYS_SMCSSMM(0); | 192 | reg = __raw_readl(SYS_SMCSSMM(0)); |
175 | REGSETIM(reg, SYS_SMCSSMM, CSxM, 0xfffff); | 193 | REGSETIM(reg, SYS_SMCSSMM, CSxM, 0xfffff); |
176 | REGSET(reg, SYS_SMCSSMM, CSEx, EN); | 194 | REGSET(reg, SYS_SMCSSMM, CSEx, EN); |
177 | SYS_SMCSSMM(0) = reg; | 195 | __raw_writel(reg, SYS_SMCSSMM(0)); |
178 | 196 | ||
179 | /* setup static CS0: memory configuration */ | 197 | /* setup static CS0: memory configuration */ |
180 | reg = MEM_SMC(0); | 198 | reg = __raw_readl(MEM_SMC(0)); |
181 | REGSET(reg, MEM_SMC, PSMC, OFF); | 199 | REGSET(reg, MEM_SMC, PSMC, OFF); |
182 | REGSET(reg, MEM_SMC, BSMC, OFF); | 200 | REGSET(reg, MEM_SMC, BSMC, OFF); |
183 | REGSET(reg, MEM_SMC, EW, OFF); | 201 | REGSET(reg, MEM_SMC, EW, OFF); |
@@ -185,13 +203,13 @@ void __init board_a9m9750dev_init_machine(void) | |||
185 | REGSET(reg, MEM_SMC, PC, AL); | 203 | REGSET(reg, MEM_SMC, PC, AL); |
186 | REGSET(reg, MEM_SMC, PM, DIS); | 204 | REGSET(reg, MEM_SMC, PM, DIS); |
187 | REGSET(reg, MEM_SMC, MW, 8); | 205 | REGSET(reg, MEM_SMC, MW, 8); |
188 | MEM_SMC(0) = reg; | 206 | __raw_writel(reg, MEM_SMC(0)); |
189 | 207 | ||
190 | /* setup static CS0: timing */ | 208 | /* setup static CS0: timing */ |
191 | MEM_SMWED(0) = 0x2; | 209 | __raw_writel(0x2, MEM_SMWED(0)); |
192 | MEM_SMOED(0) = 0x2; | 210 | __raw_writel(0x2, MEM_SMOED(0)); |
193 | MEM_SMRD(0) = 0x6; | 211 | __raw_writel(0x6, MEM_SMRD(0)); |
194 | MEM_SMWD(0) = 0x6; | 212 | __raw_writel(0x6, MEM_SMWD(0)); |
195 | 213 | ||
196 | platform_add_devices(board_a9m9750dev_devices, | 214 | platform_add_devices(board_a9m9750dev_devices, |
197 | ARRAY_SIZE(board_a9m9750dev_devices)); | 215 | ARRAY_SIZE(board_a9m9750dev_devices)); |