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Diffstat (limited to 'arch/arm/mach-ns9xxx/board-a9m9750dev.c')
-rw-r--r--arch/arm/mach-ns9xxx/board-a9m9750dev.c69
1 files changed, 6 insertions, 63 deletions
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index 0f65177f9e5f..a494b71c0195 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -8,15 +8,14 @@
8 * under the terms of the GNU General Public License version 2 as published by 8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation. 9 * the Free Software Foundation.
10 */ 10 */
11#include <linux/platform_device.h>
12#include <linux/serial_8250.h>
13#include <linux/irq.h> 11#include <linux/irq.h>
14 12
15#include <asm/mach/map.h> 13#include <asm/mach/map.h>
16#include <asm/gpio.h> 14#include <asm/gpio.h>
17 15
18#include <asm/arch-ns9xxx/board.h> 16#include <asm/arch-ns9xxx/board.h>
19#include <asm/arch-ns9xxx/regs-sys.h> 17#include <asm/arch-ns9xxx/processor-ns9360.h>
18#include <asm/arch-ns9xxx/regs-sys-ns9360.h>
20#include <asm/arch-ns9xxx/regs-mem.h> 19#include <asm/arch-ns9xxx/regs-mem.h>
21#include <asm/arch-ns9xxx/regs-bbu.h> 20#include <asm/arch-ns9xxx/regs-bbu.h>
22#include <asm/arch-ns9xxx/regs-board-a9m9750dev.h> 21#include <asm/arch-ns9xxx/regs-board-a9m9750dev.h>
@@ -105,9 +104,9 @@ void __init board_a9m9750dev_init_irq(void)
105 int i; 104 int i;
106 105
107 if (gpio_request(11, "board a9m9750dev extirq2") == 0) 106 if (gpio_request(11, "board a9m9750dev extirq2") == 0)
108 ns9xxx_gpio_configure(11, 0, 1); 107 ns9360_gpio_configure(11, 0, 1);
109 else 108 else
110 printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_EXT2\n", 109 printk(KERN_ERR "%s: cannot get gpio 11 for IRQ_NS9XXX_EXT2\n",
111 __func__); 110 __func__);
112 111
113 for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { 112 for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
@@ -116,69 +115,16 @@ void __init board_a9m9750dev_init_irq(void)
116 set_irq_flags(i, IRQF_VALID); 115 set_irq_flags(i, IRQF_VALID);
117 } 116 }
118 117
119 /* IRQ_EXT2: level sensitive + active low */ 118 /* IRQ_NS9XXX_EXT2: level sensitive + active low */
120 eic = __raw_readl(SYS_EIC(2)); 119 eic = __raw_readl(SYS_EIC(2));
121 REGSET(eic, SYS_EIC, PLTY, AL); 120 REGSET(eic, SYS_EIC, PLTY, AL);
122 REGSET(eic, SYS_EIC, LVEDG, LEVEL); 121 REGSET(eic, SYS_EIC, LVEDG, LEVEL);
123 __raw_writel(eic, SYS_EIC(2)); 122 __raw_writel(eic, SYS_EIC(2));
124 123
125 set_irq_chained_handler(IRQ_EXT2, 124 set_irq_chained_handler(IRQ_NS9XXX_EXT2,
126 a9m9750dev_fpga_demux_handler); 125 a9m9750dev_fpga_demux_handler);
127} 126}
128 127
129static struct plat_serial8250_port board_a9m9750dev_serial8250_port[] = {
130 {
131 .iobase = FPGA_UARTA_BASE,
132 .membase = (unsigned char*)FPGA_UARTA_BASE,
133 .mapbase = FPGA_UARTA_BASE,
134 .irq = IRQ_FPGA_UARTA,
135 .iotype = UPIO_MEM,
136 .uartclk = 18432000,
137 .regshift = 0,
138 .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ,
139 }, {
140 .iobase = FPGA_UARTB_BASE,
141 .membase = (unsigned char*)FPGA_UARTB_BASE,
142 .mapbase = FPGA_UARTB_BASE,
143 .irq = IRQ_FPGA_UARTB,
144 .iotype = UPIO_MEM,
145 .uartclk = 18432000,
146 .regshift = 0,
147 .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ,
148 }, {
149 .iobase = FPGA_UARTC_BASE,
150 .membase = (unsigned char*)FPGA_UARTC_BASE,
151 .mapbase = FPGA_UARTC_BASE,
152 .irq = IRQ_FPGA_UARTC,
153 .iotype = UPIO_MEM,
154 .uartclk = 18432000,
155 .regshift = 0,
156 .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ,
157 }, {
158 .iobase = FPGA_UARTD_BASE,
159 .membase = (unsigned char*)FPGA_UARTD_BASE,
160 .mapbase = FPGA_UARTD_BASE,
161 .irq = IRQ_FPGA_UARTD,
162 .iotype = UPIO_MEM,
163 .uartclk = 18432000,
164 .regshift = 0,
165 .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ,
166 }, {
167 /* end marker */
168 },
169};
170
171static struct platform_device board_a9m9750dev_serial_device = {
172 .name = "serial8250",
173 .dev = {
174 .platform_data = board_a9m9750dev_serial8250_port,
175 },
176};
177
178static struct platform_device *board_a9m9750dev_devices[] __initdata = {
179 &board_a9m9750dev_serial_device,
180};
181
182void __init board_a9m9750dev_init_machine(void) 128void __init board_a9m9750dev_init_machine(void)
183{ 129{
184 u32 reg; 130 u32 reg;
@@ -210,7 +156,4 @@ void __init board_a9m9750dev_init_machine(void)
210 __raw_writel(0x2, MEM_SMOED(0)); 156 __raw_writel(0x2, MEM_SMOED(0));
211 __raw_writel(0x6, MEM_SMRD(0)); 157 __raw_writel(0x6, MEM_SMRD(0));
212 __raw_writel(0x6, MEM_SMWD(0)); 158 __raw_writel(0x6, MEM_SMWD(0));
213
214 platform_add_devices(board_a9m9750dev_devices,
215 ARRAY_SIZE(board_a9m9750dev_devices));
216} 159}