diff options
Diffstat (limited to 'arch/arm/mach-nomadik/include/mach/irqs.h')
| -rw-r--r-- | arch/arm/mach-nomadik/include/mach/irqs.h | 79 |
1 files changed, 0 insertions, 79 deletions
diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h deleted file mode 100644 index 90ac965a92fe..000000000000 --- a/arch/arm/mach-nomadik/include/mach/irqs.h +++ /dev/null | |||
| @@ -1,79 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * mach-nomadik/include/mach/irqs.h | ||
| 3 | * | ||
| 4 | * Copyright (C) ST Microelectronics | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program; if not, write to the Free Software | ||
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 19 | */ | ||
| 20 | #ifndef __ASM_ARCH_IRQS_H | ||
| 21 | #define __ASM_ARCH_IRQS_H | ||
| 22 | |||
| 23 | #define IRQ_VIC_START 32 /* first VIC interrupt is 1 */ | ||
| 24 | |||
| 25 | /* | ||
| 26 | * Interrupt numbers generic for all Nomadik Chip cuts | ||
| 27 | */ | ||
| 28 | #define IRQ_WATCHDOG (IRQ_VIC_START+0) | ||
| 29 | #define IRQ_SOFTINT (IRQ_VIC_START+1) | ||
| 30 | #define IRQ_CRYPTO (IRQ_VIC_START+2) | ||
| 31 | #define IRQ_OWM (IRQ_VIC_START+3) | ||
| 32 | #define IRQ_MTU0 (IRQ_VIC_START+4) | ||
| 33 | #define IRQ_MTU1 (IRQ_VIC_START+5) | ||
| 34 | #define IRQ_GPIO0 (IRQ_VIC_START+6) | ||
| 35 | #define IRQ_GPIO1 (IRQ_VIC_START+7) | ||
| 36 | #define IRQ_GPIO2 (IRQ_VIC_START+8) | ||
| 37 | #define IRQ_GPIO3 (IRQ_VIC_START+9) | ||
| 38 | #define IRQ_RTC_RTT (IRQ_VIC_START+10) | ||
| 39 | #define IRQ_SSP (IRQ_VIC_START+11) | ||
| 40 | #define IRQ_UART0 (IRQ_VIC_START+12) | ||
| 41 | #define IRQ_DMA1 (IRQ_VIC_START+13) | ||
| 42 | #define IRQ_CLCD_MDIF (IRQ_VIC_START+14) | ||
| 43 | #define IRQ_DMA0 (IRQ_VIC_START+15) | ||
| 44 | #define IRQ_PWRFAIL (IRQ_VIC_START+16) | ||
| 45 | #define IRQ_UART1 (IRQ_VIC_START+17) | ||
| 46 | #define IRQ_FIRDA (IRQ_VIC_START+18) | ||
| 47 | #define IRQ_MSP0 (IRQ_VIC_START+19) | ||
| 48 | #define IRQ_I2C0 (IRQ_VIC_START+20) | ||
| 49 | #define IRQ_I2C1 (IRQ_VIC_START+21) | ||
| 50 | #define IRQ_SDMMC (IRQ_VIC_START+22) | ||
| 51 | #define IRQ_USBOTG (IRQ_VIC_START+23) | ||
| 52 | #define IRQ_SVA_IT0 (IRQ_VIC_START+24) | ||
| 53 | #define IRQ_SVA_IT1 (IRQ_VIC_START+25) | ||
| 54 | #define IRQ_SAA_IT0 (IRQ_VIC_START+26) | ||
| 55 | #define IRQ_SAA_IT1 (IRQ_VIC_START+27) | ||
| 56 | #define IRQ_UART2 (IRQ_VIC_START+28) | ||
| 57 | #define IRQ_MSP2 (IRQ_VIC_START+29) | ||
| 58 | #define IRQ_L2CC (IRQ_VIC_START+30) | ||
| 59 | #define IRQ_HPI (IRQ_VIC_START+31) | ||
| 60 | #define IRQ_SKE (IRQ_VIC_START+32) | ||
| 61 | #define IRQ_KP (IRQ_VIC_START+33) | ||
| 62 | #define IRQ_MEMST (IRQ_VIC_START+34) | ||
| 63 | #define IRQ_SGA_IT (IRQ_VIC_START+35) | ||
| 64 | #define IRQ_USBM (IRQ_VIC_START+36) | ||
| 65 | #define IRQ_MSP1 (IRQ_VIC_START+37) | ||
| 66 | |||
| 67 | #define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) | ||
| 68 | |||
| 69 | /* After chip-specific IRQ numbers we have the GPIO ones */ | ||
| 70 | #define NOMADIK_NR_GPIO 128 /* last 4 not wired to pins */ | ||
| 71 | #define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + NOMADIK_GPIO_OFFSET) | ||
| 72 | #define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - NOMADIK_GPIO_OFFSET) | ||
| 73 | #define NOMADIK_NR_IRQS NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO) | ||
| 74 | |||
| 75 | /* Following two are used by entry_macro.S, to access our dual-vic */ | ||
| 76 | #define VIC_REG_IRQSR0 0 | ||
| 77 | #define VIC_REG_IRQSR1 0x20 | ||
| 78 | |||
| 79 | #endif /* __ASM_ARCH_IRQS_H */ | ||