diff options
Diffstat (limited to 'arch/arm/mach-netx/include')
-rw-r--r-- | arch/arm/mach-netx/include/mach/dma.h | 21 | ||||
-rw-r--r-- | arch/arm/mach-netx/include/mach/io.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-netx/include/mach/memory.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-netx/include/mach/netx-regs.h | 22 |
4 files changed, 23 insertions, 32 deletions
diff --git a/arch/arm/mach-netx/include/mach/dma.h b/arch/arm/mach-netx/include/mach/dma.h deleted file mode 100644 index 690b3ebc43ac..000000000000 --- a/arch/arm/mach-netx/include/mach/dma.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-netx/include/mach/dma.h | ||
3 | * | ||
4 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 | ||
8 | * as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #define MAX_DMA_CHANNELS 0 | ||
21 | #define MAX_DMA_ADDRESS ~0 | ||
diff --git a/arch/arm/mach-netx/include/mach/io.h b/arch/arm/mach-netx/include/mach/io.h index 468b92a82585..c3921cb3b6a6 100644 --- a/arch/arm/mach-netx/include/mach/io.h +++ b/arch/arm/mach-netx/include/mach/io.h | |||
@@ -22,7 +22,7 @@ | |||
22 | 22 | ||
23 | #define IO_SPACE_LIMIT 0xffffffff | 23 | #define IO_SPACE_LIMIT 0xffffffff |
24 | 24 | ||
25 | #define __io(a) ((void __iomem *)(a)) | 25 | #define __io(a) __typesafe_io(a) |
26 | #define __mem_pci(a) (a) | 26 | #define __mem_pci(a) (a) |
27 | 27 | ||
28 | #endif | 28 | #endif |
diff --git a/arch/arm/mach-netx/include/mach/memory.h b/arch/arm/mach-netx/include/mach/memory.h index 53745a1378de..9a363f297f90 100644 --- a/arch/arm/mach-netx/include/mach/memory.h +++ b/arch/arm/mach-netx/include/mach/memory.h | |||
@@ -22,15 +22,5 @@ | |||
22 | 22 | ||
23 | #define PHYS_OFFSET UL(0x80000000) | 23 | #define PHYS_OFFSET UL(0x80000000) |
24 | 24 | ||
25 | /* | ||
26 | * Virtual view <-> DMA view memory address translations | ||
27 | * virt_to_bus: Used to translate the virtual address to an | ||
28 | * address suitable to be passed to set_dma_addr | ||
29 | * bus_to_virt: Used to convert an address for DMA operations | ||
30 | * to an address that the kernel can use. | ||
31 | */ | ||
32 | #define __virt_to_bus(x) __virt_to_phys(x) | ||
33 | #define __bus_to_virt(x) __phys_to_virt(x) | ||
34 | |||
35 | #endif | 25 | #endif |
36 | 26 | ||
diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h index 5104a00d40f4..08c60ff227be 100644 --- a/arch/arm/mach-netx/include/mach/netx-regs.h +++ b/arch/arm/mach-netx/include/mach/netx-regs.h | |||
@@ -328,6 +328,28 @@ | |||
328 | #define NETX_PFIFO_FILL_LEVEL(pfifo) NETX_PFIFO_REG(0x180 + ((pfifo)<<2)) | 328 | #define NETX_PFIFO_FILL_LEVEL(pfifo) NETX_PFIFO_REG(0x180 + ((pfifo)<<2)) |
329 | #define NETX_PFIFO_XPEC_ISR(xpec) NETX_PFIFO_REG(0x400 + ((xpec) << 2)) | 329 | #define NETX_PFIFO_XPEC_ISR(xpec) NETX_PFIFO_REG(0x400 + ((xpec) << 2)) |
330 | 330 | ||
331 | |||
332 | /******************************* | ||
333 | * Memory Controller * | ||
334 | *******************************/ | ||
335 | |||
336 | /* Registers */ | ||
337 | #define NETX_MEMCR_REG(ofs) __io(NETX_VA_MEMCR + (ofs)) | ||
338 | #define NETX_MEMCR_SRAM_CTRL(cs) NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */ | ||
339 | #define NETX_MEMCR_SDRAM_CFG_CTRL NETX_MEMCR_REG(0x40) | ||
340 | #define NETX_MEMCR_SDRAM_TIMING_CTRL NETX_MEMCR_REG(0x44) | ||
341 | #define NETX_MEMCR_SDRAM_MODE NETX_MEMCR_REG(0x48) | ||
342 | #define NETX_MEMCR_SDRAM_EXT_MODE NETX_MEMCR_REG(0x4c) | ||
343 | #define NETX_MEMCR_PRIO_TIMESLOT_CTRL NETX_MEMCR_REG(0x80) | ||
344 | #define NETX_MEMCR_PRIO_ACCESS_CTRL NETX_MEMCR_REG(0x84) | ||
345 | |||
346 | /* Bits */ | ||
347 | #define NETX_MEMCR_SRAM_CTRL_WIDTHEXTMEM(x) (((x) & 0x3) << 24) | ||
348 | #define NETX_MEMCR_SRAM_CTRL_WSPOSTPAUSEEXTMEM(x) (((x) & 0x3) << 16) | ||
349 | #define NETX_MEMCR_SRAM_CTRL_WSPREPASEEXTMEM(x) (((x) & 0x3) << 8) | ||
350 | #define NETX_MEMCR_SRAM_CTRL_WSEXTMEM(x) (((x) & 0x1f) << 0) | ||
351 | |||
352 | |||
331 | /******************************* | 353 | /******************************* |
332 | * Dual Port Memory * | 354 | * Dual Port Memory * |
333 | *******************************/ | 355 | *******************************/ |