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-rw-r--r--arch/arm/mach-mxs/Kconfig89
-rw-r--r--arch/arm/mach-mxs/Makefile11
-rw-r--r--arch/arm/mach-mxs/Makefile.boot1
-rw-r--r--arch/arm/mach-mxs/devices-mx23.h43
-rw-r--r--arch/arm/mach-mxs/devices-mx28.h63
-rw-r--r--arch/arm/mach-mxs/devices.c87
-rw-r--r--arch/arm/mach-mxs/devices/Kconfig33
-rw-r--r--arch/arm/mach-mxs/devices/Makefile12
-rw-r--r--arch/arm/mach-mxs/devices/platform-auart.c65
-rw-r--r--arch/arm/mach-mxs/devices/platform-dma.c31
-rw-r--r--arch/arm/mach-mxs/devices/platform-fec.c52
-rw-r--r--arch/arm/mach-mxs/devices/platform-flexcan.c51
-rw-r--r--arch/arm/mach-mxs/devices/platform-gpio-mxs.c33
-rw-r--r--arch/arm/mach-mxs/devices/platform-gpmi-nand.c81
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxs-i2c.c52
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxs-mmc.c76
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxs-pwm.c22
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxs-saif.c61
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxsfb.c47
-rw-r--r--arch/arm/mach-mxs/devices/platform-rtc-stmp3xxx.c51
-rw-r--r--arch/arm/mach-mxs/include/mach/common.h9
-rw-r--r--arch/arm/mach-mxs/include/mach/devices-common.h114
-rw-r--r--arch/arm/mach-mxs/include/mach/iomux-mx23.h355
-rw-r--r--arch/arm/mach-mxs/include/mach/iomux-mx28.h537
-rw-r--r--arch/arm/mach-mxs/include/mach/iomux.h168
-rw-r--r--arch/arm/mach-mxs/iomux.c101
-rw-r--r--arch/arm/mach-mxs/mach-apx4devkit.c273
-rw-r--r--arch/arm/mach-mxs/mach-m28evk.c366
-rw-r--r--arch/arm/mach-mxs/mach-mx23evk.c190
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c477
-rw-r--r--arch/arm/mach-mxs/mach-mxs.c140
-rw-r--r--arch/arm/mach-mxs/mach-stmp378x_devb.c123
-rw-r--r--arch/arm/mach-mxs/mach-tx28.c184
-rw-r--r--arch/arm/mach-mxs/mm.c39
-rw-r--r--arch/arm/mach-mxs/module-tx28.c160
-rw-r--r--arch/arm/mach-mxs/module-tx28.h10
36 files changed, 130 insertions, 4077 deletions
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index 9a8bbda195b2..ecc431909d6f 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -1,7 +1,5 @@
1if ARCH_MXS 1if ARCH_MXS
2 2
3source "arch/arm/mach-mxs/devices/Kconfig"
4
5config SOC_IMX23 3config SOC_IMX23
6 bool 4 bool
7 select ARM_AMBA 5 select ARM_AMBA
@@ -27,91 +25,4 @@ config MACH_MXS_DT
27 Include support for Freescale MXS platforms(i.MX23 and i.MX28) 25 Include support for Freescale MXS platforms(i.MX23 and i.MX28)
28 using the device tree for discovery 26 using the device tree for discovery
29 27
30config MACH_STMP378X_DEVB
31 bool "Support STMP378x_devb Platform"
32 select SOC_IMX23
33 select MXS_HAVE_AMBA_DUART
34 select MXS_HAVE_PLATFORM_AUART
35 select MXS_HAVE_PLATFORM_MXS_MMC
36 select MXS_HAVE_PLATFORM_RTC_STMP3XXX
37 help
38 Include support for STMP378x-devb platform. This includes specific
39 configurations for the board and its peripherals.
40
41config MACH_MX23EVK
42 bool "Support MX23EVK Platform"
43 select SOC_IMX23
44 select MXS_HAVE_AMBA_DUART
45 select MXS_HAVE_PLATFORM_AUART
46 select MXS_HAVE_PLATFORM_MXS_MMC
47 select MXS_HAVE_PLATFORM_MXSFB
48 select MXS_HAVE_PLATFORM_RTC_STMP3XXX
49 help
50 Include support for MX23EVK platform. This includes specific
51 configurations for the board and its peripherals.
52
53config MACH_MX28EVK
54 bool "Support MX28EVK Platform"
55 select SOC_IMX28
56 select LEDS_GPIO_REGISTER
57 select MXS_HAVE_AMBA_DUART
58 select MXS_HAVE_PLATFORM_AUART
59 select MXS_HAVE_PLATFORM_FEC
60 select MXS_HAVE_PLATFORM_FLEXCAN
61 select MXS_HAVE_PLATFORM_MXS_MMC
62 select MXS_HAVE_PLATFORM_MXSFB
63 select MXS_HAVE_PLATFORM_MXS_SAIF
64 select MXS_HAVE_PLATFORM_MXS_I2C
65 select MXS_HAVE_PLATFORM_RTC_STMP3XXX
66 help
67 Include support for MX28EVK platform. This includes specific
68 configurations for the board and its peripherals.
69
70config MODULE_TX28
71 bool
72 select SOC_IMX28
73 select LEDS_GPIO_REGISTER
74 select MXS_HAVE_AMBA_DUART
75 select MXS_HAVE_PLATFORM_AUART
76 select MXS_HAVE_PLATFORM_FEC
77 select MXS_HAVE_PLATFORM_MXS_I2C
78 select MXS_HAVE_PLATFORM_MXS_MMC
79 select MXS_HAVE_PLATFORM_MXS_PWM
80 select MXS_HAVE_PLATFORM_RTC_STMP3XXX
81
82config MODULE_M28
83 bool
84 select SOC_IMX28
85 select LEDS_GPIO_REGISTER
86 select MXS_HAVE_AMBA_DUART
87 select MXS_HAVE_PLATFORM_AUART
88 select MXS_HAVE_PLATFORM_FEC
89 select MXS_HAVE_PLATFORM_FLEXCAN
90 select MXS_HAVE_PLATFORM_MXS_I2C
91 select MXS_HAVE_PLATFORM_MXS_MMC
92 select MXS_HAVE_PLATFORM_MXSFB
93
94config MODULE_APX4
95 bool
96 select SOC_IMX28
97 select LEDS_GPIO_REGISTER
98 select MXS_HAVE_AMBA_DUART
99 select MXS_HAVE_PLATFORM_AUART
100 select MXS_HAVE_PLATFORM_FEC
101 select MXS_HAVE_PLATFORM_MXS_I2C
102 select MXS_HAVE_PLATFORM_MXS_MMC
103 select MXS_HAVE_PLATFORM_MXS_SAIF
104
105config MACH_TX28
106 bool "Ka-Ro TX28 module"
107 select MODULE_TX28
108
109config MACH_M28EVK
110 bool "Support DENX M28EVK Platform"
111 select MODULE_M28
112
113config MACH_APX4DEVKIT
114 bool "Support Bluegiga APX4 Development Kit"
115 select MODULE_APX4
116
117endif 28endif
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index fed3695a1339..3d3c8a973062 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -1,15 +1,6 @@
1# Common support 1# Common support
2obj-y := devices.o icoll.o iomux.o ocotp.o system.o timer.o mm.o 2obj-y := icoll.o ocotp.o system.o timer.o mm.o
3 3
4obj-$(CONFIG_PM) += pm.o 4obj-$(CONFIG_PM) += pm.o
5 5
6obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o 6obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o
7obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o
8obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o
9obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o
10obj-$(CONFIG_MACH_M28EVK) += mach-m28evk.o
11obj-$(CONFIG_MACH_APX4DEVKIT) += mach-apx4devkit.o
12obj-$(CONFIG_MODULE_TX28) += module-tx28.o
13obj-$(CONFIG_MACH_TX28) += mach-tx28.o
14
15obj-y += devices/
diff --git a/arch/arm/mach-mxs/Makefile.boot b/arch/arm/mach-mxs/Makefile.boot
index 4582999cf080..8bd23a8558db 100644
--- a/arch/arm/mach-mxs/Makefile.boot
+++ b/arch/arm/mach-mxs/Makefile.boot
@@ -5,6 +5,7 @@ dtb-y += imx23-evk.dtb \
5 imx23-stmp378x_devb.dtb \ 5 imx23-stmp378x_devb.dtb \
6 imx28-apx4devkit.dtb \ 6 imx28-apx4devkit.dtb \
7 imx28-cfa10036.dtb \ 7 imx28-cfa10036.dtb \
8 imx28-cfa10049.dtb \
8 imx28-evk.dtb \ 9 imx28-evk.dtb \
9 imx28-m28evk.dtb \ 10 imx28-m28evk.dtb \
10 imx28-tx28.dtb \ 11 imx28-tx28.dtb \
diff --git a/arch/arm/mach-mxs/devices-mx23.h b/arch/arm/mach-mxs/devices-mx23.h
deleted file mode 100644
index 9ee5cede3d42..000000000000
--- a/arch/arm/mach-mxs/devices-mx23.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License version 2 as published by the
9 * Free Software Foundation.
10 */
11#include <mach/mx23.h>
12#include <mach/devices-common.h>
13#include <linux/mxsfb.h>
14#include <linux/amba/bus.h>
15
16static inline int mx23_add_duart(void)
17{
18 struct amba_device *d;
19
20 d = amba_ahb_device_add(NULL, "duart", MX23_DUART_BASE_ADDR, SZ_8K,
21 MX23_INT_DUART, 0, 0, 0);
22 return IS_ERR(d) ? PTR_ERR(d) : 0;
23}
24
25extern const struct mxs_auart_data mx23_auart_data[] __initconst;
26#define mx23_add_auart(id) mxs_add_auart(&mx23_auart_data[id])
27#define mx23_add_auart0() mx23_add_auart(0)
28#define mx23_add_auart1() mx23_add_auart(1)
29
30extern const struct mxs_gpmi_nand_data mx23_gpmi_nand_data __initconst;
31#define mx23_add_gpmi_nand(pdata) \
32 mxs_add_gpmi_nand(pdata, &mx23_gpmi_nand_data)
33
34extern const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst;
35#define mx23_add_mxs_mmc(id, pdata) \
36 mxs_add_mxs_mmc(&mx23_mxs_mmc_data[id], pdata)
37
38#define mx23_add_mxs_pwm(id) mxs_add_mxs_pwm(MX23_PWM_BASE_ADDR, id)
39
40struct platform_device *__init mx23_add_mxsfb(
41 const struct mxsfb_platform_data *pdata);
42
43struct platform_device *__init mx23_add_rtc_stmp3xxx(void);
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h
deleted file mode 100644
index fcab431060f4..000000000000
--- a/arch/arm/mach-mxs/devices-mx28.h
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License version 2 as published by the
9 * Free Software Foundation.
10 */
11#include <mach/mx28.h>
12#include <mach/devices-common.h>
13#include <linux/mxsfb.h>
14#include <linux/amba/bus.h>
15
16static inline int mx28_add_duart(void)
17{
18 struct amba_device *d;
19
20 d = amba_ahb_device_add(NULL, "duart", MX28_DUART_BASE_ADDR, SZ_8K,
21 MX28_INT_DUART, 0, 0, 0);
22 return IS_ERR(d) ? PTR_ERR(d) : 0;
23}
24
25extern const struct mxs_auart_data mx28_auart_data[] __initconst;
26#define mx28_add_auart(id) mxs_add_auart(&mx28_auart_data[id])
27#define mx28_add_auart0() mx28_add_auart(0)
28#define mx28_add_auart1() mx28_add_auart(1)
29#define mx28_add_auart2() mx28_add_auart(2)
30#define mx28_add_auart3() mx28_add_auart(3)
31#define mx28_add_auart4() mx28_add_auart(4)
32
33extern const struct mxs_fec_data mx28_fec_data[] __initconst;
34#define mx28_add_fec(id, pdata) \
35 mxs_add_fec(&mx28_fec_data[id], pdata)
36
37extern const struct mxs_flexcan_data mx28_flexcan_data[] __initconst;
38#define mx28_add_flexcan(id, pdata) \
39 mxs_add_flexcan(&mx28_flexcan_data[id], pdata)
40#define mx28_add_flexcan0(pdata) mx28_add_flexcan(0, pdata)
41#define mx28_add_flexcan1(pdata) mx28_add_flexcan(1, pdata)
42
43extern const struct mxs_gpmi_nand_data mx28_gpmi_nand_data __initconst;
44#define mx28_add_gpmi_nand(pdata) \
45 mxs_add_gpmi_nand(pdata, &mx28_gpmi_nand_data)
46
47extern const struct mxs_mxs_i2c_data mx28_mxs_i2c_data[] __initconst;
48#define mx28_add_mxs_i2c(id) mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id])
49
50extern const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst;
51#define mx28_add_mxs_mmc(id, pdata) \
52 mxs_add_mxs_mmc(&mx28_mxs_mmc_data[id], pdata)
53
54#define mx28_add_mxs_pwm(id) mxs_add_mxs_pwm(MX28_PWM_BASE_ADDR, id)
55
56struct platform_device *__init mx28_add_mxsfb(
57 const struct mxsfb_platform_data *pdata);
58
59extern const struct mxs_saif_data mx28_saif_data[] __initconst;
60#define mx28_add_saif(id, pdata) \
61 mxs_add_saif(&mx28_saif_data[id], pdata)
62
63struct platform_device *__init mx28_add_rtc_stmp3xxx(void);
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c
deleted file mode 100644
index cf50b5a66dda..000000000000
--- a/arch/arm/mach-mxs/devices.c
+++ /dev/null
@@ -1,87 +0,0 @@
1/*
2 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18
19#include <linux/kernel.h>
20#include <linux/slab.h>
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/amba/bus.h>
24
25struct platform_device *__init mxs_add_platform_device_dmamask(
26 const char *name, int id,
27 const struct resource *res, unsigned int num_resources,
28 const void *data, size_t size_data, u64 dmamask)
29{
30 int ret = -ENOMEM;
31 struct platform_device *pdev;
32
33 pdev = platform_device_alloc(name, id);
34 if (!pdev)
35 goto err;
36
37 if (dmamask) {
38 /*
39 * This memory isn't freed when the device is put,
40 * I don't have a nice idea for that though. Conceptually
41 * dma_mask in struct device should not be a pointer.
42 * See http://thread.gmane.org/gmane.linux.kernel.pci/9081
43 */
44 pdev->dev.dma_mask =
45 kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
46 if (!pdev->dev.dma_mask)
47 /* ret is still -ENOMEM; */
48 goto err;
49
50 *pdev->dev.dma_mask = dmamask;
51 pdev->dev.coherent_dma_mask = dmamask;
52 }
53
54 if (res) {
55 ret = platform_device_add_resources(pdev, res, num_resources);
56 if (ret)
57 goto err;
58 }
59
60 if (data) {
61 ret = platform_device_add_data(pdev, data, size_data);
62 if (ret)
63 goto err;
64 }
65
66 ret = platform_device_add(pdev);
67 if (ret) {
68err:
69 if (dmamask)
70 kfree(pdev->dev.dma_mask);
71 platform_device_put(pdev);
72 return ERR_PTR(ret);
73 }
74
75 return pdev;
76}
77
78struct device mxs_apbh_bus = {
79 .init_name = "mxs_apbh",
80 .parent = &platform_bus,
81};
82
83static int __init mxs_device_init(void)
84{
85 return device_register(&mxs_apbh_bus);
86}
87core_initcall(mxs_device_init);
diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig
deleted file mode 100644
index 19659de1c4e8..000000000000
--- a/arch/arm/mach-mxs/devices/Kconfig
+++ /dev/null
@@ -1,33 +0,0 @@
1config MXS_HAVE_AMBA_DUART
2 bool
3
4config MXS_HAVE_PLATFORM_AUART
5 bool
6
7config MXS_HAVE_PLATFORM_FEC
8 bool
9
10config MXS_HAVE_PLATFORM_FLEXCAN
11 select HAVE_CAN_FLEXCAN if CAN
12 bool
13
14config MXS_HAVE_PLATFORM_GPMI_NAND
15 bool
16
17config MXS_HAVE_PLATFORM_MXS_I2C
18 bool
19
20config MXS_HAVE_PLATFORM_MXS_MMC
21 bool
22
23config MXS_HAVE_PLATFORM_MXS_PWM
24 bool
25
26config MXS_HAVE_PLATFORM_MXSFB
27 bool
28
29config MXS_HAVE_PLATFORM_MXS_SAIF
30 bool
31
32config MXS_HAVE_PLATFORM_RTC_STMP3XXX
33 bool
diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile
deleted file mode 100644
index 5f72d9787444..000000000000
--- a/arch/arm/mach-mxs/devices/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
1obj-$(CONFIG_MXS_HAVE_PLATFORM_AUART) += platform-auart.o
2obj-y += platform-dma.o
3obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o
4obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
5obj-$(CONFIG_MXS_HAVE_PLATFORM_GPMI_NAND) += platform-gpmi-nand.o
6obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o
7obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o
8obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o
9obj-y += platform-gpio-mxs.o
10obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o
11obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_SAIF) += platform-mxs-saif.o
12obj-$(CONFIG_MXS_HAVE_PLATFORM_RTC_STMP3XXX) += platform-rtc-stmp3xxx.o
diff --git a/arch/arm/mach-mxs/devices/platform-auart.c b/arch/arm/mach-mxs/devices/platform-auart.c
deleted file mode 100644
index 27608f5d2ac8..000000000000
--- a/arch/arm/mach-mxs/devices/platform-auart.c
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Sascha Hauer <s.hauer@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <linux/dma-mapping.h>
10#include <asm/sizes.h>
11#include <mach/mx23.h>
12#include <mach/mx28.h>
13#include <mach/devices-common.h>
14
15#define mxs_auart_data_entry_single(soc, _id, hwid) \
16 { \
17 .id = _id, \
18 .iobase = soc ## _AUART ## hwid ## _BASE_ADDR, \
19 .irq = soc ## _INT_AUART ## hwid, \
20 }
21
22#define mxs_auart_data_entry(soc, _id, hwid) \
23 [_id] = mxs_auart_data_entry_single(soc, _id, hwid)
24
25#ifdef CONFIG_SOC_IMX23
26const struct mxs_auart_data mx23_auart_data[] __initconst = {
27#define mx23_auart_data_entry(_id, hwid) \
28 mxs_auart_data_entry(MX23, _id, hwid)
29 mx23_auart_data_entry(0, 1),
30 mx23_auart_data_entry(1, 2),
31};
32#endif
33
34#ifdef CONFIG_SOC_IMX28
35const struct mxs_auart_data mx28_auart_data[] __initconst = {
36#define mx28_auart_data_entry(_id) \
37 mxs_auart_data_entry(MX28, _id, _id)
38 mx28_auart_data_entry(0),
39 mx28_auart_data_entry(1),
40 mx28_auart_data_entry(2),
41 mx28_auart_data_entry(3),
42 mx28_auart_data_entry(4),
43};
44#endif
45
46struct platform_device *__init mxs_add_auart(
47 const struct mxs_auart_data *data)
48{
49 struct resource res[] = {
50 {
51 .start = data->iobase,
52 .end = data->iobase + SZ_8K - 1,
53 .flags = IORESOURCE_MEM,
54 }, {
55 .start = data->irq,
56 .end = data->irq,
57 .flags = IORESOURCE_IRQ,
58 },
59 };
60
61 return mxs_add_platform_device_dmamask("mxs-auart", data->id,
62 res, ARRAY_SIZE(res), NULL, 0,
63 DMA_BIT_MASK(32));
64}
65
diff --git a/arch/arm/mach-mxs/devices/platform-dma.c b/arch/arm/mach-mxs/devices/platform-dma.c
deleted file mode 100644
index 46824501de00..000000000000
--- a/arch/arm/mach-mxs/devices/platform-dma.c
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 */
8#include <linux/compiler.h>
9#include <linux/dma-mapping.h>
10#include <linux/err.h>
11#include <linux/init.h>
12
13#include <mach/mx23.h>
14#include <mach/mx28.h>
15#include <mach/devices-common.h>
16
17struct platform_device *__init mxs_add_dma(const char *devid,
18 resource_size_t base)
19{
20 struct resource res[] = {
21 {
22 .start = base,
23 .end = base + SZ_8K - 1,
24 .flags = IORESOURCE_MEM,
25 }
26 };
27
28 return mxs_add_platform_device_dmamask(devid, -1,
29 res, ARRAY_SIZE(res), NULL, 0,
30 DMA_BIT_MASK(32));
31}
diff --git a/arch/arm/mach-mxs/devices/platform-fec.c b/arch/arm/mach-mxs/devices/platform-fec.c
deleted file mode 100644
index ae96a4fd8f14..000000000000
--- a/arch/arm/mach-mxs/devices/platform-fec.c
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <linux/dma-mapping.h>
10#include <asm/sizes.h>
11#include <mach/mx28.h>
12#include <mach/devices-common.h>
13
14#define mxs_fec_data_entry_single(soc, _id) \
15 { \
16 .id = _id, \
17 .iobase = soc ## _ENET_MAC ## _id ## _BASE_ADDR, \
18 .irq = soc ## _INT_ENET_MAC ## _id, \
19 }
20
21#define mxs_fec_data_entry(soc, _id) \
22 [_id] = mxs_fec_data_entry_single(soc, _id)
23
24#ifdef CONFIG_SOC_IMX28
25const struct mxs_fec_data mx28_fec_data[] __initconst = {
26#define mx28_fec_data_entry(_id) \
27 mxs_fec_data_entry(MX28, _id)
28 mx28_fec_data_entry(0),
29 mx28_fec_data_entry(1),
30};
31#endif
32
33struct platform_device *__init mxs_add_fec(
34 const struct mxs_fec_data *data,
35 const struct fec_platform_data *pdata)
36{
37 struct resource res[] = {
38 {
39 .start = data->iobase,
40 .end = data->iobase + SZ_16K - 1,
41 .flags = IORESOURCE_MEM,
42 }, {
43 .start = data->irq,
44 .end = data->irq,
45 .flags = IORESOURCE_IRQ,
46 },
47 };
48
49 return mxs_add_platform_device_dmamask("imx28-fec", data->id,
50 res, ARRAY_SIZE(res), pdata, sizeof(*pdata),
51 DMA_BIT_MASK(32));
52}
diff --git a/arch/arm/mach-mxs/devices/platform-flexcan.c b/arch/arm/mach-mxs/devices/platform-flexcan.c
deleted file mode 100644
index 43a6b4bae6fe..000000000000
--- a/arch/arm/mach-mxs/devices/platform-flexcan.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * Copyright (C) 2010, 2011 Pengutronix,
3 * Marc Kleine-Budde <kernel@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <asm/sizes.h>
10#include <mach/mx28.h>
11#include <mach/devices-common.h>
12
13#define mxs_flexcan_data_entry_single(soc, _id, _hwid, _size) \
14 { \
15 .id = _id, \
16 .iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \
17 .iosize = _size, \
18 .irq = soc ## _INT_CAN ## _hwid, \
19 }
20
21#define mxs_flexcan_data_entry(soc, _id, _hwid, _size) \
22 [_id] = mxs_flexcan_data_entry_single(soc, _id, _hwid, _size)
23
24#ifdef CONFIG_SOC_IMX28
25const struct mxs_flexcan_data mx28_flexcan_data[] __initconst = {
26#define mx28_flexcan_data_entry(_id, _hwid) \
27 mxs_flexcan_data_entry_single(MX28, _id, _hwid, SZ_8K)
28 mx28_flexcan_data_entry(0, 0),
29 mx28_flexcan_data_entry(1, 1),
30};
31#endif /* ifdef CONFIG_SOC_IMX28 */
32
33struct platform_device *__init mxs_add_flexcan(
34 const struct mxs_flexcan_data *data,
35 const struct flexcan_platform_data *pdata)
36{
37 struct resource res[] = {
38 {
39 .start = data->iobase,
40 .end = data->iobase + data->iosize - 1,
41 .flags = IORESOURCE_MEM,
42 }, {
43 .start = data->irq,
44 .end = data->irq,
45 .flags = IORESOURCE_IRQ,
46 },
47 };
48
49 return mxs_add_platform_device("flexcan", data->id,
50 res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
51}
diff --git a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c
deleted file mode 100644
index cd99f19ec637..000000000000
--- a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 */
8#include <linux/compiler.h>
9#include <linux/err.h>
10#include <linux/init.h>
11
12#include <mach/mx23.h>
13#include <mach/mx28.h>
14#include <mach/devices-common.h>
15
16struct platform_device *__init mxs_add_gpio(
17 char *name, int id, resource_size_t iobase, int irq)
18{
19 struct resource res[] = {
20 {
21 .start = iobase,
22 .end = iobase + SZ_8K - 1,
23 .flags = IORESOURCE_MEM,
24 }, {
25 .start = irq,
26 .end = irq,
27 .flags = IORESOURCE_IRQ,
28 },
29 };
30
31 return platform_device_register_resndata(&mxs_apbh_bus,
32 name, id, res, ARRAY_SIZE(res), NULL, 0);
33}
diff --git a/arch/arm/mach-mxs/devices/platform-gpmi-nand.c b/arch/arm/mach-mxs/devices/platform-gpmi-nand.c
deleted file mode 100644
index 3e22df5944a8..000000000000
--- a/arch/arm/mach-mxs/devices/platform-gpmi-nand.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18#include <asm/sizes.h>
19#include <mach/mx23.h>
20#include <mach/mx28.h>
21#include <mach/devices-common.h>
22#include <linux/dma-mapping.h>
23
24#ifdef CONFIG_SOC_IMX23
25const struct mxs_gpmi_nand_data mx23_gpmi_nand_data __initconst = {
26 .devid = "imx23-gpmi-nand",
27 .res = {
28 /* GPMI */
29 DEFINE_RES_MEM_NAMED(MX23_GPMI_BASE_ADDR, SZ_8K,
30 GPMI_NAND_GPMI_REGS_ADDR_RES_NAME),
31 DEFINE_RES_IRQ_NAMED(MX23_INT_GPMI_ATTENTION,
32 GPMI_NAND_GPMI_INTERRUPT_RES_NAME),
33 /* BCH */
34 DEFINE_RES_MEM_NAMED(MX23_BCH_BASE_ADDR, SZ_8K,
35 GPMI_NAND_BCH_REGS_ADDR_RES_NAME),
36 DEFINE_RES_IRQ_NAMED(MX23_INT_BCH,
37 GPMI_NAND_BCH_INTERRUPT_RES_NAME),
38 /* DMA */
39 DEFINE_RES_NAMED(MX23_DMA_GPMI0,
40 MX23_DMA_GPMI3 - MX23_DMA_GPMI0 + 1,
41 GPMI_NAND_DMA_CHANNELS_RES_NAME,
42 IORESOURCE_DMA),
43 DEFINE_RES_IRQ_NAMED(MX23_INT_GPMI_DMA,
44 GPMI_NAND_DMA_INTERRUPT_RES_NAME),
45 },
46};
47#endif
48
49#ifdef CONFIG_SOC_IMX28
50const struct mxs_gpmi_nand_data mx28_gpmi_nand_data __initconst = {
51 .devid = "imx28-gpmi-nand",
52 .res = {
53 /* GPMI */
54 DEFINE_RES_MEM_NAMED(MX28_GPMI_BASE_ADDR, SZ_8K,
55 GPMI_NAND_GPMI_REGS_ADDR_RES_NAME),
56 DEFINE_RES_IRQ_NAMED(MX28_INT_GPMI,
57 GPMI_NAND_GPMI_INTERRUPT_RES_NAME),
58 /* BCH */
59 DEFINE_RES_MEM_NAMED(MX28_BCH_BASE_ADDR, SZ_8K,
60 GPMI_NAND_BCH_REGS_ADDR_RES_NAME),
61 DEFINE_RES_IRQ_NAMED(MX28_INT_BCH,
62 GPMI_NAND_BCH_INTERRUPT_RES_NAME),
63 /* DMA */
64 DEFINE_RES_NAMED(MX28_DMA_GPMI0,
65 MX28_DMA_GPMI7 - MX28_DMA_GPMI0 + 1,
66 GPMI_NAND_DMA_CHANNELS_RES_NAME,
67 IORESOURCE_DMA),
68 DEFINE_RES_IRQ_NAMED(MX28_INT_GPMI_DMA,
69 GPMI_NAND_DMA_INTERRUPT_RES_NAME),
70 },
71};
72#endif
73
74struct platform_device *__init
75mxs_add_gpmi_nand(const struct gpmi_nand_platform_data *pdata,
76 const struct mxs_gpmi_nand_data *data)
77{
78 return mxs_add_platform_device_dmamask(data->devid, -1,
79 data->res, GPMI_NAND_RES_SIZE,
80 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
81}
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-i2c.c b/arch/arm/mach-mxs/devices/platform-mxs-i2c.c
deleted file mode 100644
index 79222ec8ede1..000000000000
--- a/arch/arm/mach-mxs/devices/platform-mxs-i2c.c
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * Copyright (C) 2011 Pengutronix
3 * Wolfram Sang <w.sang@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <asm/sizes.h>
10#include <mach/mx28.h>
11#include <mach/devices-common.h>
12
13#define mxs_i2c_data_entry_single(soc, _id) \
14 { \
15 .id = _id, \
16 .iobase = soc ## _I2C ## _id ## _BASE_ADDR, \
17 .errirq = soc ## _INT_I2C ## _id ## _ERROR, \
18 .dmairq = soc ## _INT_I2C ## _id ## _DMA, \
19 }
20
21#define mxs_i2c_data_entry(soc, _id) \
22 [_id] = mxs_i2c_data_entry_single(soc, _id)
23
24#ifdef CONFIG_SOC_IMX28
25const struct mxs_mxs_i2c_data mx28_mxs_i2c_data[] __initconst = {
26 mxs_i2c_data_entry(MX28, 0),
27 mxs_i2c_data_entry(MX28, 1),
28};
29#endif
30
31struct platform_device *__init mxs_add_mxs_i2c(
32 const struct mxs_mxs_i2c_data *data)
33{
34 struct resource res[] = {
35 {
36 .start = data->iobase,
37 .end = data->iobase + SZ_8K - 1,
38 .flags = IORESOURCE_MEM,
39 }, {
40 .start = data->errirq,
41 .end = data->errirq,
42 .flags = IORESOURCE_IRQ,
43 }, {
44 .start = data->dmairq,
45 .end = data->dmairq,
46 .flags = IORESOURCE_IRQ,
47 },
48 };
49
50 return mxs_add_platform_device("mxs-i2c", data->id, res,
51 ARRAY_SIZE(res), NULL, 0);
52}
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
deleted file mode 100644
index b33c9d05c552..000000000000
--- a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
+++ /dev/null
@@ -1,76 +0,0 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License version 2 as published by the
9 * Free Software Foundation.
10 */
11
12#include <linux/compiler.h>
13#include <linux/err.h>
14#include <linux/init.h>
15
16#include <mach/mx23.h>
17#include <mach/mx28.h>
18#include <mach/devices-common.h>
19
20#define mxs_mxs_mmc_data_entry_single(soc, _devid, _id, hwid) \
21 { \
22 .devid = _devid, \
23 .id = _id, \
24 .iobase = soc ## _SSP ## hwid ## _BASE_ADDR, \
25 .dma = soc ## _DMA_SSP ## hwid, \
26 .irq_err = soc ## _INT_SSP ## hwid ## _ERROR, \
27 .irq_dma = soc ## _INT_SSP ## hwid ## _DMA, \
28 }
29
30#define mxs_mxs_mmc_data_entry(soc, _devid, _id, hwid) \
31 [_id] = mxs_mxs_mmc_data_entry_single(soc, _devid, _id, hwid)
32
33
34#ifdef CONFIG_SOC_IMX23
35const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst = {
36 mxs_mxs_mmc_data_entry(MX23, "imx23-mmc", 0, 1),
37 mxs_mxs_mmc_data_entry(MX23, "imx23-mmc", 1, 2),
38};
39#endif
40
41#ifdef CONFIG_SOC_IMX28
42const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst = {
43 mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 0, 0),
44 mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 1, 1),
45 mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 2, 2),
46 mxs_mxs_mmc_data_entry(MX28, "imx28-mmc", 3, 3),
47};
48#endif
49
50struct platform_device *__init mxs_add_mxs_mmc(
51 const struct mxs_mxs_mmc_data *data,
52 const struct mxs_mmc_platform_data *pdata)
53{
54 struct resource res[] = {
55 {
56 .start = data->iobase,
57 .end = data->iobase + SZ_8K - 1,
58 .flags = IORESOURCE_MEM,
59 }, {
60 .start = data->dma,
61 .end = data->dma,
62 .flags = IORESOURCE_DMA,
63 }, {
64 .start = data->irq_err,
65 .end = data->irq_err,
66 .flags = IORESOURCE_IRQ,
67 }, {
68 .start = data->irq_dma,
69 .end = data->irq_dma,
70 .flags = IORESOURCE_IRQ,
71 },
72 };
73
74 return mxs_add_platform_device(data->devid, data->id,
75 res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
76}
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-pwm.c b/arch/arm/mach-mxs/devices/platform-mxs-pwm.c
deleted file mode 100644
index 680f5a902936..000000000000
--- a/arch/arm/mach-mxs/devices/platform-mxs-pwm.c
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Sascha Hauer <s.hauer@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <asm/sizes.h>
10#include <mach/devices-common.h>
11
12struct platform_device *__init mxs_add_mxs_pwm(resource_size_t iobase, int id)
13{
14 struct resource res = {
15 .flags = IORESOURCE_MEM,
16 };
17
18 res.start = iobase + 0x10 + 0x20 * id;
19 res.end = res.start + 0x1f;
20
21 return mxs_add_platform_device("mxs-pwm", id, &res, 1, NULL, 0);
22}
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-saif.c b/arch/arm/mach-mxs/devices/platform-mxs-saif.c
deleted file mode 100644
index f6e3a60b4201..000000000000
--- a/arch/arm/mach-mxs/devices/platform-mxs-saif.c
+++ /dev/null
@@ -1,61 +0,0 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 */
8#include <linux/compiler.h>
9#include <linux/err.h>
10#include <linux/init.h>
11
12#include <mach/mx23.h>
13#include <mach/mx28.h>
14#include <mach/devices-common.h>
15
16#define mxs_saif_data_entry_single(soc, _id) \
17 { \
18 .id = _id, \
19 .iobase = soc ## _SAIF ## _id ## _BASE_ADDR, \
20 .irq = soc ## _INT_SAIF ## _id, \
21 .dma = soc ## _DMA_SAIF ## _id, \
22 .dmairq = soc ## _INT_SAIF ## _id ##_DMA, \
23 }
24
25#define mxs_saif_data_entry(soc, _id) \
26 [_id] = mxs_saif_data_entry_single(soc, _id)
27
28#ifdef CONFIG_SOC_IMX28
29const struct mxs_saif_data mx28_saif_data[] __initconst = {
30 mxs_saif_data_entry(MX28, 0),
31 mxs_saif_data_entry(MX28, 1),
32};
33#endif
34
35struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data,
36 const struct mxs_saif_platform_data *pdata)
37{
38 struct resource res[] = {
39 {
40 .start = data->iobase,
41 .end = data->iobase + SZ_4K - 1,
42 .flags = IORESOURCE_MEM,
43 }, {
44 .start = data->irq,
45 .end = data->irq,
46 .flags = IORESOURCE_IRQ,
47 }, {
48 .start = data->dma,
49 .end = data->dma,
50 .flags = IORESOURCE_DMA,
51 }, {
52 .start = data->dmairq,
53 .end = data->dmairq,
54 .flags = IORESOURCE_IRQ,
55 },
56
57 };
58
59 return mxs_add_platform_device("mxs-saif", data->id, res,
60 ARRAY_SIZE(res), pdata, sizeof(*pdata));
61}
diff --git a/arch/arm/mach-mxs/devices/platform-mxsfb.c b/arch/arm/mach-mxs/devices/platform-mxsfb.c
deleted file mode 100644
index 76b53f73418e..000000000000
--- a/arch/arm/mach-mxs/devices/platform-mxsfb.c
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * Copyright (C) 2011 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 */
8#include <linux/dma-mapping.h>
9#include <asm/sizes.h>
10#include <mach/mx23.h>
11#include <mach/mx28.h>
12#include <mach/devices-common.h>
13#include <linux/mxsfb.h>
14
15#ifdef CONFIG_SOC_IMX23
16struct platform_device *__init mx23_add_mxsfb(
17 const struct mxsfb_platform_data *pdata)
18{
19 struct resource res[] = {
20 {
21 .start = MX23_LCDIF_BASE_ADDR,
22 .end = MX23_LCDIF_BASE_ADDR + SZ_8K - 1,
23 .flags = IORESOURCE_MEM,
24 },
25 };
26
27 return mxs_add_platform_device_dmamask("imx23-fb", -1,
28 res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32));
29}
30#endif /* ifdef CONFIG_SOC_IMX23 */
31
32#ifdef CONFIG_SOC_IMX28
33struct platform_device *__init mx28_add_mxsfb(
34 const struct mxsfb_platform_data *pdata)
35{
36 struct resource res[] = {
37 {
38 .start = MX28_LCDIF_BASE_ADDR,
39 .end = MX28_LCDIF_BASE_ADDR + SZ_8K - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 };
43
44 return mxs_add_platform_device_dmamask("imx28-fb", -1,
45 res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32));
46}
47#endif /* ifdef CONFIG_SOC_IMX28 */
diff --git a/arch/arm/mach-mxs/devices/platform-rtc-stmp3xxx.c b/arch/arm/mach-mxs/devices/platform-rtc-stmp3xxx.c
deleted file mode 100644
index 639eaee15553..000000000000
--- a/arch/arm/mach-mxs/devices/platform-rtc-stmp3xxx.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * Copyright (C) 2011 Pengutronix, Wolfram Sang <w.sang@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 */
8#include <asm/sizes.h>
9#include <mach/mx23.h>
10#include <mach/mx28.h>
11#include <mach/devices-common.h>
12
13#ifdef CONFIG_SOC_IMX23
14struct platform_device *__init mx23_add_rtc_stmp3xxx(void)
15{
16 struct resource res[] = {
17 {
18 .start = MX23_RTC_BASE_ADDR,
19 .end = MX23_RTC_BASE_ADDR + SZ_8K - 1,
20 .flags = IORESOURCE_MEM,
21 }, {
22 .start = MX23_INT_RTC_ALARM,
23 .end = MX23_INT_RTC_ALARM,
24 .flags = IORESOURCE_IRQ,
25 },
26 };
27
28 return mxs_add_platform_device("stmp3xxx-rtc", 0, res, ARRAY_SIZE(res),
29 NULL, 0);
30}
31#endif /* CONFIG_SOC_IMX23 */
32
33#ifdef CONFIG_SOC_IMX28
34struct platform_device *__init mx28_add_rtc_stmp3xxx(void)
35{
36 struct resource res[] = {
37 {
38 .start = MX28_RTC_BASE_ADDR,
39 .end = MX28_RTC_BASE_ADDR + SZ_8K - 1,
40 .flags = IORESOURCE_MEM,
41 }, {
42 .start = MX28_INT_RTC_ALARM,
43 .end = MX28_INT_RTC_ALARM,
44 .flags = IORESOURCE_IRQ,
45 },
46 };
47
48 return mxs_add_platform_device("stmp3xxx-rtc", 0, res, ARRAY_SIZE(res),
49 NULL, 0);
50}
51#endif /* CONFIG_SOC_IMX28 */
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index de6c7ba42544..4dec79563f19 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -17,21 +17,12 @@ extern void mxs_timer_init(int);
17extern void mxs_restart(char, const char *); 17extern void mxs_restart(char, const char *);
18extern int mxs_saif_clkmux_select(unsigned int clkmux); 18extern int mxs_saif_clkmux_select(unsigned int clkmux);
19 19
20extern void mx23_soc_init(void);
21extern int mx23_clocks_init(void); 20extern int mx23_clocks_init(void);
22extern void mx23_map_io(void); 21extern void mx23_map_io(void);
23extern void mx23_init_irq(void);
24 22
25extern void mx28_soc_init(void);
26extern int mx28_clocks_init(void); 23extern int mx28_clocks_init(void);
27extern void mx28_map_io(void); 24extern void mx28_map_io(void);
28extern void mx28_init_irq(void);
29 25
30extern void icoll_init_irq(void); 26extern void icoll_init_irq(void);
31 27
32extern struct platform_device *mxs_add_dma(const char *devid,
33 resource_size_t base);
34extern struct platform_device *mxs_add_gpio(char *name, int id,
35 resource_size_t iobase, int irq);
36
37#endif /* __MACH_MXS_COMMON_H__ */ 28#endif /* __MACH_MXS_COMMON_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
deleted file mode 100644
index e8b1d958240b..000000000000
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ /dev/null
@@ -1,114 +0,0 @@
1/*
2 * Copyright (C) 2009-2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9#include <linux/kernel.h>
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/amba/bus.h>
13
14extern struct device mxs_apbh_bus;
15
16struct platform_device *mxs_add_platform_device_dmamask(
17 const char *name, int id,
18 const struct resource *res, unsigned int num_resources,
19 const void *data, size_t size_data, u64 dmamask);
20
21static inline struct platform_device *mxs_add_platform_device(
22 const char *name, int id,
23 const struct resource *res, unsigned int num_resources,
24 const void *data, size_t size_data)
25{
26 return mxs_add_platform_device_dmamask(
27 name, id, res, num_resources, data, size_data, 0);
28}
29
30/* auart */
31struct mxs_auart_data {
32 int id;
33 resource_size_t iobase;
34 resource_size_t iosize;
35 resource_size_t irq;
36};
37struct platform_device *__init mxs_add_auart(
38 const struct mxs_auart_data *data);
39
40/* fec */
41#include <linux/fec.h>
42struct mxs_fec_data {
43 int id;
44 resource_size_t iobase;
45 resource_size_t iosize;
46 resource_size_t irq;
47};
48struct platform_device *__init mxs_add_fec(
49 const struct mxs_fec_data *data,
50 const struct fec_platform_data *pdata);
51
52/* flexcan */
53#include <linux/can/platform/flexcan.h>
54struct mxs_flexcan_data {
55 int id;
56 resource_size_t iobase;
57 resource_size_t iosize;
58 resource_size_t irq;
59};
60struct platform_device *__init mxs_add_flexcan(
61 const struct mxs_flexcan_data *data,
62 const struct flexcan_platform_data *pdata);
63
64/* gpmi-nand */
65#include <linux/mtd/gpmi-nand.h>
66struct mxs_gpmi_nand_data {
67 const char *devid;
68 const struct resource res[GPMI_NAND_RES_SIZE];
69};
70struct platform_device *__init
71mxs_add_gpmi_nand(const struct gpmi_nand_platform_data *pdata,
72 const struct mxs_gpmi_nand_data *data);
73
74/* i2c */
75struct mxs_mxs_i2c_data {
76 int id;
77 resource_size_t iobase;
78 resource_size_t errirq;
79 resource_size_t dmairq;
80};
81struct platform_device * __init mxs_add_mxs_i2c(
82 const struct mxs_mxs_i2c_data *data);
83
84/* mmc */
85#include <linux/mmc/mxs-mmc.h>
86struct mxs_mxs_mmc_data {
87 const char *devid;
88 int id;
89 resource_size_t iobase;
90 resource_size_t dma;
91 resource_size_t irq_err;
92 resource_size_t irq_dma;
93};
94struct platform_device *__init mxs_add_mxs_mmc(
95 const struct mxs_mxs_mmc_data *data,
96 const struct mxs_mmc_platform_data *pdata);
97
98/* pwm */
99struct platform_device *__init mxs_add_mxs_pwm(
100 resource_size_t iobase, int id);
101
102/* saif */
103#include <sound/saif.h>
104struct mxs_saif_data {
105 int id;
106 resource_size_t iobase;
107 resource_size_t irq;
108 resource_size_t dma;
109 resource_size_t dmairq;
110};
111
112struct platform_device *__init mxs_add_saif(
113 const struct mxs_saif_data *data,
114 const struct mxs_saif_platform_data *pdata);
diff --git a/arch/arm/mach-mxs/include/mach/iomux-mx23.h b/arch/arm/mach-mxs/include/mach/iomux-mx23.h
deleted file mode 100644
index b0190a4822f2..000000000000
--- a/arch/arm/mach-mxs/include/mach/iomux-mx23.h
+++ /dev/null
@@ -1,355 +0,0 @@
1/*
2 * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#ifndef __MACH_IOMUX_MX23_H__
14#define __MACH_IOMUX_MX23_H__
15
16#include <mach/iomux.h>
17
18/*
19 * The naming convention for the pad modes is MX23_PAD_<padname>__<padmode>
20 * If <padname> or <padmode> refers to a GPIO, it is named GPIO_<unit>_<num>
21 * See also iomux.h
22 *
23 * BANK PIN MUX
24 */
25/* MUXSEL_0 */
26#define MX23_PAD_GPMI_D00__GPMI_D00 MXS_IOMUX_PAD_NAKED(0, 0, PAD_MUXSEL_0)
27#define MX23_PAD_GPMI_D01__GPMI_D01 MXS_IOMUX_PAD_NAKED(0, 1, PAD_MUXSEL_0)
28#define MX23_PAD_GPMI_D02__GPMI_D02 MXS_IOMUX_PAD_NAKED(0, 2, PAD_MUXSEL_0)
29#define MX23_PAD_GPMI_D03__GPMI_D03 MXS_IOMUX_PAD_NAKED(0, 3, PAD_MUXSEL_0)
30#define MX23_PAD_GPMI_D04__GPMI_D04 MXS_IOMUX_PAD_NAKED(0, 4, PAD_MUXSEL_0)
31#define MX23_PAD_GPMI_D05__GPMI_D05 MXS_IOMUX_PAD_NAKED(0, 5, PAD_MUXSEL_0)
32#define MX23_PAD_GPMI_D06__GPMI_D06 MXS_IOMUX_PAD_NAKED(0, 6, PAD_MUXSEL_0)
33#define MX23_PAD_GPMI_D07__GPMI_D07 MXS_IOMUX_PAD_NAKED(0, 7, PAD_MUXSEL_0)
34#define MX23_PAD_GPMI_D08__GPMI_D08 MXS_IOMUX_PAD_NAKED(0, 8, PAD_MUXSEL_0)
35#define MX23_PAD_GPMI_D09__GPMI_D09 MXS_IOMUX_PAD_NAKED(0, 9, PAD_MUXSEL_0)
36#define MX23_PAD_GPMI_D10__GPMI_D10 MXS_IOMUX_PAD_NAKED(0, 10, PAD_MUXSEL_0)
37#define MX23_PAD_GPMI_D11__GPMI_D11 MXS_IOMUX_PAD_NAKED(0, 11, PAD_MUXSEL_0)
38#define MX23_PAD_GPMI_D12__GPMI_D12 MXS_IOMUX_PAD_NAKED(0, 12, PAD_MUXSEL_0)
39#define MX23_PAD_GPMI_D13__GPMI_D13 MXS_IOMUX_PAD_NAKED(0, 13, PAD_MUXSEL_0)
40#define MX23_PAD_GPMI_D14__GPMI_D14 MXS_IOMUX_PAD_NAKED(0, 14, PAD_MUXSEL_0)
41#define MX23_PAD_GPMI_D15__GPMI_D15 MXS_IOMUX_PAD_NAKED(0, 15, PAD_MUXSEL_0)
42#define MX23_PAD_GPMI_CLE__GPMI_CLE MXS_IOMUX_PAD_NAKED(0, 16, PAD_MUXSEL_0)
43#define MX23_PAD_GPMI_ALE__GPMI_ALE MXS_IOMUX_PAD_NAKED(0, 17, PAD_MUXSEL_0)
44#define MX23_PAD_GPMI_CE2N__GPMI_CE2N MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_0)
45#define MX23_PAD_GPMI_RDY0__GPMI_RDY0 MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_0)
46#define MX23_PAD_GPMI_RDY1__GPMI_RDY1 MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_0)
47#define MX23_PAD_GPMI_RDY2__GPMI_RDY2 MXS_IOMUX_PAD_NAKED(0, 21, PAD_MUXSEL_0)
48#define MX23_PAD_GPMI_RDY3__GPMI_RDY3 MXS_IOMUX_PAD_NAKED(0, 22, PAD_MUXSEL_0)
49#define MX23_PAD_GPMI_WPN__GPMI_WPN MXS_IOMUX_PAD_NAKED(0, 23, PAD_MUXSEL_0)
50#define MX23_PAD_GPMI_WRN__GPMI_WRN MXS_IOMUX_PAD_NAKED(0, 24, PAD_MUXSEL_0)
51#define MX23_PAD_GPMI_RDN__GPMI_RDN MXS_IOMUX_PAD_NAKED(0, 25, PAD_MUXSEL_0)
52#define MX23_PAD_AUART1_CTS__AUART1_CTS MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_0)
53#define MX23_PAD_AUART1_RTS__AUART1_RTS MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_0)
54#define MX23_PAD_AUART1_RX__AUART1_RX MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_0)
55#define MX23_PAD_AUART1_TX__AUART1_TX MXS_IOMUX_PAD_NAKED(0, 29, PAD_MUXSEL_0)
56#define MX23_PAD_I2C_SCL__I2C_SCL MXS_IOMUX_PAD_NAKED(0, 30, PAD_MUXSEL_0)
57#define MX23_PAD_I2C_SDA__I2C_SDA MXS_IOMUX_PAD_NAKED(0, 31, PAD_MUXSEL_0)
58
59#define MX23_PAD_LCD_D00__LCD_D00 MXS_IOMUX_PAD_NAKED(1, 0, PAD_MUXSEL_0)
60#define MX23_PAD_LCD_D01__LCD_D01 MXS_IOMUX_PAD_NAKED(1, 1, PAD_MUXSEL_0)
61#define MX23_PAD_LCD_D02__LCD_D02 MXS_IOMUX_PAD_NAKED(1, 2, PAD_MUXSEL_0)
62#define MX23_PAD_LCD_D03__LCD_D03 MXS_IOMUX_PAD_NAKED(1, 3, PAD_MUXSEL_0)
63#define MX23_PAD_LCD_D04__LCD_D04 MXS_IOMUX_PAD_NAKED(1, 4, PAD_MUXSEL_0)
64#define MX23_PAD_LCD_D05__LCD_D05 MXS_IOMUX_PAD_NAKED(1, 5, PAD_MUXSEL_0)
65#define MX23_PAD_LCD_D06__LCD_D06 MXS_IOMUX_PAD_NAKED(1, 6, PAD_MUXSEL_0)
66#define MX23_PAD_LCD_D07__LCD_D07 MXS_IOMUX_PAD_NAKED(1, 7, PAD_MUXSEL_0)
67#define MX23_PAD_LCD_D08__LCD_D08 MXS_IOMUX_PAD_NAKED(1, 8, PAD_MUXSEL_0)
68#define MX23_PAD_LCD_D09__LCD_D09 MXS_IOMUX_PAD_NAKED(1, 9, PAD_MUXSEL_0)
69#define MX23_PAD_LCD_D10__LCD_D10 MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_0)
70#define MX23_PAD_LCD_D11__LCD_D11 MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_0)
71#define MX23_PAD_LCD_D12__LCD_D12 MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_0)
72#define MX23_PAD_LCD_D13__LCD_D13 MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_0)
73#define MX23_PAD_LCD_D14__LCD_D14 MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_0)
74#define MX23_PAD_LCD_D15__LCD_D15 MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_0)
75#define MX23_PAD_LCD_D16__LCD_D16 MXS_IOMUX_PAD_NAKED(1, 16, PAD_MUXSEL_0)
76#define MX23_PAD_LCD_D17__LCD_D17 MXS_IOMUX_PAD_NAKED(1, 17, PAD_MUXSEL_0)
77#define MX23_PAD_LCD_RESET__LCD_RESET MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_0)
78#define MX23_PAD_LCD_RS__LCD_RS MXS_IOMUX_PAD_NAKED(1, 19, PAD_MUXSEL_0)
79#define MX23_PAD_LCD_WR__LCD_WR MXS_IOMUX_PAD_NAKED(1, 20, PAD_MUXSEL_0)
80#define MX23_PAD_LCD_CS__LCD_CS MXS_IOMUX_PAD_NAKED(1, 21, PAD_MUXSEL_0)
81#define MX23_PAD_LCD_DOTCK__LCD_DOTCK MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_0)
82#define MX23_PAD_LCD_ENABLE__LCD_ENABLE MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_0)
83#define MX23_PAD_LCD_HSYNC__LCD_HSYNC MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_0)
84#define MX23_PAD_LCD_VSYNC__LCD_VSYNC MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_0)
85#define MX23_PAD_PWM0__PWM0 MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_0)
86#define MX23_PAD_PWM1__PWM1 MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_0)
87#define MX23_PAD_PWM2__PWM2 MXS_IOMUX_PAD_NAKED(1, 28, PAD_MUXSEL_0)
88#define MX23_PAD_PWM3__PWM3 MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_0)
89#define MX23_PAD_PWM4__PWM4 MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_0)
90
91#define MX23_PAD_SSP1_CMD__SSP1_CMD MXS_IOMUX_PAD_NAKED(2, 0, PAD_MUXSEL_0)
92#define MX23_PAD_SSP1_DETECT__SSP1_DETECT MXS_IOMUX_PAD_NAKED(2, 1, PAD_MUXSEL_0)
93#define MX23_PAD_SSP1_DATA0__SSP1_DATA0 MXS_IOMUX_PAD_NAKED(2, 2, PAD_MUXSEL_0)
94#define MX23_PAD_SSP1_DATA1__SSP1_DATA1 MXS_IOMUX_PAD_NAKED(2, 3, PAD_MUXSEL_0)
95#define MX23_PAD_SSP1_DATA2__SSP1_DATA2 MXS_IOMUX_PAD_NAKED(2, 4, PAD_MUXSEL_0)
96#define MX23_PAD_SSP1_DATA3__SSP1_DATA3 MXS_IOMUX_PAD_NAKED(2, 5, PAD_MUXSEL_0)
97#define MX23_PAD_SSP1_SCK__SSP1_SCK MXS_IOMUX_PAD_NAKED(2, 6, PAD_MUXSEL_0)
98#define MX23_PAD_ROTARYA__ROTARYA MXS_IOMUX_PAD_NAKED(2, 7, PAD_MUXSEL_0)
99#define MX23_PAD_ROTARYB__ROTARYB MXS_IOMUX_PAD_NAKED(2, 8, PAD_MUXSEL_0)
100#define MX23_PAD_EMI_A00__EMI_A00 MXS_IOMUX_PAD_NAKED(2, 9, PAD_MUXSEL_0)
101#define MX23_PAD_EMI_A01__EMI_A01 MXS_IOMUX_PAD_NAKED(2, 10, PAD_MUXSEL_0)
102#define MX23_PAD_EMI_A02__EMI_A02 MXS_IOMUX_PAD_NAKED(2, 11, PAD_MUXSEL_0)
103#define MX23_PAD_EMI_A03__EMI_A03 MXS_IOMUX_PAD_NAKED(2, 12, PAD_MUXSEL_0)
104#define MX23_PAD_EMI_A04__EMI_A04 MXS_IOMUX_PAD_NAKED(2, 13, PAD_MUXSEL_0)
105#define MX23_PAD_EMI_A05__EMI_A05 MXS_IOMUX_PAD_NAKED(2, 14, PAD_MUXSEL_0)
106#define MX23_PAD_EMI_A06__EMI_A06 MXS_IOMUX_PAD_NAKED(2, 15, PAD_MUXSEL_0)
107#define MX23_PAD_EMI_A07__EMI_A07 MXS_IOMUX_PAD_NAKED(2, 16, PAD_MUXSEL_0)
108#define MX23_PAD_EMI_A08__EMI_A08 MXS_IOMUX_PAD_NAKED(2, 17, PAD_MUXSEL_0)
109#define MX23_PAD_EMI_A09__EMI_A09 MXS_IOMUX_PAD_NAKED(2, 18, PAD_MUXSEL_0)
110#define MX23_PAD_EMI_A10__EMI_A10 MXS_IOMUX_PAD_NAKED(2, 19, PAD_MUXSEL_0)
111#define MX23_PAD_EMI_A11__EMI_A11 MXS_IOMUX_PAD_NAKED(2, 20, PAD_MUXSEL_0)
112#define MX23_PAD_EMI_A12__EMI_A12 MXS_IOMUX_PAD_NAKED(2, 21, PAD_MUXSEL_0)
113#define MX23_PAD_EMI_BA0__EMI_BA0 MXS_IOMUX_PAD_NAKED(2, 22, PAD_MUXSEL_0)
114#define MX23_PAD_EMI_BA1__EMI_BA1 MXS_IOMUX_PAD_NAKED(2, 23, PAD_MUXSEL_0)
115#define MX23_PAD_EMI_CASN__EMI_CASN MXS_IOMUX_PAD_NAKED(2, 24, PAD_MUXSEL_0)
116#define MX23_PAD_EMI_CE0N__EMI_CE0N MXS_IOMUX_PAD_NAKED(2, 25, PAD_MUXSEL_0)
117#define MX23_PAD_EMI_CE1N__EMI_CE1N MXS_IOMUX_PAD_NAKED(2, 26, PAD_MUXSEL_0)
118#define MX23_PAD_GPMI_CE1N__GPMI_CE1N MXS_IOMUX_PAD_NAKED(2, 27, PAD_MUXSEL_0)
119#define MX23_PAD_GPMI_CE0N__GPMI_CE0N MXS_IOMUX_PAD_NAKED(2, 28, PAD_MUXSEL_0)
120#define MX23_PAD_EMI_CKE__EMI_CKE MXS_IOMUX_PAD_NAKED(2, 29, PAD_MUXSEL_0)
121#define MX23_PAD_EMI_RASN__EMI_RASN MXS_IOMUX_PAD_NAKED(2, 30, PAD_MUXSEL_0)
122#define MX23_PAD_EMI_WEN__EMI_WEN MXS_IOMUX_PAD_NAKED(2, 31, PAD_MUXSEL_0)
123
124#define MX23_PAD_EMI_D00__EMI_D00 MXS_IOMUX_PAD_NAKED(3, 0, PAD_MUXSEL_0)
125#define MX23_PAD_EMI_D01__EMI_D01 MXS_IOMUX_PAD_NAKED(3, 1, PAD_MUXSEL_0)
126#define MX23_PAD_EMI_D02__EMI_D02 MXS_IOMUX_PAD_NAKED(3, 2, PAD_MUXSEL_0)
127#define MX23_PAD_EMI_D03__EMI_D03 MXS_IOMUX_PAD_NAKED(3, 3, PAD_MUXSEL_0)
128#define MX23_PAD_EMI_D04__EMI_D04 MXS_IOMUX_PAD_NAKED(3, 4, PAD_MUXSEL_0)
129#define MX23_PAD_EMI_D05__EMI_D05 MXS_IOMUX_PAD_NAKED(3, 5, PAD_MUXSEL_0)
130#define MX23_PAD_EMI_D06__EMI_D06 MXS_IOMUX_PAD_NAKED(3, 6, PAD_MUXSEL_0)
131#define MX23_PAD_EMI_D07__EMI_D07 MXS_IOMUX_PAD_NAKED(3, 7, PAD_MUXSEL_0)
132#define MX23_PAD_EMI_D08__EMI_D08 MXS_IOMUX_PAD_NAKED(3, 8, PAD_MUXSEL_0)
133#define MX23_PAD_EMI_D09__EMI_D09 MXS_IOMUX_PAD_NAKED(3, 9, PAD_MUXSEL_0)
134#define MX23_PAD_EMI_D10__EMI_D10 MXS_IOMUX_PAD_NAKED(3, 10, PAD_MUXSEL_0)
135#define MX23_PAD_EMI_D11__EMI_D11 MXS_IOMUX_PAD_NAKED(3, 11, PAD_MUXSEL_0)
136#define MX23_PAD_EMI_D12__EMI_D12 MXS_IOMUX_PAD_NAKED(3, 12, PAD_MUXSEL_0)
137#define MX23_PAD_EMI_D13__EMI_D13 MXS_IOMUX_PAD_NAKED(3, 13, PAD_MUXSEL_0)
138#define MX23_PAD_EMI_D14__EMI_D14 MXS_IOMUX_PAD_NAKED(3, 14, PAD_MUXSEL_0)
139#define MX23_PAD_EMI_D15__EMI_D15 MXS_IOMUX_PAD_NAKED(3, 15, PAD_MUXSEL_0)
140#define MX23_PAD_EMI_DQM0__EMI_DQM0 MXS_IOMUX_PAD_NAKED(3, 16, PAD_MUXSEL_0)
141#define MX23_PAD_EMI_DQM1__EMI_DQM1 MXS_IOMUX_PAD_NAKED(3, 17, PAD_MUXSEL_0)
142#define MX23_PAD_EMI_DQS0__EMI_DQS0 MXS_IOMUX_PAD_NAKED(3, 18, PAD_MUXSEL_0)
143#define MX23_PAD_EMI_DQS1__EMI_DQS1 MXS_IOMUX_PAD_NAKED(3, 19, PAD_MUXSEL_0)
144#define MX23_PAD_EMI_CLK__EMI_CLK MXS_IOMUX_PAD_NAKED(3, 20, PAD_MUXSEL_0)
145#define MX23_PAD_EMI_CLKN__EMI_CLKN MXS_IOMUX_PAD_NAKED(3, 21, PAD_MUXSEL_0)
146
147/* MUXSEL_1 */
148#define MX23_PAD_GPMI_D00__LCD_D8 MXS_IOMUX_PAD_NAKED(0, 0, PAD_MUXSEL_1)
149#define MX23_PAD_GPMI_D01__LCD_D9 MXS_IOMUX_PAD_NAKED(0, 1, PAD_MUXSEL_1)
150#define MX23_PAD_GPMI_D02__LCD_D10 MXS_IOMUX_PAD_NAKED(0, 2, PAD_MUXSEL_1)
151#define MX23_PAD_GPMI_D03__LCD_D11 MXS_IOMUX_PAD_NAKED(0, 3, PAD_MUXSEL_1)
152#define MX23_PAD_GPMI_D04__LCD_D12 MXS_IOMUX_PAD_NAKED(0, 4, PAD_MUXSEL_1)
153#define MX23_PAD_GPMI_D05__LCD_D13 MXS_IOMUX_PAD_NAKED(0, 5, PAD_MUXSEL_1)
154#define MX23_PAD_GPMI_D06__LCD_D14 MXS_IOMUX_PAD_NAKED(0, 6, PAD_MUXSEL_1)
155#define MX23_PAD_GPMI_D07__LCD_D15 MXS_IOMUX_PAD_NAKED(0, 7, PAD_MUXSEL_1)
156#define MX23_PAD_GPMI_D08__LCD_D18 MXS_IOMUX_PAD_NAKED(0, 8, PAD_MUXSEL_1)
157#define MX23_PAD_GPMI_D09__LCD_D19 MXS_IOMUX_PAD_NAKED(0, 9, PAD_MUXSEL_1)
158#define MX23_PAD_GPMI_D10__LCD_D20 MXS_IOMUX_PAD_NAKED(0, 10, PAD_MUXSEL_1)
159#define MX23_PAD_GPMI_D11__LCD_D21 MXS_IOMUX_PAD_NAKED(0, 11, PAD_MUXSEL_1)
160#define MX23_PAD_GPMI_D12__LCD_D22 MXS_IOMUX_PAD_NAKED(0, 12, PAD_MUXSEL_1)
161#define MX23_PAD_GPMI_D13__LCD_D23 MXS_IOMUX_PAD_NAKED(0, 13, PAD_MUXSEL_1)
162#define MX23_PAD_GPMI_D14__AUART2_RX MXS_IOMUX_PAD_NAKED(0, 14, PAD_MUXSEL_1)
163#define MX23_PAD_GPMI_D15__AUART2_TX MXS_IOMUX_PAD_NAKED(0, 15, PAD_MUXSEL_1)
164#define MX23_PAD_GPMI_CLE__LCD_D16 MXS_IOMUX_PAD_NAKED(0, 16, PAD_MUXSEL_1)
165#define MX23_PAD_GPMI_ALE__LCD_D17 MXS_IOMUX_PAD_NAKED(0, 17, PAD_MUXSEL_1)
166#define MX23_PAD_GPMI_CE2N__ATA_A2 MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_1)
167#define MX23_PAD_AUART1_RTS__IR_CLK MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_1)
168#define MX23_PAD_AUART1_RX__IR_RX MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_1)
169#define MX23_PAD_AUART1_TX__IR_TX MXS_IOMUX_PAD_NAKED(0, 29, PAD_MUXSEL_1)
170#define MX23_PAD_I2C_SCL__GPMI_RDY2 MXS_IOMUX_PAD_NAKED(0, 30, PAD_MUXSEL_1)
171#define MX23_PAD_I2C_SDA__GPMI_CE2N MXS_IOMUX_PAD_NAKED(0, 31, PAD_MUXSEL_1)
172
173#define MX23_PAD_LCD_D00__ETM_DA8 MXS_IOMUX_PAD_NAKED(1, 0, PAD_MUXSEL_1)
174#define MX23_PAD_LCD_D01__ETM_DA9 MXS_IOMUX_PAD_NAKED(1, 1, PAD_MUXSEL_1)
175#define MX23_PAD_LCD_D02__ETM_DA10 MXS_IOMUX_PAD_NAKED(1, 2, PAD_MUXSEL_1)
176#define MX23_PAD_LCD_D03__ETM_DA11 MXS_IOMUX_PAD_NAKED(1, 3, PAD_MUXSEL_1)
177#define MX23_PAD_LCD_D04__ETM_DA12 MXS_IOMUX_PAD_NAKED(1, 4, PAD_MUXSEL_1)
178#define MX23_PAD_LCD_D05__ETM_DA13 MXS_IOMUX_PAD_NAKED(1, 5, PAD_MUXSEL_1)
179#define MX23_PAD_LCD_D06__ETM_DA14 MXS_IOMUX_PAD_NAKED(1, 6, PAD_MUXSEL_1)
180#define MX23_PAD_LCD_D07__ETM_DA15 MXS_IOMUX_PAD_NAKED(1, 7, PAD_MUXSEL_1)
181#define MX23_PAD_LCD_D08__ETM_DA0 MXS_IOMUX_PAD_NAKED(1, 8, PAD_MUXSEL_1)
182#define MX23_PAD_LCD_D09__ETM_DA1 MXS_IOMUX_PAD_NAKED(1, 9, PAD_MUXSEL_1)
183#define MX23_PAD_LCD_D10__ETM_DA2 MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_1)
184#define MX23_PAD_LCD_D11__ETM_DA3 MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_1)
185#define MX23_PAD_LCD_D12__ETM_DA4 MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_1)
186#define MX23_PAD_LCD_D13__ETM_DA5 MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_1)
187#define MX23_PAD_LCD_D14__ETM_DA6 MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_1)
188#define MX23_PAD_LCD_D15__ETM_DA7 MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_1)
189#define MX23_PAD_LCD_RESET__ETM_TCTL MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_1)
190#define MX23_PAD_LCD_RS__ETM_TCLK MXS_IOMUX_PAD_NAKED(1, 19, PAD_MUXSEL_1)
191#define MX23_PAD_LCD_DOTCK__GPMI_RDY3 MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_1)
192#define MX23_PAD_LCD_ENABLE__I2C_SCL MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_1)
193#define MX23_PAD_LCD_HSYNC__I2C_SDA MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_1)
194#define MX23_PAD_LCD_VSYNC__LCD_BUSY MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_1)
195#define MX23_PAD_PWM0__ROTARYA MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_1)
196#define MX23_PAD_PWM1__ROTARYB MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_1)
197#define MX23_PAD_PWM2__GPMI_RDY3 MXS_IOMUX_PAD_NAKED(1, 28, PAD_MUXSEL_1)
198#define MX23_PAD_PWM3__ETM_TCTL MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_1)
199#define MX23_PAD_PWM4__ETM_TCLK MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_1)
200
201#define MX23_PAD_SSP1_DETECT__GPMI_CE3N MXS_IOMUX_PAD_NAKED(2, 1, PAD_MUXSEL_1)
202#define MX23_PAD_SSP1_DATA1__I2C_SCL MXS_IOMUX_PAD_NAKED(2, 3, PAD_MUXSEL_1)
203#define MX23_PAD_SSP1_DATA2__I2C_SDA MXS_IOMUX_PAD_NAKED(2, 4, PAD_MUXSEL_1)
204#define MX23_PAD_ROTARYA__AUART2_RTS MXS_IOMUX_PAD_NAKED(2, 7, PAD_MUXSEL_1)
205#define MX23_PAD_ROTARYB__AUART2_CTS MXS_IOMUX_PAD_NAKED(2, 8, PAD_MUXSEL_1)
206
207/* MUXSEL_2 */
208#define MX23_PAD_GPMI_D00__SSP2_DATA0 MXS_IOMUX_PAD_NAKED(0, 0, PAD_MUXSEL_2)
209#define MX23_PAD_GPMI_D01__SSP2_DATA1 MXS_IOMUX_PAD_NAKED(0, 1, PAD_MUXSEL_2)
210#define MX23_PAD_GPMI_D02__SSP2_DATA2 MXS_IOMUX_PAD_NAKED(0, 2, PAD_MUXSEL_2)
211#define MX23_PAD_GPMI_D03__SSP2_DATA3 MXS_IOMUX_PAD_NAKED(0, 3, PAD_MUXSEL_2)
212#define MX23_PAD_GPMI_D04__SSP2_DATA4 MXS_IOMUX_PAD_NAKED(0, 4, PAD_MUXSEL_2)
213#define MX23_PAD_GPMI_D05__SSP2_DATA5 MXS_IOMUX_PAD_NAKED(0, 5, PAD_MUXSEL_2)
214#define MX23_PAD_GPMI_D06__SSP2_DATA6 MXS_IOMUX_PAD_NAKED(0, 6, PAD_MUXSEL_2)
215#define MX23_PAD_GPMI_D07__SSP2_DATA7 MXS_IOMUX_PAD_NAKED(0, 7, PAD_MUXSEL_2)
216#define MX23_PAD_GPMI_D08__SSP1_DATA4 MXS_IOMUX_PAD_NAKED(0, 8, PAD_MUXSEL_2)
217#define MX23_PAD_GPMI_D09__SSP1_DATA5 MXS_IOMUX_PAD_NAKED(0, 9, PAD_MUXSEL_2)
218#define MX23_PAD_GPMI_D10__SSP1_DATA6 MXS_IOMUX_PAD_NAKED(0, 10, PAD_MUXSEL_2)
219#define MX23_PAD_GPMI_D11__SSP1_DATA7 MXS_IOMUX_PAD_NAKED(0, 11, PAD_MUXSEL_2)
220#define MX23_PAD_GPMI_D15__GPMI_CE3N MXS_IOMUX_PAD_NAKED(0, 15, PAD_MUXSEL_2)
221#define MX23_PAD_GPMI_RDY0__SSP2_DETECT MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_2)
222#define MX23_PAD_GPMI_RDY1__SSP2_CMD MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_2)
223#define MX23_PAD_GPMI_WRN__SSP2_SCK MXS_IOMUX_PAD_NAKED(0, 24, PAD_MUXSEL_2)
224#define MX23_PAD_AUART1_CTS__SSP1_DATA4 MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_2)
225#define MX23_PAD_AUART1_RTS__SSP1_DATA5 MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_2)
226#define MX23_PAD_AUART1_RX__SSP1_DATA6 MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_2)
227#define MX23_PAD_AUART1_TX__SSP1_DATA7 MXS_IOMUX_PAD_NAKED(0, 29, PAD_MUXSEL_2)
228#define MX23_PAD_I2C_SCL__AUART1_TX MXS_IOMUX_PAD_NAKED(0, 30, PAD_MUXSEL_2)
229#define MX23_PAD_I2C_SDA__AUART1_RX MXS_IOMUX_PAD_NAKED(0, 31, PAD_MUXSEL_2)
230
231#define MX23_PAD_LCD_D08__SAIF2_SDATA0 MXS_IOMUX_PAD_NAKED(1, 8, PAD_MUXSEL_2)
232#define MX23_PAD_LCD_D09__SAIF1_SDATA0 MXS_IOMUX_PAD_NAKED(1, 9, PAD_MUXSEL_2)
233#define MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_2)
234#define MX23_PAD_LCD_D11__SAIF_LRCLK MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_2)
235#define MX23_PAD_LCD_D12__SAIF2_SDATA1 MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_2)
236#define MX23_PAD_LCD_D13__SAIF2_SDATA2 MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_2)
237#define MX23_PAD_LCD_D14__SAIF1_SDATA2 MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_2)
238#define MX23_PAD_LCD_D15__SAIF1_SDATA1 MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_2)
239#define MX23_PAD_LCD_D16__SAIF_ALT_BITCLK MXS_IOMUX_PAD_NAKED(1, 16, PAD_MUXSEL_2)
240#define MX23_PAD_LCD_RESET__GPMI_CE3N MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_2)
241#define MX23_PAD_PWM0__DUART_RX MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_2)
242#define MX23_PAD_PWM1__DUART_TX MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_2)
243#define MX23_PAD_PWM3__AUART1_CTS MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_2)
244#define MX23_PAD_PWM4__AUART1_RTS MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_2)
245
246#define MX23_PAD_SSP1_CMD__JTAG_TDO MXS_IOMUX_PAD_NAKED(2, 0, PAD_MUXSEL_2)
247#define MX23_PAD_SSP1_DETECT__USB_OTG_ID MXS_IOMUX_PAD_NAKED(2, 1, PAD_MUXSEL_2)
248#define MX23_PAD_SSP1_DATA0__JTAG_TDI MXS_IOMUX_PAD_NAKED(2, 2, PAD_MUXSEL_2)
249#define MX23_PAD_SSP1_DATA1__JTAG_TCLK MXS_IOMUX_PAD_NAKED(2, 3, PAD_MUXSEL_2)
250#define MX23_PAD_SSP1_DATA2__JTAG_RTCK MXS_IOMUX_PAD_NAKED(2, 4, PAD_MUXSEL_2)
251#define MX23_PAD_SSP1_DATA3__JTAG_TMS MXS_IOMUX_PAD_NAKED(2, 5, PAD_MUXSEL_2)
252#define MX23_PAD_SSP1_SCK__JTAG_TRST MXS_IOMUX_PAD_NAKED(2, 6, PAD_MUXSEL_2)
253#define MX23_PAD_ROTARYA__SPDIF MXS_IOMUX_PAD_NAKED(2, 7, PAD_MUXSEL_2)
254#define MX23_PAD_ROTARYB__GPMI_CE3N MXS_IOMUX_PAD_NAKED(2, 8, PAD_MUXSEL_2)
255
256/* MUXSEL_GPIO */
257#define MX23_PAD_GPMI_D00__GPIO_0_0 MXS_IOMUX_PAD_NAKED(0, 0, PAD_MUXSEL_GPIO)
258#define MX23_PAD_GPMI_D01__GPIO_0_1 MXS_IOMUX_PAD_NAKED(0, 1, PAD_MUXSEL_GPIO)
259#define MX23_PAD_GPMI_D02__GPIO_0_2 MXS_IOMUX_PAD_NAKED(0, 2, PAD_MUXSEL_GPIO)
260#define MX23_PAD_GPMI_D03__GPIO_0_3 MXS_IOMUX_PAD_NAKED(0, 3, PAD_MUXSEL_GPIO)
261#define MX23_PAD_GPMI_D04__GPIO_0_4 MXS_IOMUX_PAD_NAKED(0, 4, PAD_MUXSEL_GPIO)
262#define MX23_PAD_GPMI_D05__GPIO_0_5 MXS_IOMUX_PAD_NAKED(0, 5, PAD_MUXSEL_GPIO)
263#define MX23_PAD_GPMI_D06__GPIO_0_6 MXS_IOMUX_PAD_NAKED(0, 6, PAD_MUXSEL_GPIO)
264#define MX23_PAD_GPMI_D07__GPIO_0_7 MXS_IOMUX_PAD_NAKED(0, 7, PAD_MUXSEL_GPIO)
265#define MX23_PAD_GPMI_D08__GPIO_0_8 MXS_IOMUX_PAD_NAKED(0, 8, PAD_MUXSEL_GPIO)
266#define MX23_PAD_GPMI_D09__GPIO_0_9 MXS_IOMUX_PAD_NAKED(0, 9, PAD_MUXSEL_GPIO)
267#define MX23_PAD_GPMI_D10__GPIO_0_10 MXS_IOMUX_PAD_NAKED(0, 10, PAD_MUXSEL_GPIO)
268#define MX23_PAD_GPMI_D11__GPIO_0_11 MXS_IOMUX_PAD_NAKED(0, 11, PAD_MUXSEL_GPIO)
269#define MX23_PAD_GPMI_D12__GPIO_0_12 MXS_IOMUX_PAD_NAKED(0, 12, PAD_MUXSEL_GPIO)
270#define MX23_PAD_GPMI_D13__GPIO_0_13 MXS_IOMUX_PAD_NAKED(0, 13, PAD_MUXSEL_GPIO)
271#define MX23_PAD_GPMI_D14__GPIO_0_14 MXS_IOMUX_PAD_NAKED(0, 14, PAD_MUXSEL_GPIO)
272#define MX23_PAD_GPMI_D15__GPIO_0_15 MXS_IOMUX_PAD_NAKED(0, 15, PAD_MUXSEL_GPIO)
273#define MX23_PAD_GPMI_CLE__GPIO_0_16 MXS_IOMUX_PAD_NAKED(0, 16, PAD_MUXSEL_GPIO)
274#define MX23_PAD_GPMI_ALE__GPIO_0_17 MXS_IOMUX_PAD_NAKED(0, 17, PAD_MUXSEL_GPIO)
275#define MX23_PAD_GPMI_CE2N__GPIO_0_18 MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_GPIO)
276#define MX23_PAD_GPMI_RDY0__GPIO_0_19 MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_GPIO)
277#define MX23_PAD_GPMI_RDY1__GPIO_0_20 MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_GPIO)
278#define MX23_PAD_GPMI_RDY2__GPIO_0_21 MXS_IOMUX_PAD_NAKED(0, 21, PAD_MUXSEL_GPIO)
279#define MX23_PAD_GPMI_RDY3__GPIO_0_22 MXS_IOMUX_PAD_NAKED(0, 22, PAD_MUXSEL_GPIO)
280#define MX23_PAD_GPMI_WPN__GPIO_0_23 MXS_IOMUX_PAD_NAKED(0, 23, PAD_MUXSEL_GPIO)
281#define MX23_PAD_GPMI_WRN__GPIO_0_24 MXS_IOMUX_PAD_NAKED(0, 24, PAD_MUXSEL_GPIO)
282#define MX23_PAD_GPMI_RDN__GPIO_0_25 MXS_IOMUX_PAD_NAKED(0, 25, PAD_MUXSEL_GPIO)
283#define MX23_PAD_AUART1_CTS__GPIO_0_26 MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_GPIO)
284#define MX23_PAD_AUART1_RTS__GPIO_0_27 MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_GPIO)
285#define MX23_PAD_AUART1_RX__GPIO_0_28 MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_GPIO)
286#define MX23_PAD_AUART1_TX__GPIO_0_29 MXS_IOMUX_PAD_NAKED(0, 29, PAD_MUXSEL_GPIO)
287#define MX23_PAD_I2C_SCL__GPIO_0_30 MXS_IOMUX_PAD_NAKED(0, 30, PAD_MUXSEL_GPIO)
288#define MX23_PAD_I2C_SDA__GPIO_0_31 MXS_IOMUX_PAD_NAKED(0, 31, PAD_MUXSEL_GPIO)
289
290#define MX23_PAD_LCD_D00__GPIO_1_0 MXS_IOMUX_PAD_NAKED(1, 0, PAD_MUXSEL_GPIO)
291#define MX23_PAD_LCD_D01__GPIO_1_1 MXS_IOMUX_PAD_NAKED(1, 1, PAD_MUXSEL_GPIO)
292#define MX23_PAD_LCD_D02__GPIO_1_2 MXS_IOMUX_PAD_NAKED(1, 2, PAD_MUXSEL_GPIO)
293#define MX23_PAD_LCD_D03__GPIO_1_3 MXS_IOMUX_PAD_NAKED(1, 3, PAD_MUXSEL_GPIO)
294#define MX23_PAD_LCD_D04__GPIO_1_4 MXS_IOMUX_PAD_NAKED(1, 4, PAD_MUXSEL_GPIO)
295#define MX23_PAD_LCD_D05__GPIO_1_5 MXS_IOMUX_PAD_NAKED(1, 5, PAD_MUXSEL_GPIO)
296#define MX23_PAD_LCD_D06__GPIO_1_6 MXS_IOMUX_PAD_NAKED(1, 6, PAD_MUXSEL_GPIO)
297#define MX23_PAD_LCD_D07__GPIO_1_7 MXS_IOMUX_PAD_NAKED(1, 7, PAD_MUXSEL_GPIO)
298#define MX23_PAD_LCD_D08__GPIO_1_8 MXS_IOMUX_PAD_NAKED(1, 8, PAD_MUXSEL_GPIO)
299#define MX23_PAD_LCD_D09__GPIO_1_9 MXS_IOMUX_PAD_NAKED(1, 9, PAD_MUXSEL_GPIO)
300#define MX23_PAD_LCD_D10__GPIO_1_10 MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_GPIO)
301#define MX23_PAD_LCD_D11__GPIO_1_11 MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_GPIO)
302#define MX23_PAD_LCD_D12__GPIO_1_12 MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_GPIO)
303#define MX23_PAD_LCD_D13__GPIO_1_13 MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_GPIO)
304#define MX23_PAD_LCD_D14__GPIO_1_14 MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_GPIO)
305#define MX23_PAD_LCD_D15__GPIO_1_15 MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_GPIO)
306#define MX23_PAD_LCD_D16__GPIO_1_16 MXS_IOMUX_PAD_NAKED(1, 16, PAD_MUXSEL_GPIO)
307#define MX23_PAD_LCD_D17__GPIO_1_17 MXS_IOMUX_PAD_NAKED(1, 17, PAD_MUXSEL_GPIO)
308#define MX23_PAD_LCD_RESET__GPIO_1_18 MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_GPIO)
309#define MX23_PAD_LCD_RS__GPIO_1_19 MXS_IOMUX_PAD_NAKED(1, 19, PAD_MUXSEL_GPIO)
310#define MX23_PAD_LCD_WR__GPIO_1_20 MXS_IOMUX_PAD_NAKED(1, 20, PAD_MUXSEL_GPIO)
311#define MX23_PAD_LCD_CS__GPIO_1_21 MXS_IOMUX_PAD_NAKED(1, 21, PAD_MUXSEL_GPIO)
312#define MX23_PAD_LCD_DOTCK__GPIO_1_22 MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_GPIO)
313#define MX23_PAD_LCD_ENABLE__GPIO_1_23 MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_GPIO)
314#define MX23_PAD_LCD_HSYNC__GPIO_1_24 MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_GPIO)
315#define MX23_PAD_LCD_VSYNC__GPIO_1_25 MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_GPIO)
316#define MX23_PAD_PWM0__GPIO_1_26 MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_GPIO)
317#define MX23_PAD_PWM1__GPIO_1_27 MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_GPIO)
318#define MX23_PAD_PWM2__GPIO_1_28 MXS_IOMUX_PAD_NAKED(1, 28, PAD_MUXSEL_GPIO)
319#define MX23_PAD_PWM3__GPIO_1_29 MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_GPIO)
320#define MX23_PAD_PWM4__GPIO_1_30 MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_GPIO)
321
322#define MX23_PAD_SSP1_CMD__GPIO_2_0 MXS_IOMUX_PAD_NAKED(2, 0, PAD_MUXSEL_GPIO)
323#define MX23_PAD_SSP1_DETECT__GPIO_2_1 MXS_IOMUX_PAD_NAKED(2, 1, PAD_MUXSEL_GPIO)
324#define MX23_PAD_SSP1_DATA0__GPIO_2_2 MXS_IOMUX_PAD_NAKED(2, 2, PAD_MUXSEL_GPIO)
325#define MX23_PAD_SSP1_DATA1__GPIO_2_3 MXS_IOMUX_PAD_NAKED(2, 3, PAD_MUXSEL_GPIO)
326#define MX23_PAD_SSP1_DATA2__GPIO_2_4 MXS_IOMUX_PAD_NAKED(2, 4, PAD_MUXSEL_GPIO)
327#define MX23_PAD_SSP1_DATA3__GPIO_2_5 MXS_IOMUX_PAD_NAKED(2, 5, PAD_MUXSEL_GPIO)
328#define MX23_PAD_SSP1_SCK__GPIO_2_6 MXS_IOMUX_PAD_NAKED(2, 6, PAD_MUXSEL_GPIO)
329#define MX23_PAD_ROTARYA__GPIO_2_7 MXS_IOMUX_PAD_NAKED(2, 7, PAD_MUXSEL_GPIO)
330#define MX23_PAD_ROTARYB__GPIO_2_8 MXS_IOMUX_PAD_NAKED(2, 8, PAD_MUXSEL_GPIO)
331#define MX23_PAD_EMI_A00__GPIO_2_9 MXS_IOMUX_PAD_NAKED(2, 9, PAD_MUXSEL_GPIO)
332#define MX23_PAD_EMI_A01__GPIO_2_10 MXS_IOMUX_PAD_NAKED(2, 10, PAD_MUXSEL_GPIO)
333#define MX23_PAD_EMI_A02__GPIO_2_11 MXS_IOMUX_PAD_NAKED(2, 11, PAD_MUXSEL_GPIO)
334#define MX23_PAD_EMI_A03__GPIO_2_12 MXS_IOMUX_PAD_NAKED(2, 12, PAD_MUXSEL_GPIO)
335#define MX23_PAD_EMI_A04__GPIO_2_13 MXS_IOMUX_PAD_NAKED(2, 13, PAD_MUXSEL_GPIO)
336#define MX23_PAD_EMI_A05__GPIO_2_14 MXS_IOMUX_PAD_NAKED(2, 14, PAD_MUXSEL_GPIO)
337#define MX23_PAD_EMI_A06__GPIO_2_15 MXS_IOMUX_PAD_NAKED(2, 15, PAD_MUXSEL_GPIO)
338#define MX23_PAD_EMI_A07__GPIO_2_16 MXS_IOMUX_PAD_NAKED(2, 16, PAD_MUXSEL_GPIO)
339#define MX23_PAD_EMI_A08__GPIO_2_17 MXS_IOMUX_PAD_NAKED(2, 17, PAD_MUXSEL_GPIO)
340#define MX23_PAD_EMI_A09__GPIO_2_18 MXS_IOMUX_PAD_NAKED(2, 18, PAD_MUXSEL_GPIO)
341#define MX23_PAD_EMI_A10__GPIO_2_19 MXS_IOMUX_PAD_NAKED(2, 19, PAD_MUXSEL_GPIO)
342#define MX23_PAD_EMI_A11__GPIO_2_20 MXS_IOMUX_PAD_NAKED(2, 20, PAD_MUXSEL_GPIO)
343#define MX23_PAD_EMI_A12__GPIO_2_21 MXS_IOMUX_PAD_NAKED(2, 21, PAD_MUXSEL_GPIO)
344#define MX23_PAD_EMI_BA0__GPIO_2_22 MXS_IOMUX_PAD_NAKED(2, 22, PAD_MUXSEL_GPIO)
345#define MX23_PAD_EMI_BA1__GPIO_2_23 MXS_IOMUX_PAD_NAKED(2, 23, PAD_MUXSEL_GPIO)
346#define MX23_PAD_EMI_CASN__GPIO_2_24 MXS_IOMUX_PAD_NAKED(2, 24, PAD_MUXSEL_GPIO)
347#define MX23_PAD_EMI_CE0N__GPIO_2_25 MXS_IOMUX_PAD_NAKED(2, 25, PAD_MUXSEL_GPIO)
348#define MX23_PAD_EMI_CE1N__GPIO_2_26 MXS_IOMUX_PAD_NAKED(2, 26, PAD_MUXSEL_GPIO)
349#define MX23_PAD_GPMI_CE1N__GPIO_2_27 MXS_IOMUX_PAD_NAKED(2, 27, PAD_MUXSEL_GPIO)
350#define MX23_PAD_GPMI_CE0N__GPIO_2_28 MXS_IOMUX_PAD_NAKED(2, 28, PAD_MUXSEL_GPIO)
351#define MX23_PAD_EMI_CKE__GPIO_2_29 MXS_IOMUX_PAD_NAKED(2, 29, PAD_MUXSEL_GPIO)
352#define MX23_PAD_EMI_RASN__GPIO_2_30 MXS_IOMUX_PAD_NAKED(2, 30, PAD_MUXSEL_GPIO)
353#define MX23_PAD_EMI_WEN__GPIO_2_31 MXS_IOMUX_PAD_NAKED(2, 31, PAD_MUXSEL_GPIO)
354
355#endif /* __MACH_IOMUX_MX23_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/iomux-mx28.h b/arch/arm/mach-mxs/include/mach/iomux-mx28.h
deleted file mode 100644
index f50fefd10520..000000000000
--- a/arch/arm/mach-mxs/include/mach/iomux-mx28.h
+++ /dev/null
@@ -1,537 +0,0 @@
1/*
2 * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#ifndef __MACH_IOMUX_MX28_H__
14#define __MACH_IOMUX_MX28_H__
15
16#include <mach/iomux.h>
17
18/*
19 * The naming convention for the pad modes is MX28_PAD_<padname>__<padmode>
20 * If <padname> or <padmode> refers to a GPIO, it is named GPIO_<unit>_<num>
21 * See also iomux.h
22 *
23 * BANK PIN MUX
24 */
25/* MUXSEL_0 */
26#define MX28_PAD_GPMI_D00__GPMI_D0 MXS_IOMUX_PAD_NAKED(0, 0, PAD_MUXSEL_0)
27#define MX28_PAD_GPMI_D01__GPMI_D1 MXS_IOMUX_PAD_NAKED(0, 1, PAD_MUXSEL_0)
28#define MX28_PAD_GPMI_D02__GPMI_D2 MXS_IOMUX_PAD_NAKED(0, 2, PAD_MUXSEL_0)
29#define MX28_PAD_GPMI_D03__GPMI_D3 MXS_IOMUX_PAD_NAKED(0, 3, PAD_MUXSEL_0)
30#define MX28_PAD_GPMI_D04__GPMI_D4 MXS_IOMUX_PAD_NAKED(0, 4, PAD_MUXSEL_0)
31#define MX28_PAD_GPMI_D05__GPMI_D5 MXS_IOMUX_PAD_NAKED(0, 5, PAD_MUXSEL_0)
32#define MX28_PAD_GPMI_D06__GPMI_D6 MXS_IOMUX_PAD_NAKED(0, 6, PAD_MUXSEL_0)
33#define MX28_PAD_GPMI_D07__GPMI_D7 MXS_IOMUX_PAD_NAKED(0, 7, PAD_MUXSEL_0)
34#define MX28_PAD_GPMI_CE0N__GPMI_CE0N MXS_IOMUX_PAD_NAKED(0, 16, PAD_MUXSEL_0)
35#define MX28_PAD_GPMI_CE1N__GPMI_CE1N MXS_IOMUX_PAD_NAKED(0, 17, PAD_MUXSEL_0)
36#define MX28_PAD_GPMI_CE2N__GPMI_CE2N MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_0)
37#define MX28_PAD_GPMI_CE3N__GPMI_CE3N MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_0)
38#define MX28_PAD_GPMI_RDY0__GPMI_READY0 MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_0)
39#define MX28_PAD_GPMI_RDY1__GPMI_READY1 MXS_IOMUX_PAD_NAKED(0, 21, PAD_MUXSEL_0)
40#define MX28_PAD_GPMI_RDY2__GPMI_READY2 MXS_IOMUX_PAD_NAKED(0, 22, PAD_MUXSEL_0)
41#define MX28_PAD_GPMI_RDY3__GPMI_READY3 MXS_IOMUX_PAD_NAKED(0, 23, PAD_MUXSEL_0)
42#define MX28_PAD_GPMI_RDN__GPMI_RDN MXS_IOMUX_PAD_NAKED(0, 24, PAD_MUXSEL_0)
43#define MX28_PAD_GPMI_WRN__GPMI_WRN MXS_IOMUX_PAD_NAKED(0, 25, PAD_MUXSEL_0)
44#define MX28_PAD_GPMI_ALE__GPMI_ALE MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_0)
45#define MX28_PAD_GPMI_CLE__GPMI_CLE MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_0)
46#define MX28_PAD_GPMI_RESETN__GPMI_RESETN MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_0)
47
48#define MX28_PAD_LCD_D00__LCD_D0 MXS_IOMUX_PAD_NAKED(1, 0, PAD_MUXSEL_0)
49#define MX28_PAD_LCD_D01__LCD_D1 MXS_IOMUX_PAD_NAKED(1, 1, PAD_MUXSEL_0)
50#define MX28_PAD_LCD_D02__LCD_D2 MXS_IOMUX_PAD_NAKED(1, 2, PAD_MUXSEL_0)
51#define MX28_PAD_LCD_D03__LCD_D3 MXS_IOMUX_PAD_NAKED(1, 3, PAD_MUXSEL_0)
52#define MX28_PAD_LCD_D04__LCD_D4 MXS_IOMUX_PAD_NAKED(1, 4, PAD_MUXSEL_0)
53#define MX28_PAD_LCD_D05__LCD_D5 MXS_IOMUX_PAD_NAKED(1, 5, PAD_MUXSEL_0)
54#define MX28_PAD_LCD_D06__LCD_D6 MXS_IOMUX_PAD_NAKED(1, 6, PAD_MUXSEL_0)
55#define MX28_PAD_LCD_D07__LCD_D7 MXS_IOMUX_PAD_NAKED(1, 7, PAD_MUXSEL_0)
56#define MX28_PAD_LCD_D08__LCD_D8 MXS_IOMUX_PAD_NAKED(1, 8, PAD_MUXSEL_0)
57#define MX28_PAD_LCD_D09__LCD_D9 MXS_IOMUX_PAD_NAKED(1, 9, PAD_MUXSEL_0)
58#define MX28_PAD_LCD_D10__LCD_D10 MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_0)
59#define MX28_PAD_LCD_D11__LCD_D11 MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_0)
60#define MX28_PAD_LCD_D12__LCD_D12 MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_0)
61#define MX28_PAD_LCD_D13__LCD_D13 MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_0)
62#define MX28_PAD_LCD_D14__LCD_D14 MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_0)
63#define MX28_PAD_LCD_D15__LCD_D15 MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_0)
64#define MX28_PAD_LCD_D16__LCD_D16 MXS_IOMUX_PAD_NAKED(1, 16, PAD_MUXSEL_0)
65#define MX28_PAD_LCD_D17__LCD_D17 MXS_IOMUX_PAD_NAKED(1, 17, PAD_MUXSEL_0)
66#define MX28_PAD_LCD_D18__LCD_D18 MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_0)
67#define MX28_PAD_LCD_D19__LCD_D19 MXS_IOMUX_PAD_NAKED(1, 19, PAD_MUXSEL_0)
68#define MX28_PAD_LCD_D20__LCD_D20 MXS_IOMUX_PAD_NAKED(1, 20, PAD_MUXSEL_0)
69#define MX28_PAD_LCD_D21__LCD_D21 MXS_IOMUX_PAD_NAKED(1, 21, PAD_MUXSEL_0)
70#define MX28_PAD_LCD_D22__LCD_D22 MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_0)
71#define MX28_PAD_LCD_D23__LCD_D23 MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_0)
72#define MX28_PAD_LCD_RD_E__LCD_RD_E MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_0)
73#define MX28_PAD_LCD_WR_RWN__LCD_WR_RWN MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_0)
74#define MX28_PAD_LCD_RS__LCD_RS MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_0)
75#define MX28_PAD_LCD_CS__LCD_CS MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_0)
76#define MX28_PAD_LCD_VSYNC__LCD_VSYNC MXS_IOMUX_PAD_NAKED(1, 28, PAD_MUXSEL_0)
77#define MX28_PAD_LCD_HSYNC__LCD_HSYNC MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_0)
78#define MX28_PAD_LCD_DOTCLK__LCD_DOTCLK MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_0)
79#define MX28_PAD_LCD_ENABLE__LCD_ENABLE MXS_IOMUX_PAD_NAKED(1, 31, PAD_MUXSEL_0)
80
81#define MX28_PAD_SSP0_DATA0__SSP0_D0 MXS_IOMUX_PAD_NAKED(2, 0, PAD_MUXSEL_0)
82#define MX28_PAD_SSP0_DATA1__SSP0_D1 MXS_IOMUX_PAD_NAKED(2, 1, PAD_MUXSEL_0)
83#define MX28_PAD_SSP0_DATA2__SSP0_D2 MXS_IOMUX_PAD_NAKED(2, 2, PAD_MUXSEL_0)
84#define MX28_PAD_SSP0_DATA3__SSP0_D3 MXS_IOMUX_PAD_NAKED(2, 3, PAD_MUXSEL_0)
85#define MX28_PAD_SSP0_DATA4__SSP0_D4 MXS_IOMUX_PAD_NAKED(2, 4, PAD_MUXSEL_0)
86#define MX28_PAD_SSP0_DATA5__SSP0_D5 MXS_IOMUX_PAD_NAKED(2, 5, PAD_MUXSEL_0)
87#define MX28_PAD_SSP0_DATA6__SSP0_D6 MXS_IOMUX_PAD_NAKED(2, 6, PAD_MUXSEL_0)
88#define MX28_PAD_SSP0_DATA7__SSP0_D7 MXS_IOMUX_PAD_NAKED(2, 7, PAD_MUXSEL_0)
89#define MX28_PAD_SSP0_CMD__SSP0_CMD MXS_IOMUX_PAD_NAKED(2, 8, PAD_MUXSEL_0)
90#define MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT MXS_IOMUX_PAD_NAKED(2, 9, PAD_MUXSEL_0)
91#define MX28_PAD_SSP0_SCK__SSP0_SCK MXS_IOMUX_PAD_NAKED(2, 10, PAD_MUXSEL_0)
92#define MX28_PAD_SSP1_SCK__SSP1_SCK MXS_IOMUX_PAD_NAKED(2, 12, PAD_MUXSEL_0)
93#define MX28_PAD_SSP1_CMD__SSP1_CMD MXS_IOMUX_PAD_NAKED(2, 13, PAD_MUXSEL_0)
94#define MX28_PAD_SSP1_DATA0__SSP1_D0 MXS_IOMUX_PAD_NAKED(2, 14, PAD_MUXSEL_0)
95#define MX28_PAD_SSP1_DATA3__SSP1_D3 MXS_IOMUX_PAD_NAKED(2, 15, PAD_MUXSEL_0)
96#define MX28_PAD_SSP2_SCK__SSP2_SCK MXS_IOMUX_PAD_NAKED(2, 16, PAD_MUXSEL_0)
97#define MX28_PAD_SSP2_MOSI__SSP2_CMD MXS_IOMUX_PAD_NAKED(2, 17, PAD_MUXSEL_0)
98#define MX28_PAD_SSP2_MISO__SSP2_D0 MXS_IOMUX_PAD_NAKED(2, 18, PAD_MUXSEL_0)
99#define MX28_PAD_SSP2_SS0__SSP2_D3 MXS_IOMUX_PAD_NAKED(2, 19, PAD_MUXSEL_0)
100#define MX28_PAD_SSP2_SS1__SSP2_D4 MXS_IOMUX_PAD_NAKED(2, 20, PAD_MUXSEL_0)
101#define MX28_PAD_SSP2_SS2__SSP2_D5 MXS_IOMUX_PAD_NAKED(2, 21, PAD_MUXSEL_0)
102#define MX28_PAD_SSP3_SCK__SSP3_SCK MXS_IOMUX_PAD_NAKED(2, 24, PAD_MUXSEL_0)
103#define MX28_PAD_SSP3_MOSI__SSP3_CMD MXS_IOMUX_PAD_NAKED(2, 25, PAD_MUXSEL_0)
104#define MX28_PAD_SSP3_MISO__SSP3_D0 MXS_IOMUX_PAD_NAKED(2, 26, PAD_MUXSEL_0)
105#define MX28_PAD_SSP3_SS0__SSP3_D3 MXS_IOMUX_PAD_NAKED(2, 27, PAD_MUXSEL_0)
106
107#define MX28_PAD_AUART0_RX__AUART0_RX MXS_IOMUX_PAD_NAKED(3, 0, PAD_MUXSEL_0)
108#define MX28_PAD_AUART0_TX__AUART0_TX MXS_IOMUX_PAD_NAKED(3, 1, PAD_MUXSEL_0)
109#define MX28_PAD_AUART0_CTS__AUART0_CTS MXS_IOMUX_PAD_NAKED(3, 2, PAD_MUXSEL_0)
110#define MX28_PAD_AUART0_RTS__AUART0_RTS MXS_IOMUX_PAD_NAKED(3, 3, PAD_MUXSEL_0)
111#define MX28_PAD_AUART1_RX__AUART1_RX MXS_IOMUX_PAD_NAKED(3, 4, PAD_MUXSEL_0)
112#define MX28_PAD_AUART1_TX__AUART1_TX MXS_IOMUX_PAD_NAKED(3, 5, PAD_MUXSEL_0)
113#define MX28_PAD_AUART1_CTS__AUART1_CTS MXS_IOMUX_PAD_NAKED(3, 6, PAD_MUXSEL_0)
114#define MX28_PAD_AUART1_RTS__AUART1_RTS MXS_IOMUX_PAD_NAKED(3, 7, PAD_MUXSEL_0)
115#define MX28_PAD_AUART2_RX__AUART2_RX MXS_IOMUX_PAD_NAKED(3, 8, PAD_MUXSEL_0)
116#define MX28_PAD_AUART2_TX__AUART2_TX MXS_IOMUX_PAD_NAKED(3, 9, PAD_MUXSEL_0)
117#define MX28_PAD_AUART2_CTS__AUART2_CTS MXS_IOMUX_PAD_NAKED(3, 10, PAD_MUXSEL_0)
118#define MX28_PAD_AUART2_RTS__AUART2_RTS MXS_IOMUX_PAD_NAKED(3, 11, PAD_MUXSEL_0)
119#define MX28_PAD_AUART3_RX__AUART3_RX MXS_IOMUX_PAD_NAKED(3, 12, PAD_MUXSEL_0)
120#define MX28_PAD_AUART3_TX__AUART3_TX MXS_IOMUX_PAD_NAKED(3, 13, PAD_MUXSEL_0)
121#define MX28_PAD_AUART3_CTS__AUART3_CTS MXS_IOMUX_PAD_NAKED(3, 14, PAD_MUXSEL_0)
122#define MX28_PAD_AUART3_RTS__AUART3_RTS MXS_IOMUX_PAD_NAKED(3, 15, PAD_MUXSEL_0)
123#define MX28_PAD_PWM0__PWM_0 MXS_IOMUX_PAD_NAKED(3, 16, PAD_MUXSEL_0)
124#define MX28_PAD_PWM1__PWM_1 MXS_IOMUX_PAD_NAKED(3, 17, PAD_MUXSEL_0)
125#define MX28_PAD_PWM2__PWM_2 MXS_IOMUX_PAD_NAKED(3, 18, PAD_MUXSEL_0)
126#define MX28_PAD_SAIF0_MCLK__SAIF0_MCLK MXS_IOMUX_PAD_NAKED(3, 20, PAD_MUXSEL_0)
127#define MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK MXS_IOMUX_PAD_NAKED(3, 21, PAD_MUXSEL_0)
128#define MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK MXS_IOMUX_PAD_NAKED(3, 22, PAD_MUXSEL_0)
129#define MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 MXS_IOMUX_PAD_NAKED(3, 23, PAD_MUXSEL_0)
130#define MX28_PAD_I2C0_SCL__I2C0_SCL MXS_IOMUX_PAD_NAKED(3, 24, PAD_MUXSEL_0)
131#define MX28_PAD_I2C0_SDA__I2C0_SDA MXS_IOMUX_PAD_NAKED(3, 25, PAD_MUXSEL_0)
132#define MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 MXS_IOMUX_PAD_NAKED(3, 26, PAD_MUXSEL_0)
133#define MX28_PAD_SPDIF__SPDIF_TX MXS_IOMUX_PAD_NAKED(3, 27, PAD_MUXSEL_0)
134#define MX28_PAD_PWM3__PWM_3 MXS_IOMUX_PAD_NAKED(3, 28, PAD_MUXSEL_0)
135#define MX28_PAD_PWM4__PWM_4 MXS_IOMUX_PAD_NAKED(3, 29, PAD_MUXSEL_0)
136#define MX28_PAD_LCD_RESET__LCD_RESET MXS_IOMUX_PAD_NAKED(3, 30, PAD_MUXSEL_0)
137
138#define MX28_PAD_ENET0_MDC__ENET0_MDC MXS_IOMUX_PAD_NAKED(4, 0, PAD_MUXSEL_0)
139#define MX28_PAD_ENET0_MDIO__ENET0_MDIO MXS_IOMUX_PAD_NAKED(4, 1, PAD_MUXSEL_0)
140#define MX28_PAD_ENET0_RX_EN__ENET0_RX_EN MXS_IOMUX_PAD_NAKED(4, 2, PAD_MUXSEL_0)
141#define MX28_PAD_ENET0_RXD0__ENET0_RXD0 MXS_IOMUX_PAD_NAKED(4, 3, PAD_MUXSEL_0)
142#define MX28_PAD_ENET0_RXD1__ENET0_RXD1 MXS_IOMUX_PAD_NAKED(4, 4, PAD_MUXSEL_0)
143#define MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK MXS_IOMUX_PAD_NAKED(4, 5, PAD_MUXSEL_0)
144#define MX28_PAD_ENET0_TX_EN__ENET0_TX_EN MXS_IOMUX_PAD_NAKED(4, 6, PAD_MUXSEL_0)
145#define MX28_PAD_ENET0_TXD0__ENET0_TXD0 MXS_IOMUX_PAD_NAKED(4, 7, PAD_MUXSEL_0)
146#define MX28_PAD_ENET0_TXD1__ENET0_TXD1 MXS_IOMUX_PAD_NAKED(4, 8, PAD_MUXSEL_0)
147#define MX28_PAD_ENET0_RXD2__ENET0_RXD2 MXS_IOMUX_PAD_NAKED(4, 9, PAD_MUXSEL_0)
148#define MX28_PAD_ENET0_RXD3__ENET0_RXD3 MXS_IOMUX_PAD_NAKED(4, 10, PAD_MUXSEL_0)
149#define MX28_PAD_ENET0_TXD2__ENET0_TXD2 MXS_IOMUX_PAD_NAKED(4, 11, PAD_MUXSEL_0)
150#define MX28_PAD_ENET0_TXD3__ENET0_TXD3 MXS_IOMUX_PAD_NAKED(4, 12, PAD_MUXSEL_0)
151#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK MXS_IOMUX_PAD_NAKED(4, 13, PAD_MUXSEL_0)
152#define MX28_PAD_ENET0_COL__ENET0_COL MXS_IOMUX_PAD_NAKED(4, 14, PAD_MUXSEL_0)
153#define MX28_PAD_ENET0_CRS__ENET0_CRS MXS_IOMUX_PAD_NAKED(4, 15, PAD_MUXSEL_0)
154#define MX28_PAD_ENET_CLK__CLKCTRL_ENET MXS_IOMUX_PAD_NAKED(4, 16, PAD_MUXSEL_0)
155#define MX28_PAD_JTAG_RTCK__JTAG_RTCK MXS_IOMUX_PAD_NAKED(4, 20, PAD_MUXSEL_0)
156
157#define MX28_PAD_EMI_D00__EMI_DATA0 MXS_IOMUX_PAD_NAKED(5, 0, PAD_MUXSEL_0)
158#define MX28_PAD_EMI_D01__EMI_DATA1 MXS_IOMUX_PAD_NAKED(5, 1, PAD_MUXSEL_0)
159#define MX28_PAD_EMI_D02__EMI_DATA2 MXS_IOMUX_PAD_NAKED(5, 2, PAD_MUXSEL_0)
160#define MX28_PAD_EMI_D03__EMI_DATA3 MXS_IOMUX_PAD_NAKED(5, 3, PAD_MUXSEL_0)
161#define MX28_PAD_EMI_D04__EMI_DATA4 MXS_IOMUX_PAD_NAKED(5, 4, PAD_MUXSEL_0)
162#define MX28_PAD_EMI_D05__EMI_DATA5 MXS_IOMUX_PAD_NAKED(5, 5, PAD_MUXSEL_0)
163#define MX28_PAD_EMI_D06__EMI_DATA6 MXS_IOMUX_PAD_NAKED(5, 6, PAD_MUXSEL_0)
164#define MX28_PAD_EMI_D07__EMI_DATA7 MXS_IOMUX_PAD_NAKED(5, 7, PAD_MUXSEL_0)
165#define MX28_PAD_EMI_D08__EMI_DATA8 MXS_IOMUX_PAD_NAKED(5, 8, PAD_MUXSEL_0)
166#define MX28_PAD_EMI_D09__EMI_DATA9 MXS_IOMUX_PAD_NAKED(5, 9, PAD_MUXSEL_0)
167#define MX28_PAD_EMI_D10__EMI_DATA10 MXS_IOMUX_PAD_NAKED(5, 10, PAD_MUXSEL_0)
168#define MX28_PAD_EMI_D11__EMI_DATA11 MXS_IOMUX_PAD_NAKED(5, 11, PAD_MUXSEL_0)
169#define MX28_PAD_EMI_D12__EMI_DATA12 MXS_IOMUX_PAD_NAKED(5, 12, PAD_MUXSEL_0)
170#define MX28_PAD_EMI_D13__EMI_DATA13 MXS_IOMUX_PAD_NAKED(5, 13, PAD_MUXSEL_0)
171#define MX28_PAD_EMI_D14__EMI_DATA14 MXS_IOMUX_PAD_NAKED(5, 14, PAD_MUXSEL_0)
172#define MX28_PAD_EMI_D15__EMI_DATA15 MXS_IOMUX_PAD_NAKED(5, 15, PAD_MUXSEL_0)
173#define MX28_PAD_EMI_ODT0__EMI_ODT0 MXS_IOMUX_PAD_NAKED(5, 16, PAD_MUXSEL_0)
174#define MX28_PAD_EMI_DQM0__EMI_DQM0 MXS_IOMUX_PAD_NAKED(5, 17, PAD_MUXSEL_0)
175#define MX28_PAD_EMI_ODT1__EMI_ODT1 MXS_IOMUX_PAD_NAKED(5, 18, PAD_MUXSEL_0)
176#define MX28_PAD_EMI_DQM1__EMI_DQM1 MXS_IOMUX_PAD_NAKED(5, 19, PAD_MUXSEL_0)
177#define MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK MXS_IOMUX_PAD_NAKED(5, 20, PAD_MUXSEL_0)
178#define MX28_PAD_EMI_CLK__EMI_CLK MXS_IOMUX_PAD_NAKED(5, 21, PAD_MUXSEL_0)
179#define MX28_PAD_EMI_DQS0__EMI_DQS0 MXS_IOMUX_PAD_NAKED(5, 22, PAD_MUXSEL_0)
180#define MX28_PAD_EMI_DQS1__EMI_DQS1 MXS_IOMUX_PAD_NAKED(5, 23, PAD_MUXSEL_0)
181#define MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN MXS_IOMUX_PAD_NAKED(5, 26, PAD_MUXSEL_0)
182
183#define MX28_PAD_EMI_A00__EMI_ADDR0 MXS_IOMUX_PAD_NAKED(6, 0, PAD_MUXSEL_0)
184#define MX28_PAD_EMI_A01__EMI_ADDR1 MXS_IOMUX_PAD_NAKED(6, 1, PAD_MUXSEL_0)
185#define MX28_PAD_EMI_A02__EMI_ADDR2 MXS_IOMUX_PAD_NAKED(6, 2, PAD_MUXSEL_0)
186#define MX28_PAD_EMI_A03__EMI_ADDR3 MXS_IOMUX_PAD_NAKED(6, 3, PAD_MUXSEL_0)
187#define MX28_PAD_EMI_A04__EMI_ADDR4 MXS_IOMUX_PAD_NAKED(6, 4, PAD_MUXSEL_0)
188#define MX28_PAD_EMI_A05__EMI_ADDR5 MXS_IOMUX_PAD_NAKED(6, 5, PAD_MUXSEL_0)
189#define MX28_PAD_EMI_A06__EMI_ADDR6 MXS_IOMUX_PAD_NAKED(6, 6, PAD_MUXSEL_0)
190#define MX28_PAD_EMI_A07__EMI_ADDR7 MXS_IOMUX_PAD_NAKED(6, 7, PAD_MUXSEL_0)
191#define MX28_PAD_EMI_A08__EMI_ADDR8 MXS_IOMUX_PAD_NAKED(6, 8, PAD_MUXSEL_0)
192#define MX28_PAD_EMI_A09__EMI_ADDR9 MXS_IOMUX_PAD_NAKED(6, 9, PAD_MUXSEL_0)
193#define MX28_PAD_EMI_A10__EMI_ADDR10 MXS_IOMUX_PAD_NAKED(6, 10, PAD_MUXSEL_0)
194#define MX28_PAD_EMI_A11__EMI_ADDR11 MXS_IOMUX_PAD_NAKED(6, 11, PAD_MUXSEL_0)
195#define MX28_PAD_EMI_A12__EMI_ADDR12 MXS_IOMUX_PAD_NAKED(6, 12, PAD_MUXSEL_0)
196#define MX28_PAD_EMI_A13__EMI_ADDR13 MXS_IOMUX_PAD_NAKED(6, 13, PAD_MUXSEL_0)
197#define MX28_PAD_EMI_A14__EMI_ADDR14 MXS_IOMUX_PAD_NAKED(6, 14, PAD_MUXSEL_0)
198#define MX28_PAD_EMI_BA0__EMI_BA0 MXS_IOMUX_PAD_NAKED(6, 16, PAD_MUXSEL_0)
199#define MX28_PAD_EMI_BA1__EMI_BA1 MXS_IOMUX_PAD_NAKED(6, 17, PAD_MUXSEL_0)
200#define MX28_PAD_EMI_BA2__EMI_BA2 MXS_IOMUX_PAD_NAKED(6, 18, PAD_MUXSEL_0)
201#define MX28_PAD_EMI_CASN__EMI_CASN MXS_IOMUX_PAD_NAKED(6, 19, PAD_MUXSEL_0)
202#define MX28_PAD_EMI_RASN__EMI_RASN MXS_IOMUX_PAD_NAKED(6, 20, PAD_MUXSEL_0)
203#define MX28_PAD_EMI_WEN__EMI_WEN MXS_IOMUX_PAD_NAKED(6, 21, PAD_MUXSEL_0)
204#define MX28_PAD_EMI_CE0N__EMI_CE0N MXS_IOMUX_PAD_NAKED(6, 22, PAD_MUXSEL_0)
205#define MX28_PAD_EMI_CE1N__EMI_CE1N MXS_IOMUX_PAD_NAKED(6, 23, PAD_MUXSEL_0)
206#define MX28_PAD_EMI_CKE__EMI_CKE MXS_IOMUX_PAD_NAKED(6, 24, PAD_MUXSEL_0)
207
208/* MUXSEL_1 */
209#define MX28_PAD_GPMI_D00__SSP1_D0 MXS_IOMUX_PAD_NAKED(0, 0, PAD_MUXSEL_1)
210#define MX28_PAD_GPMI_D01__SSP1_D1 MXS_IOMUX_PAD_NAKED(0, 1, PAD_MUXSEL_1)
211#define MX28_PAD_GPMI_D02__SSP1_D2 MXS_IOMUX_PAD_NAKED(0, 2, PAD_MUXSEL_1)
212#define MX28_PAD_GPMI_D03__SSP1_D3 MXS_IOMUX_PAD_NAKED(0, 3, PAD_MUXSEL_1)
213#define MX28_PAD_GPMI_D04__SSP1_D4 MXS_IOMUX_PAD_NAKED(0, 4, PAD_MUXSEL_1)
214#define MX28_PAD_GPMI_D05__SSP1_D5 MXS_IOMUX_PAD_NAKED(0, 5, PAD_MUXSEL_1)
215#define MX28_PAD_GPMI_D06__SSP1_D6 MXS_IOMUX_PAD_NAKED(0, 6, PAD_MUXSEL_1)
216#define MX28_PAD_GPMI_D07__SSP1_D7 MXS_IOMUX_PAD_NAKED(0, 7, PAD_MUXSEL_1)
217#define MX28_PAD_GPMI_CE0N__SSP3_D0 MXS_IOMUX_PAD_NAKED(0, 16, PAD_MUXSEL_1)
218#define MX28_PAD_GPMI_CE1N__SSP3_D3 MXS_IOMUX_PAD_NAKED(0, 17, PAD_MUXSEL_1)
219#define MX28_PAD_GPMI_CE2N__CAN1_TX MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_1)
220#define MX28_PAD_GPMI_CE3N__CAN1_RX MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_1)
221#define MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_1)
222#define MX28_PAD_GPMI_RDY1__SSP1_CMD MXS_IOMUX_PAD_NAKED(0, 21, PAD_MUXSEL_1)
223#define MX28_PAD_GPMI_RDY2__CAN0_TX MXS_IOMUX_PAD_NAKED(0, 22, PAD_MUXSEL_1)
224#define MX28_PAD_GPMI_RDY3__CAN0_RX MXS_IOMUX_PAD_NAKED(0, 23, PAD_MUXSEL_1)
225#define MX28_PAD_GPMI_RDN__SSP3_SCK MXS_IOMUX_PAD_NAKED(0, 24, PAD_MUXSEL_1)
226#define MX28_PAD_GPMI_WRN__SSP1_SCK MXS_IOMUX_PAD_NAKED(0, 25, PAD_MUXSEL_1)
227#define MX28_PAD_GPMI_ALE__SSP3_D1 MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_1)
228#define MX28_PAD_GPMI_CLE__SSP3_D2 MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_1)
229#define MX28_PAD_GPMI_RESETN__SSP3_CMD MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_1)
230
231#define MX28_PAD_LCD_D03__ETM_DA8 MXS_IOMUX_PAD_NAKED(1, 3, PAD_MUXSEL_1)
232#define MX28_PAD_LCD_D04__ETM_DA9 MXS_IOMUX_PAD_NAKED(1, 4, PAD_MUXSEL_1)
233#define MX28_PAD_LCD_D08__ETM_DA3 MXS_IOMUX_PAD_NAKED(1, 8, PAD_MUXSEL_1)
234#define MX28_PAD_LCD_D09__ETM_DA4 MXS_IOMUX_PAD_NAKED(1, 9, PAD_MUXSEL_1)
235#define MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT MXS_IOMUX_PAD_NAKED(1, 20, PAD_MUXSEL_1)
236#define MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN MXS_IOMUX_PAD_NAKED(1, 21, PAD_MUXSEL_1)
237#define MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_1)
238#define MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_1)
239#define MX28_PAD_LCD_RD_E__LCD_VSYNC MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_1)
240#define MX28_PAD_LCD_WR_RWN__LCD_HSYNC MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_1)
241#define MX28_PAD_LCD_RS__LCD_DOTCLK MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_1)
242#define MX28_PAD_LCD_CS__LCD_ENABLE MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_1)
243#define MX28_PAD_LCD_VSYNC__SAIF1_SDATA0 MXS_IOMUX_PAD_NAKED(1, 28, PAD_MUXSEL_1)
244#define MX28_PAD_LCD_HSYNC__SAIF1_SDATA1 MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_1)
245#define MX28_PAD_LCD_DOTCLK__SAIF1_MCLK MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_1)
246
247#define MX28_PAD_SSP0_DATA4__SSP2_D0 MXS_IOMUX_PAD_NAKED(2, 4, PAD_MUXSEL_1)
248#define MX28_PAD_SSP0_DATA5__SSP2_D3 MXS_IOMUX_PAD_NAKED(2, 5, PAD_MUXSEL_1)
249#define MX28_PAD_SSP0_DATA6__SSP2_CMD MXS_IOMUX_PAD_NAKED(2, 6, PAD_MUXSEL_1)
250#define MX28_PAD_SSP0_DATA7__SSP2_SCK MXS_IOMUX_PAD_NAKED(2, 7, PAD_MUXSEL_1)
251#define MX28_PAD_SSP1_SCK__SSP2_D1 MXS_IOMUX_PAD_NAKED(2, 12, PAD_MUXSEL_1)
252#define MX28_PAD_SSP1_CMD__SSP2_D2 MXS_IOMUX_PAD_NAKED(2, 13, PAD_MUXSEL_1)
253#define MX28_PAD_SSP1_DATA0__SSP2_D6 MXS_IOMUX_PAD_NAKED(2, 14, PAD_MUXSEL_1)
254#define MX28_PAD_SSP1_DATA3__SSP2_D7 MXS_IOMUX_PAD_NAKED(2, 15, PAD_MUXSEL_1)
255#define MX28_PAD_SSP2_SCK__AUART2_RX MXS_IOMUX_PAD_NAKED(2, 16, PAD_MUXSEL_1)
256#define MX28_PAD_SSP2_MOSI__AUART2_TX MXS_IOMUX_PAD_NAKED(2, 17, PAD_MUXSEL_1)
257#define MX28_PAD_SSP2_MISO__AUART3_RX MXS_IOMUX_PAD_NAKED(2, 18, PAD_MUXSEL_1)
258#define MX28_PAD_SSP2_SS0__AUART3_TX MXS_IOMUX_PAD_NAKED(2, 19, PAD_MUXSEL_1)
259#define MX28_PAD_SSP2_SS1__SSP2_D1 MXS_IOMUX_PAD_NAKED(2, 20, PAD_MUXSEL_1)
260#define MX28_PAD_SSP2_SS2__SSP2_D2 MXS_IOMUX_PAD_NAKED(2, 21, PAD_MUXSEL_1)
261#define MX28_PAD_SSP3_SCK__AUART4_TX MXS_IOMUX_PAD_NAKED(2, 24, PAD_MUXSEL_1)
262#define MX28_PAD_SSP3_MOSI__AUART4_RX MXS_IOMUX_PAD_NAKED(2, 25, PAD_MUXSEL_1)
263#define MX28_PAD_SSP3_MISO__AUART4_RTS MXS_IOMUX_PAD_NAKED(2, 26, PAD_MUXSEL_1)
264#define MX28_PAD_SSP3_SS0__AUART4_CTS MXS_IOMUX_PAD_NAKED(2, 27, PAD_MUXSEL_1)
265
266#define MX28_PAD_AUART0_RX__I2C0_SCL MXS_IOMUX_PAD_NAKED(3, 0, PAD_MUXSEL_1)
267#define MX28_PAD_AUART0_TX__I2C0_SDA MXS_IOMUX_PAD_NAKED(3, 1, PAD_MUXSEL_1)
268#define MX28_PAD_AUART0_CTS__AUART4_RX MXS_IOMUX_PAD_NAKED(3, 2, PAD_MUXSEL_1)
269#define MX28_PAD_AUART0_RTS__AUART4_TX MXS_IOMUX_PAD_NAKED(3, 3, PAD_MUXSEL_1)
270#define MX28_PAD_AUART1_RX__SSP2_CARD_DETECT MXS_IOMUX_PAD_NAKED(3, 4, PAD_MUXSEL_1)
271#define MX28_PAD_AUART1_TX__SSP3_CARD_DETECT MXS_IOMUX_PAD_NAKED(3, 5, PAD_MUXSEL_1)
272#define MX28_PAD_AUART1_CTS__USB0_OVERCURRENT MXS_IOMUX_PAD_NAKED(3, 6, PAD_MUXSEL_1)
273#define MX28_PAD_AUART1_RTS__USB0_ID MXS_IOMUX_PAD_NAKED(3, 7, PAD_MUXSEL_1)
274#define MX28_PAD_AUART2_RX__SSP3_D1 MXS_IOMUX_PAD_NAKED(3, 8, PAD_MUXSEL_1)
275#define MX28_PAD_AUART2_TX__SSP3_D2 MXS_IOMUX_PAD_NAKED(3, 9, PAD_MUXSEL_1)
276#define MX28_PAD_AUART2_CTS__I2C1_SCL MXS_IOMUX_PAD_NAKED(3, 10, PAD_MUXSEL_1)
277#define MX28_PAD_AUART2_RTS__I2C1_SDA MXS_IOMUX_PAD_NAKED(3, 11, PAD_MUXSEL_1)
278#define MX28_PAD_AUART3_RX__CAN0_TX MXS_IOMUX_PAD_NAKED(3, 12, PAD_MUXSEL_1)
279#define MX28_PAD_AUART3_TX__CAN0_RX MXS_IOMUX_PAD_NAKED(3, 13, PAD_MUXSEL_1)
280#define MX28_PAD_AUART3_CTS__CAN1_TX MXS_IOMUX_PAD_NAKED(3, 14, PAD_MUXSEL_1)
281#define MX28_PAD_AUART3_RTS__CAN1_RX MXS_IOMUX_PAD_NAKED(3, 15, PAD_MUXSEL_1)
282#define MX28_PAD_PWM0__I2C1_SCL MXS_IOMUX_PAD_NAKED(3, 16, PAD_MUXSEL_1)
283#define MX28_PAD_PWM1__I2C1_SDA MXS_IOMUX_PAD_NAKED(3, 17, PAD_MUXSEL_1)
284#define MX28_PAD_PWM2__USB0_ID MXS_IOMUX_PAD_NAKED(3, 18, PAD_MUXSEL_1)
285#define MX28_PAD_SAIF0_MCLK__PWM_3 MXS_IOMUX_PAD_NAKED(3, 20, PAD_MUXSEL_1)
286#define MX28_PAD_SAIF0_LRCLK__PWM_4 MXS_IOMUX_PAD_NAKED(3, 21, PAD_MUXSEL_1)
287#define MX28_PAD_SAIF0_BITCLK__PWM_5 MXS_IOMUX_PAD_NAKED(3, 22, PAD_MUXSEL_1)
288#define MX28_PAD_SAIF0_SDATA0__PWM_6 MXS_IOMUX_PAD_NAKED(3, 23, PAD_MUXSEL_1)
289#define MX28_PAD_I2C0_SCL__TIMROT_ROTARYA MXS_IOMUX_PAD_NAKED(3, 24, PAD_MUXSEL_1)
290#define MX28_PAD_I2C0_SDA__TIMROT_ROTARYB MXS_IOMUX_PAD_NAKED(3, 25, PAD_MUXSEL_1)
291#define MX28_PAD_SAIF1_SDATA0__PWM_7 MXS_IOMUX_PAD_NAKED(3, 26, PAD_MUXSEL_1)
292#define MX28_PAD_LCD_RESET__LCD_VSYNC MXS_IOMUX_PAD_NAKED(3, 30, PAD_MUXSEL_1)
293
294#define MX28_PAD_ENET0_MDC__GPMI_CE4N MXS_IOMUX_PAD_NAKED(4, 0, PAD_MUXSEL_1)
295#define MX28_PAD_ENET0_MDIO__GPMI_CE5N MXS_IOMUX_PAD_NAKED(4, 1, PAD_MUXSEL_1)
296#define MX28_PAD_ENET0_RX_EN__GPMI_CE6N MXS_IOMUX_PAD_NAKED(4, 2, PAD_MUXSEL_1)
297#define MX28_PAD_ENET0_RXD0__GPMI_CE7N MXS_IOMUX_PAD_NAKED(4, 3, PAD_MUXSEL_1)
298#define MX28_PAD_ENET0_RXD1__GPMI_READY4 MXS_IOMUX_PAD_NAKED(4, 4, PAD_MUXSEL_1)
299#define MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER MXS_IOMUX_PAD_NAKED(4, 5, PAD_MUXSEL_1)
300#define MX28_PAD_ENET0_TX_EN__GPMI_READY5 MXS_IOMUX_PAD_NAKED(4, 6, PAD_MUXSEL_1)
301#define MX28_PAD_ENET0_TXD0__GPMI_READY6 MXS_IOMUX_PAD_NAKED(4, 7, PAD_MUXSEL_1)
302#define MX28_PAD_ENET0_TXD1__GPMI_READY7 MXS_IOMUX_PAD_NAKED(4, 8, PAD_MUXSEL_1)
303#define MX28_PAD_ENET0_RXD2__ENET1_RXD0 MXS_IOMUX_PAD_NAKED(4, 9, PAD_MUXSEL_1)
304#define MX28_PAD_ENET0_RXD3__ENET1_RXD1 MXS_IOMUX_PAD_NAKED(4, 10, PAD_MUXSEL_1)
305#define MX28_PAD_ENET0_TXD2__ENET1_TXD0 MXS_IOMUX_PAD_NAKED(4, 11, PAD_MUXSEL_1)
306#define MX28_PAD_ENET0_TXD3__ENET1_TXD1 MXS_IOMUX_PAD_NAKED(4, 12, PAD_MUXSEL_1)
307#define MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER MXS_IOMUX_PAD_NAKED(4, 13, PAD_MUXSEL_1)
308#define MX28_PAD_ENET0_COL__ENET1_TX_EN MXS_IOMUX_PAD_NAKED(4, 14, PAD_MUXSEL_1)
309#define MX28_PAD_ENET0_CRS__ENET1_RX_EN MXS_IOMUX_PAD_NAKED(4, 15, PAD_MUXSEL_1)
310
311/* MUXSEL_2 */
312#define MX28_PAD_GPMI_CE2N__ENET0_RX_ER MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_2)
313#define MX28_PAD_GPMI_CE3N__SAIF1_MCLK MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_2)
314#define MX28_PAD_GPMI_RDY0__USB0_ID MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_2)
315#define MX28_PAD_GPMI_RDY2__ENET0_TX_ER MXS_IOMUX_PAD_NAKED(0, 22, PAD_MUXSEL_2)
316#define MX28_PAD_GPMI_RDY3__HSADC_TRIGGER MXS_IOMUX_PAD_NAKED(0, 23, PAD_MUXSEL_2)
317#define MX28_PAD_GPMI_ALE__SSP3_D4 MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_2)
318#define MX28_PAD_GPMI_CLE__SSP3_D5 MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_2)
319
320#define MX28_PAD_LCD_D00__ETM_DA0 MXS_IOMUX_PAD_NAKED(1, 0, PAD_MUXSEL_2)
321#define MX28_PAD_LCD_D01__ETM_DA1 MXS_IOMUX_PAD_NAKED(1, 1, PAD_MUXSEL_2)
322#define MX28_PAD_LCD_D02__ETM_DA2 MXS_IOMUX_PAD_NAKED(1, 2, PAD_MUXSEL_2)
323#define MX28_PAD_LCD_D03__ETM_DA3 MXS_IOMUX_PAD_NAKED(1, 3, PAD_MUXSEL_2)
324#define MX28_PAD_LCD_D04__ETM_DA4 MXS_IOMUX_PAD_NAKED(1, 4, PAD_MUXSEL_2)
325#define MX28_PAD_LCD_D05__ETM_DA5 MXS_IOMUX_PAD_NAKED(1, 5, PAD_MUXSEL_2)
326#define MX28_PAD_LCD_D06__ETM_DA6 MXS_IOMUX_PAD_NAKED(1, 6, PAD_MUXSEL_2)
327#define MX28_PAD_LCD_D07__ETM_DA7 MXS_IOMUX_PAD_NAKED(1, 7, PAD_MUXSEL_2)
328#define MX28_PAD_LCD_D08__ETM_DA8 MXS_IOMUX_PAD_NAKED(1, 8, PAD_MUXSEL_2)
329#define MX28_PAD_LCD_D09__ETM_DA9 MXS_IOMUX_PAD_NAKED(1, 9, PAD_MUXSEL_2)
330#define MX28_PAD_LCD_D10__ETM_DA10 MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_2)
331#define MX28_PAD_LCD_D11__ETM_DA11 MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_2)
332#define MX28_PAD_LCD_D12__ETM_DA12 MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_2)
333#define MX28_PAD_LCD_D13__ETM_DA13 MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_2)
334#define MX28_PAD_LCD_D14__ETM_DA14 MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_2)
335#define MX28_PAD_LCD_D15__ETM_DA15 MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_2)
336#define MX28_PAD_LCD_D16__ETM_DA7 MXS_IOMUX_PAD_NAKED(1, 16, PAD_MUXSEL_2)
337#define MX28_PAD_LCD_D17__ETM_DA6 MXS_IOMUX_PAD_NAKED(1, 17, PAD_MUXSEL_2)
338#define MX28_PAD_LCD_D18__ETM_DA5 MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_2)
339#define MX28_PAD_LCD_D19__ETM_DA4 MXS_IOMUX_PAD_NAKED(1, 19, PAD_MUXSEL_2)
340#define MX28_PAD_LCD_D20__ETM_DA3 MXS_IOMUX_PAD_NAKED(1, 20, PAD_MUXSEL_2)
341#define MX28_PAD_LCD_D21__ETM_DA2 MXS_IOMUX_PAD_NAKED(1, 21, PAD_MUXSEL_2)
342#define MX28_PAD_LCD_D22__ETM_DA1 MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_2)
343#define MX28_PAD_LCD_D23__ETM_DA0 MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_2)
344#define MX28_PAD_LCD_RD_E__ETM_TCTL MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_2)
345#define MX28_PAD_LCD_WR_RWN__ETM_TCLK MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_2)
346#define MX28_PAD_LCD_HSYNC__ETM_TCTL MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_2)
347#define MX28_PAD_LCD_DOTCLK__ETM_TCLK MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_2)
348
349#define MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT MXS_IOMUX_PAD_NAKED(2, 12, PAD_MUXSEL_2)
350#define MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN MXS_IOMUX_PAD_NAKED(2, 13, PAD_MUXSEL_2)
351#define MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT MXS_IOMUX_PAD_NAKED(2, 14, PAD_MUXSEL_2)
352#define MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN MXS_IOMUX_PAD_NAKED(2, 15, PAD_MUXSEL_2)
353#define MX28_PAD_SSP2_SCK__SAIF0_SDATA1 MXS_IOMUX_PAD_NAKED(2, 16, PAD_MUXSEL_2)
354#define MX28_PAD_SSP2_MOSI__SAIF0_SDATA2 MXS_IOMUX_PAD_NAKED(2, 17, PAD_MUXSEL_2)
355#define MX28_PAD_SSP2_MISO__SAIF1_SDATA1 MXS_IOMUX_PAD_NAKED(2, 18, PAD_MUXSEL_2)
356#define MX28_PAD_SSP2_SS0__SAIF1_SDATA2 MXS_IOMUX_PAD_NAKED(2, 19, PAD_MUXSEL_2)
357#define MX28_PAD_SSP2_SS1__USB1_OVERCURRENT MXS_IOMUX_PAD_NAKED(2, 20, PAD_MUXSEL_2)
358#define MX28_PAD_SSP2_SS2__USB0_OVERCURRENT MXS_IOMUX_PAD_NAKED(2, 21, PAD_MUXSEL_2)
359#define MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT MXS_IOMUX_PAD_NAKED(2, 24, PAD_MUXSEL_2)
360#define MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN MXS_IOMUX_PAD_NAKED(2, 25, PAD_MUXSEL_2)
361#define MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT MXS_IOMUX_PAD_NAKED(2, 26, PAD_MUXSEL_2)
362#define MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN MXS_IOMUX_PAD_NAKED(2, 27, PAD_MUXSEL_2)
363
364#define MX28_PAD_AUART0_RX__DUART_CTS MXS_IOMUX_PAD_NAKED(3, 0, PAD_MUXSEL_2)
365#define MX28_PAD_AUART0_TX__DUART_RTS MXS_IOMUX_PAD_NAKED(3, 1, PAD_MUXSEL_2)
366#define MX28_PAD_AUART0_CTS__DUART_RX MXS_IOMUX_PAD_NAKED(3, 2, PAD_MUXSEL_2)
367#define MX28_PAD_AUART0_RTS__DUART_TX MXS_IOMUX_PAD_NAKED(3, 3, PAD_MUXSEL_2)
368#define MX28_PAD_AUART1_RX__PWM_0 MXS_IOMUX_PAD_NAKED(3, 4, PAD_MUXSEL_2)
369#define MX28_PAD_AUART1_TX__PWM_1 MXS_IOMUX_PAD_NAKED(3, 5, PAD_MUXSEL_2)
370#define MX28_PAD_AUART1_CTS__TIMROT_ROTARYA MXS_IOMUX_PAD_NAKED(3, 6, PAD_MUXSEL_2)
371#define MX28_PAD_AUART1_RTS__TIMROT_ROTARYB MXS_IOMUX_PAD_NAKED(3, 7, PAD_MUXSEL_2)
372#define MX28_PAD_AUART2_RX__SSP3_D4 MXS_IOMUX_PAD_NAKED(3, 8, PAD_MUXSEL_2)
373#define MX28_PAD_AUART2_TX__SSP3_D5 MXS_IOMUX_PAD_NAKED(3, 9, PAD_MUXSEL_2)
374#define MX28_PAD_AUART2_CTS__SAIF1_BITCLK MXS_IOMUX_PAD_NAKED(3, 10, PAD_MUXSEL_2)
375#define MX28_PAD_AUART2_RTS__SAIF1_LRCLK MXS_IOMUX_PAD_NAKED(3, 11, PAD_MUXSEL_2)
376#define MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT MXS_IOMUX_PAD_NAKED(3, 12, PAD_MUXSEL_2)
377#define MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN MXS_IOMUX_PAD_NAKED(3, 13, PAD_MUXSEL_2)
378#define MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT MXS_IOMUX_PAD_NAKED(3, 14, PAD_MUXSEL_2)
379#define MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN MXS_IOMUX_PAD_NAKED(3, 15, PAD_MUXSEL_2)
380#define MX28_PAD_PWM0__DUART_RX MXS_IOMUX_PAD_NAKED(3, 16, PAD_MUXSEL_2)
381#define MX28_PAD_PWM1__DUART_TX MXS_IOMUX_PAD_NAKED(3, 17, PAD_MUXSEL_2)
382#define MX28_PAD_PWM2__USB1_OVERCURRENT MXS_IOMUX_PAD_NAKED(3, 18, PAD_MUXSEL_2)
383#define MX28_PAD_SAIF0_MCLK__AUART4_CTS MXS_IOMUX_PAD_NAKED(3, 20, PAD_MUXSEL_2)
384#define MX28_PAD_SAIF0_LRCLK__AUART4_RTS MXS_IOMUX_PAD_NAKED(3, 21, PAD_MUXSEL_2)
385#define MX28_PAD_SAIF0_BITCLK__AUART4_RX MXS_IOMUX_PAD_NAKED(3, 22, PAD_MUXSEL_2)
386#define MX28_PAD_SAIF0_SDATA0__AUART4_TX MXS_IOMUX_PAD_NAKED(3, 23, PAD_MUXSEL_2)
387#define MX28_PAD_I2C0_SCL__DUART_RX MXS_IOMUX_PAD_NAKED(3, 24, PAD_MUXSEL_2)
388#define MX28_PAD_I2C0_SDA__DUART_TX MXS_IOMUX_PAD_NAKED(3, 25, PAD_MUXSEL_2)
389#define MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1 MXS_IOMUX_PAD_NAKED(3, 26, PAD_MUXSEL_2)
390#define MX28_PAD_SPDIF__ENET1_RX_ER MXS_IOMUX_PAD_NAKED(3, 27, PAD_MUXSEL_2)
391
392#define MX28_PAD_ENET0_MDC__SAIF0_SDATA1 MXS_IOMUX_PAD_NAKED(4, 0, PAD_MUXSEL_2)
393#define MX28_PAD_ENET0_MDIO__SAIF0_SDATA2 MXS_IOMUX_PAD_NAKED(4, 1, PAD_MUXSEL_2)
394#define MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1 MXS_IOMUX_PAD_NAKED(4, 2, PAD_MUXSEL_2)
395#define MX28_PAD_ENET0_RXD0__SAIF1_SDATA2 MXS_IOMUX_PAD_NAKED(4, 3, PAD_MUXSEL_2)
396#define MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT MXS_IOMUX_PAD_NAKED(4, 5, PAD_MUXSEL_2)
397#define MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT MXS_IOMUX_PAD_NAKED(4, 9, PAD_MUXSEL_2)
398#define MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN MXS_IOMUX_PAD_NAKED(4, 10, PAD_MUXSEL_2)
399#define MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT MXS_IOMUX_PAD_NAKED(4, 11, PAD_MUXSEL_2)
400#define MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN MXS_IOMUX_PAD_NAKED(4, 12, PAD_MUXSEL_2)
401#define MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN MXS_IOMUX_PAD_NAKED(4, 13, PAD_MUXSEL_2)
402#define MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT MXS_IOMUX_PAD_NAKED(4, 14, PAD_MUXSEL_2)
403#define MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN MXS_IOMUX_PAD_NAKED(4, 15, PAD_MUXSEL_2)
404
405/* MUXSEL_GPIO */
406#define MX28_PAD_GPMI_D00__GPIO_0_0 MXS_IOMUX_PAD_NAKED(0, 0, PAD_MUXSEL_GPIO)
407#define MX28_PAD_GPMI_D01__GPIO_0_1 MXS_IOMUX_PAD_NAKED(0, 1, PAD_MUXSEL_GPIO)
408#define MX28_PAD_GPMI_D02__GPIO_0_2 MXS_IOMUX_PAD_NAKED(0, 2, PAD_MUXSEL_GPIO)
409#define MX28_PAD_GPMI_D03__GPIO_0_3 MXS_IOMUX_PAD_NAKED(0, 3, PAD_MUXSEL_GPIO)
410#define MX28_PAD_GPMI_D04__GPIO_0_4 MXS_IOMUX_PAD_NAKED(0, 4, PAD_MUXSEL_GPIO)
411#define MX28_PAD_GPMI_D05__GPIO_0_5 MXS_IOMUX_PAD_NAKED(0, 5, PAD_MUXSEL_GPIO)
412#define MX28_PAD_GPMI_D06__GPIO_0_6 MXS_IOMUX_PAD_NAKED(0, 6, PAD_MUXSEL_GPIO)
413#define MX28_PAD_GPMI_D07__GPIO_0_7 MXS_IOMUX_PAD_NAKED(0, 7, PAD_MUXSEL_GPIO)
414#define MX28_PAD_GPMI_CE0N__GPIO_0_16 MXS_IOMUX_PAD_NAKED(0, 16, PAD_MUXSEL_GPIO)
415#define MX28_PAD_GPMI_CE1N__GPIO_0_17 MXS_IOMUX_PAD_NAKED(0, 17, PAD_MUXSEL_GPIO)
416#define MX28_PAD_GPMI_CE2N__GPIO_0_18 MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_GPIO)
417#define MX28_PAD_GPMI_CE3N__GPIO_0_19 MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_GPIO)
418#define MX28_PAD_GPMI_RDY0__GPIO_0_20 MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_GPIO)
419#define MX28_PAD_GPMI_RDY1__GPIO_0_21 MXS_IOMUX_PAD_NAKED(0, 21, PAD_MUXSEL_GPIO)
420#define MX28_PAD_GPMI_RDY2__GPIO_0_22 MXS_IOMUX_PAD_NAKED(0, 22, PAD_MUXSEL_GPIO)
421#define MX28_PAD_GPMI_RDY3__GPIO_0_23 MXS_IOMUX_PAD_NAKED(0, 23, PAD_MUXSEL_GPIO)
422#define MX28_PAD_GPMI_RDN__GPIO_0_24 MXS_IOMUX_PAD_NAKED(0, 24, PAD_MUXSEL_GPIO)
423#define MX28_PAD_GPMI_WRN__GPIO_0_25 MXS_IOMUX_PAD_NAKED(0, 25, PAD_MUXSEL_GPIO)
424#define MX28_PAD_GPMI_ALE__GPIO_0_26 MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_GPIO)
425#define MX28_PAD_GPMI_CLE__GPIO_0_27 MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_GPIO)
426#define MX28_PAD_GPMI_RESETN__GPIO_0_28 MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_GPIO)
427
428#define MX28_PAD_LCD_D00__GPIO_1_0 MXS_IOMUX_PAD_NAKED(1, 0, PAD_MUXSEL_GPIO)
429#define MX28_PAD_LCD_D01__GPIO_1_1 MXS_IOMUX_PAD_NAKED(1, 1, PAD_MUXSEL_GPIO)
430#define MX28_PAD_LCD_D02__GPIO_1_2 MXS_IOMUX_PAD_NAKED(1, 2, PAD_MUXSEL_GPIO)
431#define MX28_PAD_LCD_D03__GPIO_1_3 MXS_IOMUX_PAD_NAKED(1, 3, PAD_MUXSEL_GPIO)
432#define MX28_PAD_LCD_D04__GPIO_1_4 MXS_IOMUX_PAD_NAKED(1, 4, PAD_MUXSEL_GPIO)
433#define MX28_PAD_LCD_D05__GPIO_1_5 MXS_IOMUX_PAD_NAKED(1, 5, PAD_MUXSEL_GPIO)
434#define MX28_PAD_LCD_D06__GPIO_1_6 MXS_IOMUX_PAD_NAKED(1, 6, PAD_MUXSEL_GPIO)
435#define MX28_PAD_LCD_D07__GPIO_1_7 MXS_IOMUX_PAD_NAKED(1, 7, PAD_MUXSEL_GPIO)
436#define MX28_PAD_LCD_D08__GPIO_1_8 MXS_IOMUX_PAD_NAKED(1, 8, PAD_MUXSEL_GPIO)
437#define MX28_PAD_LCD_D09__GPIO_1_9 MXS_IOMUX_PAD_NAKED(1, 9, PAD_MUXSEL_GPIO)
438#define MX28_PAD_LCD_D10__GPIO_1_10 MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_GPIO)
439#define MX28_PAD_LCD_D11__GPIO_1_11 MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_GPIO)
440#define MX28_PAD_LCD_D12__GPIO_1_12 MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_GPIO)
441#define MX28_PAD_LCD_D13__GPIO_1_13 MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_GPIO)
442#define MX28_PAD_LCD_D14__GPIO_1_14 MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_GPIO)
443#define MX28_PAD_LCD_D15__GPIO_1_15 MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_GPIO)
444#define MX28_PAD_LCD_D16__GPIO_1_16 MXS_IOMUX_PAD_NAKED(1, 16, PAD_MUXSEL_GPIO)
445#define MX28_PAD_LCD_D17__GPIO_1_17 MXS_IOMUX_PAD_NAKED(1, 17, PAD_MUXSEL_GPIO)
446#define MX28_PAD_LCD_D18__GPIO_1_18 MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_GPIO)
447#define MX28_PAD_LCD_D19__GPIO_1_19 MXS_IOMUX_PAD_NAKED(1, 19, PAD_MUXSEL_GPIO)
448#define MX28_PAD_LCD_D20__GPIO_1_20 MXS_IOMUX_PAD_NAKED(1, 20, PAD_MUXSEL_GPIO)
449#define MX28_PAD_LCD_D21__GPIO_1_21 MXS_IOMUX_PAD_NAKED(1, 21, PAD_MUXSEL_GPIO)
450#define MX28_PAD_LCD_D22__GPIO_1_22 MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_GPIO)
451#define MX28_PAD_LCD_D23__GPIO_1_23 MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_GPIO)
452#define MX28_PAD_LCD_RD_E__GPIO_1_24 MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_GPIO)
453#define MX28_PAD_LCD_WR_RWN__GPIO_1_25 MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_GPIO)
454#define MX28_PAD_LCD_RS__GPIO_1_26 MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_GPIO)
455#define MX28_PAD_LCD_CS__GPIO_1_27 MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_GPIO)
456#define MX28_PAD_LCD_VSYNC__GPIO_1_28 MXS_IOMUX_PAD_NAKED(1, 28, PAD_MUXSEL_GPIO)
457#define MX28_PAD_LCD_HSYNC__GPIO_1_29 MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_GPIO)
458#define MX28_PAD_LCD_DOTCLK__GPIO_1_30 MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_GPIO)
459#define MX28_PAD_LCD_ENABLE__GPIO_1_31 MXS_IOMUX_PAD_NAKED(1, 31, PAD_MUXSEL_GPIO)
460
461#define MX28_PAD_SSP0_DATA0__GPIO_2_0 MXS_IOMUX_PAD_NAKED(2, 0, PAD_MUXSEL_GPIO)
462#define MX28_PAD_SSP0_DATA1__GPIO_2_1 MXS_IOMUX_PAD_NAKED(2, 1, PAD_MUXSEL_GPIO)
463#define MX28_PAD_SSP0_DATA2__GPIO_2_2 MXS_IOMUX_PAD_NAKED(2, 2, PAD_MUXSEL_GPIO)
464#define MX28_PAD_SSP0_DATA3__GPIO_2_3 MXS_IOMUX_PAD_NAKED(2, 3, PAD_MUXSEL_GPIO)
465#define MX28_PAD_SSP0_DATA4__GPIO_2_4 MXS_IOMUX_PAD_NAKED(2, 4, PAD_MUXSEL_GPIO)
466#define MX28_PAD_SSP0_DATA5__GPIO_2_5 MXS_IOMUX_PAD_NAKED(2, 5, PAD_MUXSEL_GPIO)
467#define MX28_PAD_SSP0_DATA6__GPIO_2_6 MXS_IOMUX_PAD_NAKED(2, 6, PAD_MUXSEL_GPIO)
468#define MX28_PAD_SSP0_DATA7__GPIO_2_7 MXS_IOMUX_PAD_NAKED(2, 7, PAD_MUXSEL_GPIO)
469#define MX28_PAD_SSP0_CMD__GPIO_2_8 MXS_IOMUX_PAD_NAKED(2, 8, PAD_MUXSEL_GPIO)
470#define MX28_PAD_SSP0_DETECT__GPIO_2_9 MXS_IOMUX_PAD_NAKED(2, 9, PAD_MUXSEL_GPIO)
471#define MX28_PAD_SSP0_SCK__GPIO_2_10 MXS_IOMUX_PAD_NAKED(2, 10, PAD_MUXSEL_GPIO)
472#define MX28_PAD_SSP1_SCK__GPIO_2_12 MXS_IOMUX_PAD_NAKED(2, 12, PAD_MUXSEL_GPIO)
473#define MX28_PAD_SSP1_CMD__GPIO_2_13 MXS_IOMUX_PAD_NAKED(2, 13, PAD_MUXSEL_GPIO)
474#define MX28_PAD_SSP1_DATA0__GPIO_2_14 MXS_IOMUX_PAD_NAKED(2, 14, PAD_MUXSEL_GPIO)
475#define MX28_PAD_SSP1_DATA3__GPIO_2_15 MXS_IOMUX_PAD_NAKED(2, 15, PAD_MUXSEL_GPIO)
476#define MX28_PAD_SSP2_SCK__GPIO_2_16 MXS_IOMUX_PAD_NAKED(2, 16, PAD_MUXSEL_GPIO)
477#define MX28_PAD_SSP2_MOSI__GPIO_2_17 MXS_IOMUX_PAD_NAKED(2, 17, PAD_MUXSEL_GPIO)
478#define MX28_PAD_SSP2_MISO__GPIO_2_18 MXS_IOMUX_PAD_NAKED(2, 18, PAD_MUXSEL_GPIO)
479#define MX28_PAD_SSP2_SS0__GPIO_2_19 MXS_IOMUX_PAD_NAKED(2, 19, PAD_MUXSEL_GPIO)
480#define MX28_PAD_SSP2_SS1__GPIO_2_20 MXS_IOMUX_PAD_NAKED(2, 20, PAD_MUXSEL_GPIO)
481#define MX28_PAD_SSP2_SS2__GPIO_2_21 MXS_IOMUX_PAD_NAKED(2, 21, PAD_MUXSEL_GPIO)
482#define MX28_PAD_SSP3_SCK__GPIO_2_24 MXS_IOMUX_PAD_NAKED(2, 24, PAD_MUXSEL_GPIO)
483#define MX28_PAD_SSP3_MOSI__GPIO_2_25 MXS_IOMUX_PAD_NAKED(2, 25, PAD_MUXSEL_GPIO)
484#define MX28_PAD_SSP3_MISO__GPIO_2_26 MXS_IOMUX_PAD_NAKED(2, 26, PAD_MUXSEL_GPIO)
485#define MX28_PAD_SSP3_SS0__GPIO_2_27 MXS_IOMUX_PAD_NAKED(2, 27, PAD_MUXSEL_GPIO)
486
487#define MX28_PAD_AUART0_RX__GPIO_3_0 MXS_IOMUX_PAD_NAKED(3, 0, PAD_MUXSEL_GPIO)
488#define MX28_PAD_AUART0_TX__GPIO_3_1 MXS_IOMUX_PAD_NAKED(3, 1, PAD_MUXSEL_GPIO)
489#define MX28_PAD_AUART0_CTS__GPIO_3_2 MXS_IOMUX_PAD_NAKED(3, 2, PAD_MUXSEL_GPIO)
490#define MX28_PAD_AUART0_RTS__GPIO_3_3 MXS_IOMUX_PAD_NAKED(3, 3, PAD_MUXSEL_GPIO)
491#define MX28_PAD_AUART1_RX__GPIO_3_4 MXS_IOMUX_PAD_NAKED(3, 4, PAD_MUXSEL_GPIO)
492#define MX28_PAD_AUART1_TX__GPIO_3_5 MXS_IOMUX_PAD_NAKED(3, 5, PAD_MUXSEL_GPIO)
493#define MX28_PAD_AUART1_CTS__GPIO_3_6 MXS_IOMUX_PAD_NAKED(3, 6, PAD_MUXSEL_GPIO)
494#define MX28_PAD_AUART1_RTS__GPIO_3_7 MXS_IOMUX_PAD_NAKED(3, 7, PAD_MUXSEL_GPIO)
495#define MX28_PAD_AUART2_RX__GPIO_3_8 MXS_IOMUX_PAD_NAKED(3, 8, PAD_MUXSEL_GPIO)
496#define MX28_PAD_AUART2_TX__GPIO_3_9 MXS_IOMUX_PAD_NAKED(3, 9, PAD_MUXSEL_GPIO)
497#define MX28_PAD_AUART2_CTS__GPIO_3_10 MXS_IOMUX_PAD_NAKED(3, 10, PAD_MUXSEL_GPIO)
498#define MX28_PAD_AUART2_RTS__GPIO_3_11 MXS_IOMUX_PAD_NAKED(3, 11, PAD_MUXSEL_GPIO)
499#define MX28_PAD_AUART3_RX__GPIO_3_12 MXS_IOMUX_PAD_NAKED(3, 12, PAD_MUXSEL_GPIO)
500#define MX28_PAD_AUART3_TX__GPIO_3_13 MXS_IOMUX_PAD_NAKED(3, 13, PAD_MUXSEL_GPIO)
501#define MX28_PAD_AUART3_CTS__GPIO_3_14 MXS_IOMUX_PAD_NAKED(3, 14, PAD_MUXSEL_GPIO)
502#define MX28_PAD_AUART3_RTS__GPIO_3_15 MXS_IOMUX_PAD_NAKED(3, 15, PAD_MUXSEL_GPIO)
503#define MX28_PAD_PWM0__GPIO_3_16 MXS_IOMUX_PAD_NAKED(3, 16, PAD_MUXSEL_GPIO)
504#define MX28_PAD_PWM1__GPIO_3_17 MXS_IOMUX_PAD_NAKED(3, 17, PAD_MUXSEL_GPIO)
505#define MX28_PAD_PWM2__GPIO_3_18 MXS_IOMUX_PAD_NAKED(3, 18, PAD_MUXSEL_GPIO)
506#define MX28_PAD_SAIF0_MCLK__GPIO_3_20 MXS_IOMUX_PAD_NAKED(3, 20, PAD_MUXSEL_GPIO)
507#define MX28_PAD_SAIF0_LRCLK__GPIO_3_21 MXS_IOMUX_PAD_NAKED(3, 21, PAD_MUXSEL_GPIO)
508#define MX28_PAD_SAIF0_BITCLK__GPIO_3_22 MXS_IOMUX_PAD_NAKED(3, 22, PAD_MUXSEL_GPIO)
509#define MX28_PAD_SAIF0_SDATA0__GPIO_3_23 MXS_IOMUX_PAD_NAKED(3, 23, PAD_MUXSEL_GPIO)
510#define MX28_PAD_I2C0_SCL__GPIO_3_24 MXS_IOMUX_PAD_NAKED(3, 24, PAD_MUXSEL_GPIO)
511#define MX28_PAD_I2C0_SDA__GPIO_3_25 MXS_IOMUX_PAD_NAKED(3, 25, PAD_MUXSEL_GPIO)
512#define MX28_PAD_SAIF1_SDATA0__GPIO_3_26 MXS_IOMUX_PAD_NAKED(3, 26, PAD_MUXSEL_GPIO)
513#define MX28_PAD_SPDIF__GPIO_3_27 MXS_IOMUX_PAD_NAKED(3, 27, PAD_MUXSEL_GPIO)
514#define MX28_PAD_PWM3__GPIO_3_28 MXS_IOMUX_PAD_NAKED(3, 28, PAD_MUXSEL_GPIO)
515#define MX28_PAD_PWM4__GPIO_3_29 MXS_IOMUX_PAD_NAKED(3, 29, PAD_MUXSEL_GPIO)
516#define MX28_PAD_LCD_RESET__GPIO_3_30 MXS_IOMUX_PAD_NAKED(3, 30, PAD_MUXSEL_GPIO)
517
518#define MX28_PAD_ENET0_MDC__GPIO_4_0 MXS_IOMUX_PAD_NAKED(4, 0, PAD_MUXSEL_GPIO)
519#define MX28_PAD_ENET0_MDIO__GPIO_4_1 MXS_IOMUX_PAD_NAKED(4, 1, PAD_MUXSEL_GPIO)
520#define MX28_PAD_ENET0_RX_EN__GPIO_4_2 MXS_IOMUX_PAD_NAKED(4, 2, PAD_MUXSEL_GPIO)
521#define MX28_PAD_ENET0_RXD0__GPIO_4_3 MXS_IOMUX_PAD_NAKED(4, 3, PAD_MUXSEL_GPIO)
522#define MX28_PAD_ENET0_RXD1__GPIO_4_4 MXS_IOMUX_PAD_NAKED(4, 4, PAD_MUXSEL_GPIO)
523#define MX28_PAD_ENET0_TX_CLK__GPIO_4_5 MXS_IOMUX_PAD_NAKED(4, 5, PAD_MUXSEL_GPIO)
524#define MX28_PAD_ENET0_TX_EN__GPIO_4_6 MXS_IOMUX_PAD_NAKED(4, 6, PAD_MUXSEL_GPIO)
525#define MX28_PAD_ENET0_TXD0__GPIO_4_7 MXS_IOMUX_PAD_NAKED(4, 7, PAD_MUXSEL_GPIO)
526#define MX28_PAD_ENET0_TXD1__GPIO_4_8 MXS_IOMUX_PAD_NAKED(4, 8, PAD_MUXSEL_GPIO)
527#define MX28_PAD_ENET0_RXD2__GPIO_4_9 MXS_IOMUX_PAD_NAKED(4, 9, PAD_MUXSEL_GPIO)
528#define MX28_PAD_ENET0_RXD3__GPIO_4_10 MXS_IOMUX_PAD_NAKED(4, 10, PAD_MUXSEL_GPIO)
529#define MX28_PAD_ENET0_TXD2__GPIO_4_11 MXS_IOMUX_PAD_NAKED(4, 11, PAD_MUXSEL_GPIO)
530#define MX28_PAD_ENET0_TXD3__GPIO_4_12 MXS_IOMUX_PAD_NAKED(4, 12, PAD_MUXSEL_GPIO)
531#define MX28_PAD_ENET0_RX_CLK__GPIO_4_13 MXS_IOMUX_PAD_NAKED(4, 13, PAD_MUXSEL_GPIO)
532#define MX28_PAD_ENET0_COL__GPIO_4_14 MXS_IOMUX_PAD_NAKED(4, 14, PAD_MUXSEL_GPIO)
533#define MX28_PAD_ENET0_CRS__GPIO_4_15 MXS_IOMUX_PAD_NAKED(4, 15, PAD_MUXSEL_GPIO)
534#define MX28_PAD_ENET_CLK__GPIO_4_16 MXS_IOMUX_PAD_NAKED(4, 16, PAD_MUXSEL_GPIO)
535#define MX28_PAD_JTAG_RTCK__GPIO_4_20 MXS_IOMUX_PAD_NAKED(4, 20, PAD_MUXSEL_GPIO)
536
537#endif /* __MACH_IOMUX_MX28_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/iomux.h b/arch/arm/mach-mxs/include/mach/iomux.h
deleted file mode 100644
index 7abdf58b8bb7..000000000000
--- a/arch/arm/mach-mxs/include/mach/iomux.h
+++ /dev/null
@@ -1,168 +0,0 @@
1/*
2 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
3 * <armlinux@phytec.de>
4 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __MACH_MXS_IOMUX_H__
22#define __MACH_MXS_IOMUX_H__
23
24/*
25 * IOMUX/PAD Bit field definitions
26 *
27 * PAD_BANK: 0..2 (3)
28 * PAD_PIN: 3..7 (5)
29 * PAD_MUXSEL: 8..9 (2)
30 * PAD_MA: 10..11 (2)
31 * PAD_MA_VALID: 12 (1)
32 * PAD_VOL: 13 (1)
33 * PAD_VOL_VALID: 14 (1)
34 * PAD_PULL: 15 (1)
35 * PAD_PULL_VALID: 16 (1)
36 * RESERVED: 17..31 (15)
37 */
38typedef u32 iomux_cfg_t;
39
40#define MXS_PAD_BANK_SHIFT 0
41#define MXS_PAD_BANK_MASK ((iomux_cfg_t)0x7 << MXS_PAD_BANK_SHIFT)
42#define MXS_PAD_PIN_SHIFT 3
43#define MXS_PAD_PIN_MASK ((iomux_cfg_t)0x1f << MXS_PAD_PIN_SHIFT)
44#define MXS_PAD_MUXSEL_SHIFT 8
45#define MXS_PAD_MUXSEL_MASK ((iomux_cfg_t)0x3 << MXS_PAD_MUXSEL_SHIFT)
46#define MXS_PAD_MA_SHIFT 10
47#define MXS_PAD_MA_MASK ((iomux_cfg_t)0x3 << MXS_PAD_MA_SHIFT)
48#define MXS_PAD_MA_VALID_SHIFT 12
49#define MXS_PAD_MA_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_MA_VALID_SHIFT)
50#define MXS_PAD_VOL_SHIFT 13
51#define MXS_PAD_VOL_MASK ((iomux_cfg_t)0x1 << MXS_PAD_VOL_SHIFT)
52#define MXS_PAD_VOL_VALID_SHIFT 14
53#define MXS_PAD_VOL_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_VOL_VALID_SHIFT)
54#define MXS_PAD_PULL_SHIFT 15
55#define MXS_PAD_PULL_MASK ((iomux_cfg_t)0x1 << MXS_PAD_PULL_SHIFT)
56#define MXS_PAD_PULL_VALID_SHIFT 16
57#define MXS_PAD_PULL_VALID_MASK ((iomux_cfg_t)0x1 << MXS_PAD_PULL_VALID_SHIFT)
58
59#define PAD_MUXSEL_0 0
60#define PAD_MUXSEL_1 1
61#define PAD_MUXSEL_2 2
62#define PAD_MUXSEL_GPIO 3
63
64#define PAD_4MA 0
65#define PAD_8MA 1
66#define PAD_12MA 2
67#define PAD_16MA 3
68
69#define PAD_1V8 0
70#define PAD_3V3 1
71
72#define PAD_NOPULL 0
73#define PAD_PULLUP 1
74
75#define MXS_PAD_4MA ((PAD_4MA << MXS_PAD_MA_SHIFT) | \
76 MXS_PAD_MA_VALID_MASK)
77#define MXS_PAD_8MA ((PAD_8MA << MXS_PAD_MA_SHIFT) | \
78 MXS_PAD_MA_VALID_MASK)
79#define MXS_PAD_12MA ((PAD_12MA << MXS_PAD_MA_SHIFT) | \
80 MXS_PAD_MA_VALID_MASK)
81#define MXS_PAD_16MA ((PAD_16MA << MXS_PAD_MA_SHIFT) | \
82 MXS_PAD_MA_VALID_MASK)
83
84#define MXS_PAD_1V8 ((PAD_1V8 << MXS_PAD_VOL_SHIFT) | \
85 MXS_PAD_VOL_VALID_MASK)
86#define MXS_PAD_3V3 ((PAD_3V3 << MXS_PAD_VOL_SHIFT) | \
87 MXS_PAD_VOL_VALID_MASK)
88
89#define MXS_PAD_NOPULL ((PAD_NOPULL << MXS_PAD_PULL_SHIFT) | \
90 MXS_PAD_PULL_VALID_MASK)
91#define MXS_PAD_PULLUP ((PAD_PULLUP << MXS_PAD_PULL_SHIFT) | \
92 MXS_PAD_PULL_VALID_MASK)
93
94/* generic pad control used in most cases */
95#define MXS_PAD_CTRL (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL)
96
97#define MXS_IOMUX_PAD(_bank, _pin, _muxsel, _ma, _vol, _pull) \
98 (((iomux_cfg_t)(_bank) << MXS_PAD_BANK_SHIFT) | \
99 ((iomux_cfg_t)(_pin) << MXS_PAD_PIN_SHIFT) | \
100 ((iomux_cfg_t)(_muxsel) << MXS_PAD_MUXSEL_SHIFT) | \
101 ((iomux_cfg_t)(_ma) << MXS_PAD_MA_SHIFT) | \
102 ((iomux_cfg_t)(_vol) << MXS_PAD_VOL_SHIFT) | \
103 ((iomux_cfg_t)(_pull) << MXS_PAD_PULL_SHIFT))
104
105/*
106 * A pad becomes naked, when none of mA, vol or pull
107 * validity bits is set.
108 */
109#define MXS_IOMUX_PAD_NAKED(_bank, _pin, _muxsel) \
110 MXS_IOMUX_PAD(_bank, _pin, _muxsel, 0, 0, 0)
111
112static inline unsigned int PAD_BANK(iomux_cfg_t pad)
113{
114 return (pad & MXS_PAD_BANK_MASK) >> MXS_PAD_BANK_SHIFT;
115}
116
117static inline unsigned int PAD_PIN(iomux_cfg_t pad)
118{
119 return (pad & MXS_PAD_PIN_MASK) >> MXS_PAD_PIN_SHIFT;
120}
121
122static inline unsigned int PAD_MUXSEL(iomux_cfg_t pad)
123{
124 return (pad & MXS_PAD_MUXSEL_MASK) >> MXS_PAD_MUXSEL_SHIFT;
125}
126
127static inline unsigned int PAD_MA(iomux_cfg_t pad)
128{
129 return (pad & MXS_PAD_MA_MASK) >> MXS_PAD_MA_SHIFT;
130}
131
132static inline unsigned int PAD_MA_VALID(iomux_cfg_t pad)
133{
134 return (pad & MXS_PAD_MA_VALID_MASK) >> MXS_PAD_MA_VALID_SHIFT;
135}
136
137static inline unsigned int PAD_VOL(iomux_cfg_t pad)
138{
139 return (pad & MXS_PAD_VOL_MASK) >> MXS_PAD_VOL_SHIFT;
140}
141
142static inline unsigned int PAD_VOL_VALID(iomux_cfg_t pad)
143{
144 return (pad & MXS_PAD_VOL_VALID_MASK) >> MXS_PAD_VOL_VALID_SHIFT;
145}
146
147static inline unsigned int PAD_PULL(iomux_cfg_t pad)
148{
149 return (pad & MXS_PAD_PULL_MASK) >> MXS_PAD_PULL_SHIFT;
150}
151
152static inline unsigned int PAD_PULL_VALID(iomux_cfg_t pad)
153{
154 return (pad & MXS_PAD_PULL_VALID_MASK) >> MXS_PAD_PULL_VALID_SHIFT;
155}
156
157/*
158 * configures a single pad in the iomuxer
159 */
160int mxs_iomux_setup_pad(iomux_cfg_t pad);
161
162/*
163 * configures multiple pads
164 * convenient way to call the above function with tables
165 */
166int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count);
167
168#endif /* __MACH_MXS_IOMUX_H__*/
diff --git a/arch/arm/mach-mxs/iomux.c b/arch/arm/mach-mxs/iomux.c
deleted file mode 100644
index 0e804e2f11f4..000000000000
--- a/arch/arm/mach-mxs/iomux.c
+++ /dev/null
@@ -1,101 +0,0 @@
1/*
2 * Copyright 2004-2006,2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
4 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
5 * <armlinux@phytec.de>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21
22#include <linux/errno.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/string.h>
27#include <linux/gpio.h>
28
29#include <asm/mach/map.h>
30
31#include <mach/mxs.h>
32#include <mach/iomux.h>
33
34/*
35 * configures a single pad in the iomuxer
36 */
37int mxs_iomux_setup_pad(iomux_cfg_t pad)
38{
39 u32 reg, ofs, bp, bm;
40 void __iomem *iomux_base = MXS_IO_ADDRESS(MXS_PINCTRL_BASE_ADDR);
41
42 /* muxsel */
43 ofs = 0x100;
44 ofs += PAD_BANK(pad) * 0x20 + PAD_PIN(pad) / 16 * 0x10;
45 bp = PAD_PIN(pad) % 16 * 2;
46 bm = 0x3 << bp;
47 reg = __raw_readl(iomux_base + ofs);
48 reg &= ~bm;
49 reg |= PAD_MUXSEL(pad) << bp;
50 __raw_writel(reg, iomux_base + ofs);
51
52 /* drive */
53 ofs = cpu_is_mx23() ? 0x200 : 0x300;
54 ofs += PAD_BANK(pad) * 0x40 + PAD_PIN(pad) / 8 * 0x10;
55 /* mA */
56 if (PAD_MA_VALID(pad)) {
57 bp = PAD_PIN(pad) % 8 * 4;
58 bm = 0x3 << bp;
59 reg = __raw_readl(iomux_base + ofs);
60 reg &= ~bm;
61 reg |= PAD_MA(pad) << bp;
62 __raw_writel(reg, iomux_base + ofs);
63 }
64 /* vol */
65 if (PAD_VOL_VALID(pad)) {
66 bp = PAD_PIN(pad) % 8 * 4 + 2;
67 if (PAD_VOL(pad))
68 __mxs_setl(1 << bp, iomux_base + ofs);
69 else
70 __mxs_clrl(1 << bp, iomux_base + ofs);
71 }
72
73 /* pull */
74 if (PAD_PULL_VALID(pad)) {
75 ofs = cpu_is_mx23() ? 0x400 : 0x600;
76 ofs += PAD_BANK(pad) * 0x10;
77 bp = PAD_PIN(pad);
78 if (PAD_PULL(pad))
79 __mxs_setl(1 << bp, iomux_base + ofs);
80 else
81 __mxs_clrl(1 << bp, iomux_base + ofs);
82 }
83
84 return 0;
85}
86
87int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned count)
88{
89 const iomux_cfg_t *p = pad_list;
90 int i;
91 int ret;
92
93 for (i = 0; i < count; i++) {
94 ret = mxs_iomux_setup_pad(*p);
95 if (ret)
96 return ret;
97 p++;
98 }
99
100 return 0;
101}
diff --git a/arch/arm/mach-mxs/mach-apx4devkit.c b/arch/arm/mach-mxs/mach-apx4devkit.c
deleted file mode 100644
index f5f061757deb..000000000000
--- a/arch/arm/mach-mxs/mach-apx4devkit.c
+++ /dev/null
@@ -1,273 +0,0 @@
1/*
2 * Copyright (C) 2011-2012
3 * Lauri Hintsala, Bluegiga, <lauri.hintsala@bluegiga.com>
4 * Veli-Pekka Peltola, Bluegiga, <veli-pekka.peltola@bluegiga.com>
5 *
6 * based on: mach-mx28evk.c
7 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20#include <linux/delay.h>
21#include <linux/platform_device.h>
22#include <linux/gpio.h>
23#include <linux/leds.h>
24#include <linux/clk.h>
25#include <linux/i2c.h>
26#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h>
28#include <linux/micrel_phy.h>
29
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32#include <asm/mach/time.h>
33
34#include <mach/common.h>
35#include <mach/digctl.h>
36#include <mach/iomux-mx28.h>
37
38#include "devices-mx28.h"
39
40#define APX4DEVKIT_GPIO_USERLED MXS_GPIO_NR(3, 28)
41
42static const iomux_cfg_t apx4devkit_pads[] __initconst = {
43 /* duart */
44 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
45 MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
46
47 /* auart0 */
48 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
49 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
50 MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
51 MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
52
53 /* auart1 */
54 MX28_PAD_AUART1_RX__AUART1_RX | MXS_PAD_CTRL,
55 MX28_PAD_AUART1_TX__AUART1_TX | MXS_PAD_CTRL,
56
57 /* auart2 */
58 MX28_PAD_SSP2_SCK__AUART2_RX | MXS_PAD_CTRL,
59 MX28_PAD_SSP2_MOSI__AUART2_TX | MXS_PAD_CTRL,
60
61 /* auart3 */
62 MX28_PAD_SSP2_MISO__AUART3_RX | MXS_PAD_CTRL,
63 MX28_PAD_SSP2_SS0__AUART3_TX | MXS_PAD_CTRL,
64
65#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
66 /* fec0 */
67 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
68 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
69 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
70 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
71 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
72 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
73 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
74 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
75 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
76
77 /* i2c */
78 MX28_PAD_I2C0_SCL__I2C0_SCL,
79 MX28_PAD_I2C0_SDA__I2C0_SDA,
80
81 /* mmc0 */
82 MX28_PAD_SSP0_DATA0__SSP0_D0 |
83 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
84 MX28_PAD_SSP0_DATA1__SSP0_D1 |
85 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
86 MX28_PAD_SSP0_DATA2__SSP0_D2 |
87 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
88 MX28_PAD_SSP0_DATA3__SSP0_D3 |
89 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
90 MX28_PAD_SSP0_DATA4__SSP0_D4 |
91 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
92 MX28_PAD_SSP0_DATA5__SSP0_D5 |
93 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
94 MX28_PAD_SSP0_DATA6__SSP0_D6 |
95 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
96 MX28_PAD_SSP0_DATA7__SSP0_D7 |
97 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
98 MX28_PAD_SSP0_CMD__SSP0_CMD |
99 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
100 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
101 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
102 MX28_PAD_SSP0_SCK__SSP0_SCK |
103 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
104
105 /* led */
106 MX28_PAD_PWM3__GPIO_3_28 | MXS_PAD_CTRL,
107
108 /* saif0 & saif1 */
109 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK |
110 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
111 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK |
112 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
113 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK |
114 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
115 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 |
116 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
117 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 |
118 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
119};
120
121/* led */
122static const struct gpio_led apx4devkit_leds[] __initconst = {
123 {
124 .name = "user-led",
125 .default_trigger = "heartbeat",
126 .gpio = APX4DEVKIT_GPIO_USERLED,
127 },
128};
129
130static const struct gpio_led_platform_data apx4devkit_led_data __initconst = {
131 .leds = apx4devkit_leds,
132 .num_leds = ARRAY_SIZE(apx4devkit_leds),
133};
134
135static const struct fec_platform_data mx28_fec_pdata __initconst = {
136 .phy = PHY_INTERFACE_MODE_RMII,
137};
138
139static const struct mxs_mmc_platform_data apx4devkit_mmc_pdata __initconst = {
140 .wp_gpio = -EINVAL,
141 .flags = SLOTF_4_BIT_CAPABLE,
142};
143
144static const struct i2c_board_info apx4devkit_i2c_boardinfo[] __initconst = {
145 { I2C_BOARD_INFO("sgtl5000", 0x0a) }, /* ASoC */
146 { I2C_BOARD_INFO("pcf8563", 0x51) }, /* RTC */
147};
148
149#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || \
150 defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
151static struct regulator_consumer_supply apx4devkit_audio_consumer_supplies[] = {
152 REGULATOR_SUPPLY("VDDA", "0-000a"),
153 REGULATOR_SUPPLY("VDDIO", "0-000a"),
154};
155
156static struct regulator_init_data apx4devkit_vdd_reg_init_data = {
157 .constraints = {
158 .name = "3V3",
159 .always_on = 1,
160 },
161 .consumer_supplies = apx4devkit_audio_consumer_supplies,
162 .num_consumer_supplies = ARRAY_SIZE(apx4devkit_audio_consumer_supplies),
163};
164
165static struct fixed_voltage_config apx4devkit_vdd_pdata = {
166 .supply_name = "board-3V3",
167 .microvolts = 3300000,
168 .gpio = -EINVAL,
169 .enabled_at_boot = 1,
170 .init_data = &apx4devkit_vdd_reg_init_data,
171};
172
173static struct platform_device apx4devkit_voltage_regulator = {
174 .name = "reg-fixed-voltage",
175 .id = -1,
176 .num_resources = 0,
177 .dev = {
178 .platform_data = &apx4devkit_vdd_pdata,
179 },
180};
181
182static void __init apx4devkit_add_regulators(void)
183{
184 platform_device_register(&apx4devkit_voltage_regulator);
185}
186#else
187static void __init apx4devkit_add_regulators(void) {}
188#endif
189
190static const struct mxs_saif_platform_data
191 apx4devkit_mxs_saif_pdata[] __initconst = {
192 /* working on EXTMSTR0 mode (saif0 master, saif1 slave) */
193 {
194 .master_mode = 1,
195 .master_id = 0,
196 }, {
197 .master_mode = 0,
198 .master_id = 0,
199 },
200};
201
202static int apx4devkit_phy_fixup(struct phy_device *phy)
203{
204 phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
205 return 0;
206}
207
208static void __init apx4devkit_fec_phy_clk_enable(void)
209{
210 struct clk *clk;
211
212 /* Enable fec phy clock */
213 clk = clk_get_sys("enet_out", NULL);
214 if (!IS_ERR(clk))
215 clk_prepare_enable(clk);
216}
217
218static void __init apx4devkit_init(void)
219{
220 mx28_soc_init();
221
222 mxs_iomux_setup_multiple_pads(apx4devkit_pads,
223 ARRAY_SIZE(apx4devkit_pads));
224
225 mx28_add_duart();
226 mx28_add_auart0();
227 mx28_add_auart1();
228 mx28_add_auart2();
229 mx28_add_auart3();
230
231 /*
232 * Register fixup for the Micrel KS8031 PHY clock
233 * (shares same ID with KS8051)
234 */
235 phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
236 apx4devkit_phy_fixup);
237
238 apx4devkit_fec_phy_clk_enable();
239 mx28_add_fec(0, &mx28_fec_pdata);
240
241 mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata);
242
243 gpio_led_register_device(0, &apx4devkit_led_data);
244
245 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
246 mx28_add_saif(0, &apx4devkit_mxs_saif_pdata[0]);
247 mx28_add_saif(1, &apx4devkit_mxs_saif_pdata[1]);
248
249 apx4devkit_add_regulators();
250
251 mx28_add_mxs_i2c(0);
252 i2c_register_board_info(0, apx4devkit_i2c_boardinfo,
253 ARRAY_SIZE(apx4devkit_i2c_boardinfo));
254
255 mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0, NULL, 0);
256}
257
258static void __init apx4devkit_timer_init(void)
259{
260 mx28_clocks_init();
261}
262
263static struct sys_timer apx4devkit_timer = {
264 .init = apx4devkit_timer_init,
265};
266
267MACHINE_START(APX4DEVKIT, "Bluegiga APX4 Development Kit")
268 .map_io = mx28_map_io,
269 .init_irq = mx28_init_irq,
270 .timer = &apx4devkit_timer,
271 .init_machine = apx4devkit_init,
272 .restart = mxs_restart,
273MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
deleted file mode 100644
index 4c00c879b893..000000000000
--- a/arch/arm/mach-mxs/mach-m28evk.c
+++ /dev/null
@@ -1,366 +0,0 @@
1/*
2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
4 *
5 * based on: mach-mx28_evk.c
6 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/delay.h>
20#include <linux/platform_device.h>
21#include <linux/gpio.h>
22#include <linux/leds.h>
23#include <linux/irq.h>
24#include <linux/clk.h>
25#include <linux/i2c.h>
26#include <linux/i2c/at24.h>
27
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/time.h>
31
32#include <mach/common.h>
33#include <mach/iomux-mx28.h>
34
35#include "devices-mx28.h"
36
37#define M28EVK_GPIO_USERLED1 MXS_GPIO_NR(3, 16)
38#define M28EVK_GPIO_USERLED2 MXS_GPIO_NR(3, 17)
39
40#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
41#define M28EVK_LCD_ENABLE MXS_GPIO_NR(3, 28)
42
43#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
44#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
45
46static const iomux_cfg_t m28evk_pads[] __initconst = {
47 /* duart */
48 MX28_PAD_AUART0_CTS__DUART_RX | MXS_PAD_CTRL,
49 MX28_PAD_AUART0_RTS__DUART_TX | MXS_PAD_CTRL,
50
51 /* auart0 */
52 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
53 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
54
55 /* auart3 */
56 MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
57 MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
58 MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
59 MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
60
61#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
62 /* fec0 */
63 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
64 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
65 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
66 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
67 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
68 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
69 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
70 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
71 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
72 /* fec1 */
73 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
74 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
75 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
76 MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
77 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
78 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
79
80 /* flexcan0 */
81 MX28_PAD_GPMI_RDY2__CAN0_TX,
82 MX28_PAD_GPMI_RDY3__CAN0_RX,
83
84 /* flexcan1 */
85 MX28_PAD_GPMI_CE2N__CAN1_TX,
86 MX28_PAD_GPMI_CE3N__CAN1_RX,
87
88 /* I2C */
89 MX28_PAD_I2C0_SCL__I2C0_SCL,
90 MX28_PAD_I2C0_SDA__I2C0_SDA,
91
92 /* mxsfb (lcdif) */
93 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
94 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
95 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
96 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
97 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
98 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
99 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
100 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
101 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
102 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
103 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
104 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
105 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
106 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
107 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
108 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
109 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
110 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
111 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
112 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
113 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
114 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
115 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
116 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
117
118 MX28_PAD_LCD_ENABLE__LCD_ENABLE | MXS_PAD_CTRL,
119 MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MXS_PAD_CTRL,
120
121 /* mmc0 */
122 MX28_PAD_SSP0_DATA0__SSP0_D0 |
123 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
124 MX28_PAD_SSP0_DATA1__SSP0_D1 |
125 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
126 MX28_PAD_SSP0_DATA2__SSP0_D2 |
127 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
128 MX28_PAD_SSP0_DATA3__SSP0_D3 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA4__SSP0_D4 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA5__SSP0_D5 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA6__SSP0_D6 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA7__SSP0_D7 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_CMD__SSP0_CMD |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
142 MX28_PAD_SSP0_SCK__SSP0_SCK |
143 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
144
145 /* mmc1 */
146 MX28_PAD_GPMI_D00__SSP1_D0 |
147 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
148 MX28_PAD_GPMI_D01__SSP1_D1 |
149 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
150 MX28_PAD_GPMI_D02__SSP1_D2 |
151 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
152 MX28_PAD_GPMI_D03__SSP1_D3 |
153 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
154 MX28_PAD_GPMI_D04__SSP1_D4 |
155 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
156 MX28_PAD_GPMI_D05__SSP1_D5 |
157 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
158 MX28_PAD_GPMI_D06__SSP1_D6 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D07__SSP1_D7 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_RDY1__SSP1_CMD |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
166 MX28_PAD_GPMI_WRN__SSP1_SCK |
167 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
168 /* write protect */
169 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
170 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
171 /* slot power enable */
172 MX28_PAD_PWM4__GPIO_3_29 |
173 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
174
175 /* led */
176 MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
177 MX28_PAD_PWM1__GPIO_3_17 | MXS_PAD_CTRL,
178
179 /* nand */
180 MX28_PAD_GPMI_D00__GPMI_D0 |
181 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
182 MX28_PAD_GPMI_D01__GPMI_D1 |
183 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
184 MX28_PAD_GPMI_D02__GPMI_D2 |
185 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
186 MX28_PAD_GPMI_D03__GPMI_D3 |
187 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
188 MX28_PAD_GPMI_D04__GPMI_D4 |
189 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
190 MX28_PAD_GPMI_D05__GPMI_D5 |
191 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
192 MX28_PAD_GPMI_D06__GPMI_D6 |
193 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
194 MX28_PAD_GPMI_D07__GPMI_D7 |
195 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
196 MX28_PAD_GPMI_CE0N__GPMI_CE0N |
197 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
198 MX28_PAD_GPMI_RDY0__GPMI_READY0 |
199 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL),
200 MX28_PAD_GPMI_RDN__GPMI_RDN |
201 (MXS_PAD_12MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
202 MX28_PAD_GPMI_WRN__GPMI_WRN |
203 (MXS_PAD_12MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
204 MX28_PAD_GPMI_ALE__GPMI_ALE |
205 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
206 MX28_PAD_GPMI_CLE__GPMI_CLE |
207 (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
208 MX28_PAD_GPMI_RESETN__GPMI_RESETN |
209 (MXS_PAD_12MA | MXS_PAD_1V8 | MXS_PAD_PULLUP),
210
211 /* Backlight */
212 MX28_PAD_PWM3__GPIO_3_28 | MXS_PAD_CTRL,
213};
214
215/* led */
216static const struct gpio_led m28evk_leds[] __initconst = {
217 {
218 .name = "user-led1",
219 .default_trigger = "heartbeat",
220 .gpio = M28EVK_GPIO_USERLED1,
221 },
222 {
223 .name = "user-led2",
224 .default_trigger = "heartbeat",
225 .gpio = M28EVK_GPIO_USERLED2,
226 },
227};
228
229static const struct gpio_led_platform_data m28evk_led_data __initconst = {
230 .leds = m28evk_leds,
231 .num_leds = ARRAY_SIZE(m28evk_leds),
232};
233
234static struct fec_platform_data mx28_fec_pdata[] __initdata = {
235 {
236 /* fec0 */
237 .phy = PHY_INTERFACE_MODE_RMII,
238 }, {
239 /* fec1 */
240 .phy = PHY_INTERFACE_MODE_RMII,
241 },
242};
243
244static int __init m28evk_fec_get_mac(void)
245{
246 int i;
247 u32 val;
248 const u32 *ocotp = mxs_get_ocotp();
249
250 if (!ocotp)
251 return -ETIMEDOUT;
252
253 /*
254 * OCOTP only stores the last 4 octets for each mac address,
255 * so hard-code DENX OUI (C0:E5:4E) here.
256 */
257 for (i = 0; i < 2; i++) {
258 val = ocotp[i];
259 mx28_fec_pdata[i].mac[0] = 0xC0;
260 mx28_fec_pdata[i].mac[1] = 0xE5;
261 mx28_fec_pdata[i].mac[2] = 0x4E;
262 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
263 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
264 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
265 }
266
267 return 0;
268}
269
270/* mxsfb (lcdif) */
271static struct fb_videomode m28evk_video_modes[] = {
272 {
273 .name = "Ampire AM-800480R2TMQW-T01H",
274 .refresh = 60,
275 .xres = 800,
276 .yres = 480,
277 .pixclock = 30066, /* picosecond (33.26 MHz) */
278 .left_margin = 0,
279 .right_margin = 256,
280 .upper_margin = 0,
281 .lower_margin = 45,
282 .hsync_len = 1,
283 .vsync_len = 1,
284 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
285 },
286};
287
288static const struct mxsfb_platform_data m28evk_mxsfb_pdata __initconst = {
289 .mode_list = m28evk_video_modes,
290 .mode_count = ARRAY_SIZE(m28evk_video_modes),
291 .default_bpp = 16,
292 .ld_intf_width = STMLCDIF_18BIT,
293};
294
295static struct at24_platform_data m28evk_eeprom = {
296 .byte_len = 16384,
297 .page_size = 32,
298 .flags = AT24_FLAG_ADDR16,
299};
300
301static struct i2c_board_info m28_stk5v3_i2c_boardinfo[] __initdata = {
302 {
303 I2C_BOARD_INFO("at24", 0x51), /* E0=1, E1=0, E2=0 */
304 .platform_data = &m28evk_eeprom,
305 },
306};
307
308static struct mxs_mmc_platform_data m28evk_mmc_pdata[] __initdata = {
309 {
310 /* mmc0 */
311 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
312 .flags = SLOTF_8_BIT_CAPABLE,
313 }, {
314 /* mmc1 */
315 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
316 .flags = SLOTF_8_BIT_CAPABLE,
317 },
318};
319
320static void __init m28evk_init(void)
321{
322 mx28_soc_init();
323
324 mxs_iomux_setup_multiple_pads(m28evk_pads, ARRAY_SIZE(m28evk_pads));
325
326 mx28_add_duart();
327 mx28_add_auart0();
328 mx28_add_auart3();
329
330 if (!m28evk_fec_get_mac()) {
331 mx28_add_fec(0, &mx28_fec_pdata[0]);
332 mx28_add_fec(1, &mx28_fec_pdata[1]);
333 }
334
335 mx28_add_flexcan(0, NULL);
336 mx28_add_flexcan(1, NULL);
337
338 mx28_add_mxsfb(&m28evk_mxsfb_pdata);
339
340 mx28_add_mxs_mmc(0, &m28evk_mmc_pdata[0]);
341 mx28_add_mxs_mmc(1, &m28evk_mmc_pdata[1]);
342
343 gpio_led_register_device(0, &m28evk_led_data);
344
345 /* I2C */
346 mx28_add_mxs_i2c(0);
347 i2c_register_board_info(0, m28_stk5v3_i2c_boardinfo,
348 ARRAY_SIZE(m28_stk5v3_i2c_boardinfo));
349}
350
351static void __init m28evk_timer_init(void)
352{
353 mx28_clocks_init();
354}
355
356static struct sys_timer m28evk_timer = {
357 .init = m28evk_timer_init,
358};
359
360MACHINE_START(M28EVK, "DENX M28 EVK")
361 .map_io = mx28_map_io,
362 .init_irq = mx28_init_irq,
363 .timer = &m28evk_timer,
364 .init_machine = m28evk_init,
365 .restart = mxs_restart,
366MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c
deleted file mode 100644
index e7272a41939d..000000000000
--- a/arch/arm/mach-mxs/mach-mx23evk.c
+++ /dev/null
@@ -1,190 +0,0 @@
1/*
2 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
18
19#include <asm/mach-types.h>
20#include <asm/mach/arch.h>
21#include <asm/mach/time.h>
22
23#include <mach/common.h>
24#include <mach/iomux-mx23.h>
25
26#include "devices-mx23.h"
27
28#define MX23EVK_LCD_ENABLE MXS_GPIO_NR(1, 18)
29#define MX23EVK_BL_ENABLE MXS_GPIO_NR(1, 28)
30#define MX23EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(1, 30)
31#define MX23EVK_MMC0_SLOT_POWER MXS_GPIO_NR(1, 29)
32
33static const iomux_cfg_t mx23evk_pads[] __initconst = {
34 /* duart */
35 MX23_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
36 MX23_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
37
38 /* auart */
39 MX23_PAD_AUART1_RX__AUART1_RX | MXS_PAD_CTRL,
40 MX23_PAD_AUART1_TX__AUART1_TX | MXS_PAD_CTRL,
41 MX23_PAD_AUART1_CTS__AUART1_CTS | MXS_PAD_CTRL,
42 MX23_PAD_AUART1_RTS__AUART1_RTS | MXS_PAD_CTRL,
43
44 /* mxsfb (lcdif) */
45 MX23_PAD_LCD_D00__LCD_D00 | MXS_PAD_CTRL,
46 MX23_PAD_LCD_D01__LCD_D01 | MXS_PAD_CTRL,
47 MX23_PAD_LCD_D02__LCD_D02 | MXS_PAD_CTRL,
48 MX23_PAD_LCD_D03__LCD_D03 | MXS_PAD_CTRL,
49 MX23_PAD_LCD_D04__LCD_D04 | MXS_PAD_CTRL,
50 MX23_PAD_LCD_D05__LCD_D05 | MXS_PAD_CTRL,
51 MX23_PAD_LCD_D06__LCD_D06 | MXS_PAD_CTRL,
52 MX23_PAD_LCD_D07__LCD_D07 | MXS_PAD_CTRL,
53 MX23_PAD_LCD_D08__LCD_D08 | MXS_PAD_CTRL,
54 MX23_PAD_LCD_D09__LCD_D09 | MXS_PAD_CTRL,
55 MX23_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
56 MX23_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
57 MX23_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
58 MX23_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
59 MX23_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
60 MX23_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
61 MX23_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
62 MX23_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
63 MX23_PAD_GPMI_D08__LCD_D18 | MXS_PAD_CTRL,
64 MX23_PAD_GPMI_D09__LCD_D19 | MXS_PAD_CTRL,
65 MX23_PAD_GPMI_D10__LCD_D20 | MXS_PAD_CTRL,
66 MX23_PAD_GPMI_D11__LCD_D21 | MXS_PAD_CTRL,
67 MX23_PAD_GPMI_D12__LCD_D22 | MXS_PAD_CTRL,
68 MX23_PAD_GPMI_D13__LCD_D23 | MXS_PAD_CTRL,
69 MX23_PAD_LCD_VSYNC__LCD_VSYNC | MXS_PAD_CTRL,
70 MX23_PAD_LCD_HSYNC__LCD_HSYNC | MXS_PAD_CTRL,
71 MX23_PAD_LCD_DOTCK__LCD_DOTCK | MXS_PAD_CTRL,
72 MX23_PAD_LCD_ENABLE__LCD_ENABLE | MXS_PAD_CTRL,
73 /* LCD panel enable */
74 MX23_PAD_LCD_RESET__GPIO_1_18 | MXS_PAD_CTRL,
75 /* backlight control */
76 MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_CTRL,
77
78 /* mmc */
79 MX23_PAD_SSP1_DATA0__SSP1_DATA0 |
80 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
81 MX23_PAD_SSP1_DATA1__SSP1_DATA1 |
82 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
83 MX23_PAD_SSP1_DATA2__SSP1_DATA2 |
84 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
85 MX23_PAD_SSP1_DATA3__SSP1_DATA3 |
86 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
87 MX23_PAD_GPMI_D08__SSP1_DATA4 |
88 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
89 MX23_PAD_GPMI_D09__SSP1_DATA5 |
90 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
91 MX23_PAD_GPMI_D10__SSP1_DATA6 |
92 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
93 MX23_PAD_GPMI_D11__SSP1_DATA7 |
94 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
95 MX23_PAD_SSP1_CMD__SSP1_CMD |
96 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
97 MX23_PAD_SSP1_DETECT__SSP1_DETECT |
98 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
99 MX23_PAD_SSP1_SCK__SSP1_SCK |
100 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
101 /* write protect */
102 MX23_PAD_PWM4__GPIO_1_30 |
103 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
104 /* slot power enable */
105 MX23_PAD_PWM3__GPIO_1_29 |
106 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
107};
108
109/* mxsfb (lcdif) */
110static struct fb_videomode mx23evk_video_modes[] = {
111 {
112 .name = "Samsung-LMS430HF02",
113 .refresh = 60,
114 .xres = 480,
115 .yres = 272,
116 .pixclock = 108096, /* picosecond (9.2 MHz) */
117 .left_margin = 15,
118 .right_margin = 8,
119 .upper_margin = 12,
120 .lower_margin = 4,
121 .hsync_len = 1,
122 .vsync_len = 1,
123 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
124 FB_SYNC_DOTCLK_FAILING_ACT,
125 },
126};
127
128static const struct mxsfb_platform_data mx23evk_mxsfb_pdata __initconst = {
129 .mode_list = mx23evk_video_modes,
130 .mode_count = ARRAY_SIZE(mx23evk_video_modes),
131 .default_bpp = 32,
132 .ld_intf_width = STMLCDIF_24BIT,
133};
134
135static struct mxs_mmc_platform_data mx23evk_mmc_pdata __initdata = {
136 .wp_gpio = MX23EVK_MMC0_WRITE_PROTECT,
137 .flags = SLOTF_8_BIT_CAPABLE,
138};
139
140static void __init mx23evk_init(void)
141{
142 int ret;
143
144 mx23_soc_init();
145
146 mxs_iomux_setup_multiple_pads(mx23evk_pads, ARRAY_SIZE(mx23evk_pads));
147
148 mx23_add_duart();
149 mx23_add_auart0();
150
151 /* power on mmc slot by writing 0 to the gpio */
152 ret = gpio_request_one(MX23EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
153 "mmc0-slot-power");
154 if (ret)
155 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
156 mx23_add_mxs_mmc(0, &mx23evk_mmc_pdata);
157
158 ret = gpio_request_one(MX23EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
159 if (ret)
160 pr_warn("failed to request gpio lcd-enable: %d\n", ret);
161 else
162 gpio_set_value(MX23EVK_LCD_ENABLE, 1);
163
164 ret = gpio_request_one(MX23EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable");
165 if (ret)
166 pr_warn("failed to request gpio bl-enable: %d\n", ret);
167 else
168 gpio_set_value(MX23EVK_BL_ENABLE, 1);
169
170 mx23_add_mxsfb(&mx23evk_mxsfb_pdata);
171 mx23_add_rtc_stmp3xxx();
172}
173
174static void __init mx23evk_timer_init(void)
175{
176 mx23_clocks_init();
177}
178
179static struct sys_timer mx23evk_timer = {
180 .init = mx23evk_timer_init,
181};
182
183MACHINE_START(MX23EVK, "Freescale MX23 EVK")
184 /* Maintainer: Freescale Semiconductor, Inc. */
185 .map_io = mx23_map_io,
186 .init_irq = mx23_init_irq,
187 .timer = &mx23evk_timer,
188 .init_machine = mx23evk_init,
189 .restart = mxs_restart,
190MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
deleted file mode 100644
index dafd48e86c8c..000000000000
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ /dev/null
@@ -1,477 +0,0 @@
1/*
2 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
18#include <linux/leds.h>
19#include <linux/clk.h>
20#include <linux/i2c.h>
21#include <linux/regulator/machine.h>
22#include <linux/regulator/fixed.h>
23
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include <asm/mach/time.h>
27
28#include <mach/common.h>
29#include <mach/iomux-mx28.h>
30#include <mach/digctl.h>
31
32#include "devices-mx28.h"
33
34#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
35#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
36#define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5)
37#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
38#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
39#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
40
41#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
42#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
43#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
44#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
45
46static const iomux_cfg_t mx28evk_pads[] __initconst = {
47 /* duart */
48 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
49 MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
50
51 /* auart0 */
52 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
53 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
54 MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
55 MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
56 /* auart3 */
57 MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
58 MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
59 MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
60 MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
61
62#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
63 /* fec0 */
64 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
65 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
66 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
67 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
68 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
69 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
70 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
71 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
72 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
73 /* fec1 */
74 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
75 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
76 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
77 MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
78 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
79 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
80 /* phy power line */
81 MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,
82 /* phy reset line */
83 MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,
84
85 /* flexcan0 */
86 MX28_PAD_GPMI_RDY2__CAN0_TX,
87 MX28_PAD_GPMI_RDY3__CAN0_RX,
88 /* flexcan1 */
89 MX28_PAD_GPMI_CE2N__CAN1_TX,
90 MX28_PAD_GPMI_CE3N__CAN1_RX,
91 /* transceiver power control */
92 MX28_PAD_SSP1_CMD__GPIO_2_13,
93
94 /* mxsfb (lcdif) */
95 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
96 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
97 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
98 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
99 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
100 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
101 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
102 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
103 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
104 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
105 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
106 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
107 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
108 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
109 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
110 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
111 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
112 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
113 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
114 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
115 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
116 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
117 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
118 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
119 MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
120 MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
121 MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
122 MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL,
123 /* LCD panel enable */
124 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
125 /* backlight control */
126 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
127 /* mmc0 */
128 MX28_PAD_SSP0_DATA0__SSP0_D0 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA1__SSP0_D1 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA2__SSP0_D2 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA3__SSP0_D3 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA4__SSP0_D4 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_DATA5__SSP0_D5 |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_DATA6__SSP0_D6 |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
142 MX28_PAD_SSP0_DATA7__SSP0_D7 |
143 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
144 MX28_PAD_SSP0_CMD__SSP0_CMD |
145 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
146 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
147 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
148 MX28_PAD_SSP0_SCK__SSP0_SCK |
149 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
150 /* write protect */
151 MX28_PAD_SSP1_SCK__GPIO_2_12 |
152 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
153 /* slot power enable */
154 MX28_PAD_PWM3__GPIO_3_28 |
155 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
156
157 /* mmc1 */
158 MX28_PAD_GPMI_D00__SSP1_D0 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D01__SSP1_D1 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_D02__SSP1_D2 |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_D03__SSP1_D3 |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
166 MX28_PAD_GPMI_D04__SSP1_D4 |
167 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
168 MX28_PAD_GPMI_D05__SSP1_D5 |
169 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
170 MX28_PAD_GPMI_D06__SSP1_D6 |
171 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
172 MX28_PAD_GPMI_D07__SSP1_D7 |
173 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
174 MX28_PAD_GPMI_RDY1__SSP1_CMD |
175 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
176 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
177 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
178 MX28_PAD_GPMI_WRN__SSP1_SCK |
179 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
180 /* write protect */
181 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
182 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
183 /* slot power enable */
184 MX28_PAD_PWM4__GPIO_3_29 |
185 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
186
187 /* led */
188 MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL,
189
190 /* I2C */
191 MX28_PAD_I2C0_SCL__I2C0_SCL |
192 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
193 MX28_PAD_I2C0_SDA__I2C0_SDA |
194 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
195
196 /* saif0 & saif1 */
197 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK |
198 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
199 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK |
200 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
201 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK |
202 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
203 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 |
204 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
205 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 |
206 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
207};
208
209/* led */
210static const struct gpio_led mx28evk_leds[] __initconst = {
211 {
212 .name = "GPIO-LED",
213 .default_trigger = "heartbeat",
214 .gpio = MX28EVK_GPIO_LED,
215 },
216};
217
218static const struct gpio_led_platform_data mx28evk_led_data __initconst = {
219 .leds = mx28evk_leds,
220 .num_leds = ARRAY_SIZE(mx28evk_leds),
221};
222
223/* fec */
224static void __init mx28evk_fec_reset(void)
225{
226 struct clk *clk;
227
228 /* Enable fec phy clock */
229 clk = clk_get_sys("enet_out", NULL);
230 if (!IS_ERR(clk))
231 clk_prepare_enable(clk);
232
233 gpio_set_value(MX28EVK_FEC_PHY_RESET, 0);
234 mdelay(1);
235 gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
236}
237
238static struct fec_platform_data mx28_fec_pdata[] __initdata = {
239 {
240 /* fec0 */
241 .phy = PHY_INTERFACE_MODE_RMII,
242 }, {
243 /* fec1 */
244 .phy = PHY_INTERFACE_MODE_RMII,
245 },
246};
247
248static int __init mx28evk_fec_get_mac(void)
249{
250 int i;
251 u32 val;
252 const u32 *ocotp = mxs_get_ocotp();
253
254 if (!ocotp)
255 return -ETIMEDOUT;
256
257 /*
258 * OCOTP only stores the last 4 octets for each mac address,
259 * so hard-code Freescale OUI (00:04:9f) here.
260 */
261 for (i = 0; i < 2; i++) {
262 val = ocotp[i];
263 mx28_fec_pdata[i].mac[0] = 0x00;
264 mx28_fec_pdata[i].mac[1] = 0x04;
265 mx28_fec_pdata[i].mac[2] = 0x9f;
266 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
267 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
268 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
269 }
270
271 return 0;
272}
273
274/*
275 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
276 */
277static int flexcan0_en, flexcan1_en;
278
279static void mx28evk_flexcan_switch(void)
280{
281 if (flexcan0_en || flexcan1_en)
282 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
283 else
284 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
285}
286
287static void mx28evk_flexcan0_switch(int enable)
288{
289 flexcan0_en = enable;
290 mx28evk_flexcan_switch();
291}
292
293static void mx28evk_flexcan1_switch(int enable)
294{
295 flexcan1_en = enable;
296 mx28evk_flexcan_switch();
297}
298
299static const struct flexcan_platform_data
300 mx28evk_flexcan_pdata[] __initconst = {
301 {
302 .transceiver_switch = mx28evk_flexcan0_switch,
303 }, {
304 .transceiver_switch = mx28evk_flexcan1_switch,
305 }
306};
307
308/* mxsfb (lcdif) */
309static struct fb_videomode mx28evk_video_modes[] = {
310 {
311 .name = "Seiko-43WVF1G",
312 .refresh = 60,
313 .xres = 800,
314 .yres = 480,
315 .pixclock = 29851, /* picosecond (33.5 MHz) */
316 .left_margin = 89,
317 .right_margin = 164,
318 .upper_margin = 23,
319 .lower_margin = 10,
320 .hsync_len = 10,
321 .vsync_len = 10,
322 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
323 FB_SYNC_DOTCLK_FAILING_ACT,
324 },
325};
326
327static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
328 .mode_list = mx28evk_video_modes,
329 .mode_count = ARRAY_SIZE(mx28evk_video_modes),
330 .default_bpp = 32,
331 .ld_intf_width = STMLCDIF_24BIT,
332};
333
334static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
335 {
336 /* mmc0 */
337 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
338 .flags = SLOTF_8_BIT_CAPABLE,
339 }, {
340 /* mmc1 */
341 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
342 .flags = SLOTF_8_BIT_CAPABLE,
343 },
344};
345
346static struct i2c_board_info mxs_i2c0_board_info[] __initdata = {
347 {
348 I2C_BOARD_INFO("sgtl5000", 0x0a),
349 },
350};
351
352#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
353static struct regulator_consumer_supply mx28evk_audio_consumer_supplies[] = {
354 REGULATOR_SUPPLY("VDDA", "0-000a"),
355 REGULATOR_SUPPLY("VDDIO", "0-000a"),
356};
357
358static struct regulator_init_data mx28evk_vdd_reg_init_data = {
359 .constraints = {
360 .name = "3V3",
361 .always_on = 1,
362 },
363 .consumer_supplies = mx28evk_audio_consumer_supplies,
364 .num_consumer_supplies = ARRAY_SIZE(mx28evk_audio_consumer_supplies),
365};
366
367static struct fixed_voltage_config mx28evk_vdd_pdata = {
368 .supply_name = "board-3V3",
369 .microvolts = 3300000,
370 .gpio = -EINVAL,
371 .enabled_at_boot = 1,
372 .init_data = &mx28evk_vdd_reg_init_data,
373};
374static struct platform_device mx28evk_voltage_regulator = {
375 .name = "reg-fixed-voltage",
376 .id = -1,
377 .num_resources = 0,
378 .dev = {
379 .platform_data = &mx28evk_vdd_pdata,
380 },
381};
382static void __init mx28evk_add_regulators(void)
383{
384 platform_device_register(&mx28evk_voltage_regulator);
385}
386#else
387static void __init mx28evk_add_regulators(void) {}
388#endif
389
390static const struct gpio mx28evk_gpios[] __initconst = {
391 { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" },
392 { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" },
393 { MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT, "flexcan-switch" },
394 { MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW, "mmc0-slot-power" },
395 { MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, "mmc1-slot-power" },
396 { MX28EVK_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
397 { MX28EVK_FEC_PHY_RESET, GPIOF_DIR_OUT, "fec-phy-reset" },
398};
399
400static const struct mxs_saif_platform_data
401 mx28evk_mxs_saif_pdata[] __initconst = {
402 /* working on EXTMSTR0 mode (saif0 master, saif1 slave) */
403 {
404 .master_mode = 1,
405 .master_id = 0,
406 }, {
407 .master_mode = 0,
408 .master_id = 0,
409 },
410};
411
412static void __init mx28evk_init(void)
413{
414 int ret;
415
416 mx28_soc_init();
417
418 mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
419
420 mx28_add_duart();
421 mx28_add_auart0();
422 mx28_add_auart3();
423
424 if (mx28evk_fec_get_mac())
425 pr_warn("%s: failed on fec mac setup\n", __func__);
426
427 ret = gpio_request_array(mx28evk_gpios, ARRAY_SIZE(mx28evk_gpios));
428 if (ret)
429 pr_err("One or more GPIOs failed to be requested: %d\n", ret);
430
431 mx28evk_fec_reset();
432 mx28_add_fec(0, &mx28_fec_pdata[0]);
433 mx28_add_fec(1, &mx28_fec_pdata[1]);
434
435 mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]);
436 mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
437
438 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
439
440 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
441 mx28_add_saif(0, &mx28evk_mxs_saif_pdata[0]);
442 mx28_add_saif(1, &mx28evk_mxs_saif_pdata[1]);
443
444 mx28_add_mxs_i2c(0);
445 i2c_register_board_info(0, mxs_i2c0_board_info,
446 ARRAY_SIZE(mxs_i2c0_board_info));
447
448 mx28evk_add_regulators();
449
450 mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0,
451 NULL, 0);
452
453 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
454 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
455
456 mx28_add_rtc_stmp3xxx();
457
458 gpio_led_register_device(0, &mx28evk_led_data);
459}
460
461static void __init mx28evk_timer_init(void)
462{
463 mx28_clocks_init();
464}
465
466static struct sys_timer mx28evk_timer = {
467 .init = mx28evk_timer_init,
468};
469
470MACHINE_START(MX28EVK, "Freescale MX28 EVK")
471 /* Maintainer: Freescale Semiconductor, Inc. */
472 .map_io = mx28_map_io,
473 .init_irq = mx28_init_irq,
474 .timer = &mx28evk_timer,
475 .init_machine = mx28evk_init,
476 .restart = mxs_restart,
477MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index ff886e01a0b0..cf43e5effb91 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -12,8 +12,10 @@
12 12
13#include <linux/clk.h> 13#include <linux/clk.h>
14#include <linux/clkdev.h> 14#include <linux/clkdev.h>
15#include <linux/can/platform/flexcan.h>
16#include <linux/delay.h>
15#include <linux/err.h> 17#include <linux/err.h>
16#include <linux/init.h> 18#include <linux/gpio.h>
17#include <linux/init.h> 19#include <linux/init.h>
18#include <linux/irqdomain.h> 20#include <linux/irqdomain.h>
19#include <linux/micrel_phy.h> 21#include <linux/micrel_phy.h>
@@ -21,9 +23,12 @@
21#include <linux/of_irq.h> 23#include <linux/of_irq.h>
22#include <linux/of_platform.h> 24#include <linux/of_platform.h>
23#include <linux/phy.h> 25#include <linux/phy.h>
26#include <linux/pinctrl/consumer.h>
24#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
25#include <asm/mach/time.h> 28#include <asm/mach/time.h>
26#include <mach/common.h> 29#include <mach/common.h>
30#include <mach/digctl.h>
31#include <mach/mxs.h>
27 32
28static struct fb_videomode mx23evk_video_modes[] = { 33static struct fb_videomode mx23evk_video_modes[] = {
29 { 34 {
@@ -99,9 +104,40 @@ static struct fb_videomode apx4devkit_video_modes[] = {
99 104
100static struct mxsfb_platform_data mxsfb_pdata __initdata; 105static struct mxsfb_platform_data mxsfb_pdata __initdata;
101 106
107/*
108 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
109 */
110#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
111
112static int flexcan0_en, flexcan1_en;
113
114static void mx28evk_flexcan_switch(void)
115{
116 if (flexcan0_en || flexcan1_en)
117 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
118 else
119 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
120}
121
122static void mx28evk_flexcan0_switch(int enable)
123{
124 flexcan0_en = enable;
125 mx28evk_flexcan_switch();
126}
127
128static void mx28evk_flexcan1_switch(int enable)
129{
130 flexcan1_en = enable;
131 mx28evk_flexcan_switch();
132}
133
134static struct flexcan_platform_data flexcan_pdata[2];
135
102static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { 136static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
103 OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata), 137 OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
104 OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata), 138 OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
139 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
140 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
105 { /* sentinel */ } 141 { /* sentinel */ }
106}; 142};
107 143
@@ -237,13 +273,21 @@ static void __init imx28_evk_init(void)
237 mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes); 273 mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
238 mxsfb_pdata.default_bpp = 32; 274 mxsfb_pdata.default_bpp = 32;
239 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; 275 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
276
277 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
240} 278}
241 279
242static void __init m28evk_init(void) 280static void __init imx28_evk_post_init(void)
243{ 281{
244 enable_clk_enet_out(); 282 if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
245 update_fec_mac_prop(OUI_DENX); 283 "flexcan-switch")) {
284 flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch;
285 flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch;
286 }
287}
246 288
289static void __init m28evk_init(void)
290{
247 mxsfb_pdata.mode_list = m28evk_video_modes; 291 mxsfb_pdata.mode_list = m28evk_video_modes;
248 mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes); 292 mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
249 mxsfb_pdata.default_bpp = 16; 293 mxsfb_pdata.default_bpp = 16;
@@ -270,6 +314,80 @@ static void __init apx4devkit_init(void)
270 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; 314 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
271} 315}
272 316
317#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
318#define ENET0_MDIO__GPIO_4_1 MXS_GPIO_NR(4, 1)
319#define ENET0_RX_EN__GPIO_4_2 MXS_GPIO_NR(4, 2)
320#define ENET0_RXD0__GPIO_4_3 MXS_GPIO_NR(4, 3)
321#define ENET0_RXD1__GPIO_4_4 MXS_GPIO_NR(4, 4)
322#define ENET0_TX_EN__GPIO_4_6 MXS_GPIO_NR(4, 6)
323#define ENET0_TXD0__GPIO_4_7 MXS_GPIO_NR(4, 7)
324#define ENET0_TXD1__GPIO_4_8 MXS_GPIO_NR(4, 8)
325#define ENET_CLK__GPIO_4_16 MXS_GPIO_NR(4, 16)
326
327#define TX28_FEC_PHY_POWER MXS_GPIO_NR(3, 29)
328#define TX28_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
329#define TX28_FEC_nINT MXS_GPIO_NR(4, 5)
330
331static const struct gpio tx28_gpios[] __initconst = {
332 { ENET0_MDC__GPIO_4_0, GPIOF_OUT_INIT_LOW, "GPIO_4_0" },
333 { ENET0_MDIO__GPIO_4_1, GPIOF_OUT_INIT_LOW, "GPIO_4_1" },
334 { ENET0_RX_EN__GPIO_4_2, GPIOF_OUT_INIT_LOW, "GPIO_4_2" },
335 { ENET0_RXD0__GPIO_4_3, GPIOF_OUT_INIT_LOW, "GPIO_4_3" },
336 { ENET0_RXD1__GPIO_4_4, GPIOF_OUT_INIT_LOW, "GPIO_4_4" },
337 { ENET0_TX_EN__GPIO_4_6, GPIOF_OUT_INIT_LOW, "GPIO_4_6" },
338 { ENET0_TXD0__GPIO_4_7, GPIOF_OUT_INIT_LOW, "GPIO_4_7" },
339 { ENET0_TXD1__GPIO_4_8, GPIOF_OUT_INIT_LOW, "GPIO_4_8" },
340 { ENET_CLK__GPIO_4_16, GPIOF_OUT_INIT_LOW, "GPIO_4_16" },
341 { TX28_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
342 { TX28_FEC_PHY_RESET, GPIOF_OUT_INIT_LOW, "fec-phy-reset" },
343 { TX28_FEC_nINT, GPIOF_DIR_IN, "fec-int" },
344};
345
346static void __init tx28_post_init(void)
347{
348 struct device_node *np;
349 struct platform_device *pdev;
350 struct pinctrl *pctl;
351 int ret;
352
353 enable_clk_enet_out();
354
355 np = of_find_compatible_node(NULL, NULL, "fsl,imx28-fec");
356 pdev = of_find_device_by_node(np);
357 if (!pdev) {
358 pr_err("%s: failed to find fec device\n", __func__);
359 return;
360 }
361
362 pctl = pinctrl_get_select(&pdev->dev, "gpio_mode");
363 if (IS_ERR(pctl)) {
364 pr_err("%s: failed to get pinctrl state\n", __func__);
365 return;
366 }
367
368 ret = gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
369 if (ret) {
370 pr_err("%s: failed to request gpios: %d\n", __func__, ret);
371 return;
372 }
373
374 /* Power up fec phy */
375 gpio_set_value(TX28_FEC_PHY_POWER, 1);
376 msleep(26); /* 25ms according to data sheet */
377
378 /* Mode strap pins */
379 gpio_set_value(ENET0_RX_EN__GPIO_4_2, 1);
380 gpio_set_value(ENET0_RXD0__GPIO_4_3, 1);
381 gpio_set_value(ENET0_RXD1__GPIO_4_4, 1);
382
383 udelay(100); /* minimum assertion time for nRST */
384
385 /* Deasserting FEC PHY RESET */
386 gpio_set_value(TX28_FEC_PHY_RESET, 1);
387
388 pinctrl_put(pctl);
389}
390
273static void __init mxs_machine_init(void) 391static void __init mxs_machine_init(void)
274{ 392{
275 if (of_machine_is_compatible("fsl,imx28-evk")) 393 if (of_machine_is_compatible("fsl,imx28-evk"))
@@ -283,22 +401,20 @@ static void __init mxs_machine_init(void)
283 401
284 of_platform_populate(NULL, of_default_bus_match_table, 402 of_platform_populate(NULL, of_default_bus_match_table,
285 mxs_auxdata_lookup, NULL); 403 mxs_auxdata_lookup, NULL);
404
405 if (of_machine_is_compatible("karo,tx28"))
406 tx28_post_init();
407
408 if (of_machine_is_compatible("fsl,imx28-evk"))
409 imx28_evk_post_init();
286} 410}
287 411
288static const char *imx23_dt_compat[] __initdata = { 412static const char *imx23_dt_compat[] __initdata = {
289 "fsl,imx23-evk",
290 "fsl,stmp378x_devb"
291 "olimex,imx23-olinuxino",
292 "fsl,imx23", 413 "fsl,imx23",
293 NULL, 414 NULL,
294}; 415};
295 416
296static const char *imx28_dt_compat[] __initdata = { 417static const char *imx28_dt_compat[] __initdata = {
297 "bluegiga,apx4devkit",
298 "crystalfontz,cfa10036",
299 "denx,m28evk",
300 "fsl,imx28-evk",
301 "karo,tx28",
302 "fsl,imx28", 418 "fsl,imx28",
303 NULL, 419 NULL,
304}; 420};
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c
deleted file mode 100644
index 6548965e4a76..000000000000
--- a/arch/arm/mach-mxs/mach-stmp378x_devb.c
+++ /dev/null
@@ -1,123 +0,0 @@
1/*
2 * board setup for STMP378x-Development-Board
3 *
4 * based on mx23evk board setup and information gained form the original
5 * plat-stmp based board setup, now converted to mach-mxs.
6 *
7 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
8 * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20#include <linux/platform_device.h>
21#include <linux/gpio.h>
22#include <linux/spi/spi.h>
23
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include <asm/mach/time.h>
27
28#include <mach/common.h>
29#include <mach/iomux-mx23.h>
30
31#include "devices-mx23.h"
32
33#define STMP378X_DEVB_MMC0_WRITE_PROTECT MXS_GPIO_NR(1, 30)
34#define STMP378X_DEVB_MMC0_SLOT_POWER MXS_GPIO_NR(1, 29)
35
36#define STMP378X_DEVB_PAD_AUART (MXS_PAD_4MA | MXS_PAD_1V8 | MXS_PAD_NOPULL)
37
38static const iomux_cfg_t stmp378x_dvb_pads[] __initconst = {
39 /* duart (extended setup missing in old boardcode, too */
40 MX23_PAD_PWM0__DUART_RX,
41 MX23_PAD_PWM1__DUART_TX,
42
43 /* auart */
44 MX23_PAD_AUART1_RX__AUART1_RX | STMP378X_DEVB_PAD_AUART,
45 MX23_PAD_AUART1_TX__AUART1_TX | STMP378X_DEVB_PAD_AUART,
46 MX23_PAD_AUART1_CTS__AUART1_CTS | STMP378X_DEVB_PAD_AUART,
47 MX23_PAD_AUART1_RTS__AUART1_RTS | STMP378X_DEVB_PAD_AUART,
48
49 /* mmc */
50 MX23_PAD_SSP1_DATA0__SSP1_DATA0 |
51 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
52 MX23_PAD_SSP1_DATA1__SSP1_DATA1 |
53 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
54 MX23_PAD_SSP1_DATA2__SSP1_DATA2 |
55 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
56 MX23_PAD_SSP1_DATA3__SSP1_DATA3 |
57 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
58 MX23_PAD_SSP1_CMD__SSP1_CMD |
59 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
60 MX23_PAD_SSP1_DETECT__SSP1_DETECT |
61 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
62 MX23_PAD_SSP1_SCK__SSP1_SCK |
63 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
64 MX23_PAD_PWM4__GPIO_1_30 | MXS_PAD_CTRL, /* write protect */
65 MX23_PAD_PWM3__GPIO_1_29 | MXS_PAD_CTRL, /* power enable */
66};
67
68static struct mxs_mmc_platform_data stmp378x_dvb_mmc_pdata __initdata = {
69 .wp_gpio = STMP378X_DEVB_MMC0_WRITE_PROTECT,
70};
71
72static struct spi_board_info spi_board_info[] __initdata = {
73#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
74 {
75 .modalias = "enc28j60",
76 .max_speed_hz = 6 * 1000 * 1000,
77 .bus_num = 1,
78 .chip_select = 0,
79 .platform_data = NULL,
80 },
81#endif
82};
83
84static void __init stmp378x_dvb_init(void)
85{
86 int ret;
87
88 mx23_soc_init();
89
90 mxs_iomux_setup_multiple_pads(stmp378x_dvb_pads,
91 ARRAY_SIZE(stmp378x_dvb_pads));
92
93 mx23_add_duart();
94 mx23_add_auart0();
95 mx23_add_rtc_stmp3xxx();
96
97 /* power on mmc slot */
98 ret = gpio_request_one(STMP378X_DEVB_MMC0_SLOT_POWER,
99 GPIOF_OUT_INIT_LOW, "mmc0-slot-power");
100 if (ret)
101 pr_warn("could not power mmc (%d)\n", ret);
102
103 mx23_add_mxs_mmc(0, &stmp378x_dvb_mmc_pdata);
104
105 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
106}
107
108static void __init stmp378x_dvb_timer_init(void)
109{
110 mx23_clocks_init();
111}
112
113static struct sys_timer stmp378x_dvb_timer = {
114 .init = stmp378x_dvb_timer_init,
115};
116
117MACHINE_START(STMP378X, "STMP378X")
118 .map_io = mx23_map_io,
119 .init_irq = mx23_init_irq,
120 .timer = &stmp378x_dvb_timer,
121 .init_machine = stmp378x_dvb_init,
122 .restart = mxs_restart,
123MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c
deleted file mode 100644
index 8837029de1a4..000000000000
--- a/arch/arm/mach-mxs/mach-tx28.c
+++ /dev/null
@@ -1,184 +0,0 @@
1/*
2 * Copyright (C) 2010 <LW@KARO-electronics.de>
3 *
4 * based on: mach-mx28_evk.c
5 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation
10 */
11#include <linux/kernel.h>
12#include <linux/gpio.h>
13#include <linux/leds.h>
14#include <linux/platform_device.h>
15#include <linux/spi/spi.h>
16#include <linux/spi/spi_gpio.h>
17#include <linux/i2c.h>
18
19#include <asm/mach/arch.h>
20#include <asm/mach/time.h>
21
22#include <mach/common.h>
23#include <mach/iomux-mx28.h>
24
25#include "devices-mx28.h"
26#include "module-tx28.h"
27
28#define TX28_STK5_GPIO_LED MXS_GPIO_NR(4, 10)
29
30static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = {
31 /* LED */
32 MX28_PAD_ENET0_RXD3__GPIO_4_10 |
33 MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL,
34
35 /* framebuffer */
36#define LCD_MODE (MXS_PAD_3V3 | MXS_PAD_4MA)
37 MX28_PAD_LCD_D00__LCD_D0 | LCD_MODE,
38 MX28_PAD_LCD_D01__LCD_D1 | LCD_MODE,
39 MX28_PAD_LCD_D02__LCD_D2 | LCD_MODE,
40 MX28_PAD_LCD_D03__LCD_D3 | LCD_MODE,
41 MX28_PAD_LCD_D04__LCD_D4 | LCD_MODE,
42 MX28_PAD_LCD_D05__LCD_D5 | LCD_MODE,
43 MX28_PAD_LCD_D06__LCD_D6 | LCD_MODE,
44 MX28_PAD_LCD_D07__LCD_D7 | LCD_MODE,
45 MX28_PAD_LCD_D08__LCD_D8 | LCD_MODE,
46 MX28_PAD_LCD_D09__LCD_D9 | LCD_MODE,
47 MX28_PAD_LCD_D10__LCD_D10 | LCD_MODE,
48 MX28_PAD_LCD_D11__LCD_D11 | LCD_MODE,
49 MX28_PAD_LCD_D12__LCD_D12 | LCD_MODE,
50 MX28_PAD_LCD_D13__LCD_D13 | LCD_MODE,
51 MX28_PAD_LCD_D14__LCD_D14 | LCD_MODE,
52 MX28_PAD_LCD_D15__LCD_D15 | LCD_MODE,
53 MX28_PAD_LCD_D16__LCD_D16 | LCD_MODE,
54 MX28_PAD_LCD_D17__LCD_D17 | LCD_MODE,
55 MX28_PAD_LCD_D18__LCD_D18 | LCD_MODE,
56 MX28_PAD_LCD_D19__LCD_D19 | LCD_MODE,
57 MX28_PAD_LCD_D20__LCD_D20 | LCD_MODE,
58 MX28_PAD_LCD_D21__LCD_D21 | LCD_MODE,
59 MX28_PAD_LCD_D22__LCD_D22 | LCD_MODE,
60 MX28_PAD_LCD_D23__LCD_D23 | LCD_MODE,
61 MX28_PAD_LCD_RD_E__LCD_VSYNC | LCD_MODE,
62 MX28_PAD_LCD_WR_RWN__LCD_HSYNC | LCD_MODE,
63 MX28_PAD_LCD_RS__LCD_DOTCLK | LCD_MODE,
64 MX28_PAD_LCD_CS__LCD_CS | LCD_MODE,
65 MX28_PAD_LCD_VSYNC__LCD_VSYNC | LCD_MODE,
66 MX28_PAD_LCD_HSYNC__LCD_HSYNC | LCD_MODE,
67 MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | LCD_MODE,
68 MX28_PAD_LCD_ENABLE__GPIO_1_31 | LCD_MODE,
69 MX28_PAD_LCD_RESET__GPIO_3_30 | LCD_MODE,
70 MX28_PAD_PWM0__PWM_0 | LCD_MODE,
71
72 /* UART1 */
73 MX28_PAD_AUART0_CTS__DUART_RX,
74 MX28_PAD_AUART0_RTS__DUART_TX,
75 MX28_PAD_AUART0_TX__DUART_RTS,
76 MX28_PAD_AUART0_RX__DUART_CTS,
77
78 /* UART2 */
79 MX28_PAD_AUART1_RX__AUART1_RX,
80 MX28_PAD_AUART1_TX__AUART1_TX,
81 MX28_PAD_AUART1_RTS__AUART1_RTS,
82 MX28_PAD_AUART1_CTS__AUART1_CTS,
83
84 /* CAN */
85 MX28_PAD_GPMI_RDY2__CAN0_TX,
86 MX28_PAD_GPMI_RDY3__CAN0_RX,
87
88 /* I2C */
89 MX28_PAD_I2C0_SCL__I2C0_SCL,
90 MX28_PAD_I2C0_SDA__I2C0_SDA,
91
92 /* TSC2007 */
93 MX28_PAD_SAIF0_MCLK__GPIO_3_20 | MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP,
94
95 /* MMC0 */
96 MX28_PAD_SSP0_DATA0__SSP0_D0 |
97 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
98 MX28_PAD_SSP0_DATA1__SSP0_D1 |
99 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
100 MX28_PAD_SSP0_DATA2__SSP0_D2 |
101 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
102 MX28_PAD_SSP0_DATA3__SSP0_D3 |
103 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
104 MX28_PAD_SSP0_CMD__SSP0_CMD |
105 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
106 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
107 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
108 MX28_PAD_SSP0_SCK__SSP0_SCK |
109 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
110};
111
112static const struct gpio_led tx28_stk5v3_leds[] __initconst = {
113 {
114 .name = "GPIO-LED",
115 .default_trigger = "heartbeat",
116 .gpio = TX28_STK5_GPIO_LED,
117 },
118};
119
120static const struct gpio_led_platform_data tx28_stk5v3_led_data __initconst = {
121 .leds = tx28_stk5v3_leds,
122 .num_leds = ARRAY_SIZE(tx28_stk5v3_leds),
123};
124
125static struct spi_board_info tx28_spi_board_info[] = {
126 {
127 .modalias = "spidev",
128 .max_speed_hz = 20000000,
129 .bus_num = 0,
130 .chip_select = 1,
131 .controller_data = (void *)SPI_GPIO_NO_CHIPSELECT,
132 .mode = SPI_MODE_0,
133 },
134};
135
136static struct i2c_board_info tx28_stk5v3_i2c_boardinfo[] __initdata = {
137 {
138 I2C_BOARD_INFO("ds1339", 0x68),
139 },
140};
141
142static struct mxs_mmc_platform_data tx28_mmc0_pdata __initdata = {
143 .wp_gpio = -EINVAL,
144 .flags = SLOTF_4_BIT_CAPABLE,
145};
146
147static void __init tx28_stk5v3_init(void)
148{
149 mx28_soc_init();
150
151 mxs_iomux_setup_multiple_pads(tx28_stk5v3_pads,
152 ARRAY_SIZE(tx28_stk5v3_pads));
153
154 mx28_add_duart(); /* UART1 */
155 mx28_add_auart(1); /* UART2 */
156
157 tx28_add_fec0();
158 /* spi via ssp will be added when available */
159 spi_register_board_info(tx28_spi_board_info,
160 ARRAY_SIZE(tx28_spi_board_info));
161 gpio_led_register_device(0, &tx28_stk5v3_led_data);
162 mx28_add_mxs_i2c(0);
163 i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo,
164 ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo));
165 mx28_add_mxs_mmc(0, &tx28_mmc0_pdata);
166 mx28_add_rtc_stmp3xxx();
167}
168
169static void __init tx28_timer_init(void)
170{
171 mx28_clocks_init();
172}
173
174static struct sys_timer tx28_timer = {
175 .init = tx28_timer_init,
176};
177
178MACHINE_START(TX28, "Ka-Ro electronics TX28 module")
179 .map_io = mx28_map_io,
180 .init_irq = mx28_init_irq,
181 .timer = &tx28_timer,
182 .init_machine = tx28_stk5v3_init,
183 .restart = mxs_restart,
184MACHINE_END
diff --git a/arch/arm/mach-mxs/mm.c b/arch/arm/mach-mxs/mm.c
index dccb67a9e7c4..a4294aa9f301 100644
--- a/arch/arm/mach-mxs/mm.c
+++ b/arch/arm/mach-mxs/mm.c
@@ -13,14 +13,11 @@
13 13
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/pinctrl/machine.h>
17 16
18#include <asm/mach/map.h> 17#include <asm/mach/map.h>
19 18
20#include <mach/mx23.h> 19#include <mach/mx23.h>
21#include <mach/mx28.h> 20#include <mach/mx28.h>
22#include <mach/common.h>
23#include <mach/iomux.h>
24 21
25/* 22/*
26 * Define the MX23 memory map. 23 * Define the MX23 memory map.
@@ -48,43 +45,7 @@ void __init mx23_map_io(void)
48 iotable_init(mx23_io_desc, ARRAY_SIZE(mx23_io_desc)); 45 iotable_init(mx23_io_desc, ARRAY_SIZE(mx23_io_desc));
49} 46}
50 47
51void __init mx23_init_irq(void)
52{
53 icoll_init_irq();
54}
55
56void __init mx28_map_io(void) 48void __init mx28_map_io(void)
57{ 49{
58 iotable_init(mx28_io_desc, ARRAY_SIZE(mx28_io_desc)); 50 iotable_init(mx28_io_desc, ARRAY_SIZE(mx28_io_desc));
59} 51}
60
61void __init mx28_init_irq(void)
62{
63 icoll_init_irq();
64}
65
66void __init mx23_soc_init(void)
67{
68 pinctrl_provide_dummies();
69
70 mxs_add_dma("imx23-dma-apbh", MX23_APBH_DMA_BASE_ADDR);
71 mxs_add_dma("imx23-dma-apbx", MX23_APBX_DMA_BASE_ADDR);
72
73 mxs_add_gpio("imx23-gpio", 0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0);
74 mxs_add_gpio("imx23-gpio", 1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1);
75 mxs_add_gpio("imx23-gpio", 2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2);
76}
77
78void __init mx28_soc_init(void)
79{
80 pinctrl_provide_dummies();
81
82 mxs_add_dma("imx28-dma-apbh", MX23_APBH_DMA_BASE_ADDR);
83 mxs_add_dma("imx28-dma-apbx", MX23_APBX_DMA_BASE_ADDR);
84
85 mxs_add_gpio("imx28-gpio", 0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0);
86 mxs_add_gpio("imx28-gpio", 1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1);
87 mxs_add_gpio("imx28-gpio", 2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2);
88 mxs_add_gpio("imx28-gpio", 3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3);
89 mxs_add_gpio("imx28-gpio", 4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4);
90}
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c
deleted file mode 100644
index 0f71f82101cc..000000000000
--- a/arch/arm/mach-mxs/module-tx28.c
+++ /dev/null
@@ -1,160 +0,0 @@
1/*
2 * Copyright (C) 2010 <LW@KARO-electronics.de>
3 *
4 * This program is free software; you can redistribute it and/or modify it under
5 * the terms of the GNU General Public License version 2 as published by the
6 * Free Software Foundation.
7 */
8
9#include <linux/delay.h>
10#include <linux/fec.h>
11#include <linux/gpio.h>
12
13#include <mach/iomux-mx28.h>
14#include "devices-mx28.h"
15
16#include "module-tx28.h"
17
18#define TX28_FEC_PHY_POWER MXS_GPIO_NR(3, 29)
19#define TX28_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
20
21static const iomux_cfg_t tx28_fec_gpio_pads[] __initconst = {
22 /* PHY POWER */
23 MX28_PAD_PWM4__GPIO_3_29 |
24 MXS_PAD_4MA | MXS_PAD_NOPULL | MXS_PAD_3V3,
25 /* PHY RESET */
26 MX28_PAD_ENET0_RX_CLK__GPIO_4_13 |
27 MXS_PAD_4MA | MXS_PAD_NOPULL | MXS_PAD_3V3,
28 /* Mode strap pins 0-2 */
29 MX28_PAD_ENET0_RXD0__GPIO_4_3 |
30 MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3,
31 MX28_PAD_ENET0_RXD1__GPIO_4_4 |
32 MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3,
33 MX28_PAD_ENET0_RX_EN__GPIO_4_2 |
34 MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3,
35 /* nINT */
36 MX28_PAD_ENET0_TX_CLK__GPIO_4_5 |
37 MXS_PAD_4MA | MXS_PAD_NOPULL | MXS_PAD_3V3,
38
39 MX28_PAD_ENET0_MDC__GPIO_4_0,
40 MX28_PAD_ENET0_MDIO__GPIO_4_1,
41 MX28_PAD_ENET0_TX_EN__GPIO_4_6,
42 MX28_PAD_ENET0_TXD0__GPIO_4_7,
43 MX28_PAD_ENET0_TXD1__GPIO_4_8,
44 MX28_PAD_ENET_CLK__GPIO_4_16,
45};
46
47#define FEC_MODE (MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3)
48static const iomux_cfg_t tx28_fec0_pads[] __initconst = {
49 MX28_PAD_ENET0_MDC__ENET0_MDC | FEC_MODE,
50 MX28_PAD_ENET0_MDIO__ENET0_MDIO | FEC_MODE,
51 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | FEC_MODE,
52 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | FEC_MODE,
53 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | FEC_MODE,
54 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | FEC_MODE,
55 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | FEC_MODE,
56 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | FEC_MODE,
57 MX28_PAD_ENET_CLK__CLKCTRL_ENET | FEC_MODE,
58};
59
60static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
61 MX28_PAD_ENET0_RXD2__ENET1_RXD0,
62 MX28_PAD_ENET0_RXD3__ENET1_RXD1,
63 MX28_PAD_ENET0_TXD2__ENET1_TXD0,
64 MX28_PAD_ENET0_TXD3__ENET1_TXD1,
65 MX28_PAD_ENET0_COL__ENET1_TX_EN,
66 MX28_PAD_ENET0_CRS__ENET1_RX_EN,
67};
68
69static const struct fec_platform_data tx28_fec0_data __initconst = {
70 .phy = PHY_INTERFACE_MODE_RMII,
71};
72
73static const struct fec_platform_data tx28_fec1_data __initconst = {
74 .phy = PHY_INTERFACE_MODE_RMII,
75};
76
77int __init tx28_add_fec0(void)
78{
79 int i, ret;
80
81 pr_debug("%s: Switching FEC PHY power off\n", __func__);
82 ret = mxs_iomux_setup_multiple_pads(tx28_fec_gpio_pads,
83 ARRAY_SIZE(tx28_fec_gpio_pads));
84 for (i = 0; i < ARRAY_SIZE(tx28_fec_gpio_pads); i++) {
85 unsigned int gpio = MXS_GPIO_NR(PAD_BANK(tx28_fec_gpio_pads[i]),
86 PAD_PIN(tx28_fec_gpio_pads[i]));
87
88 ret = gpio_request(gpio, "FEC");
89 if (ret) {
90 pr_err("Failed to request GPIO_%d_%d: %d\n",
91 PAD_BANK(tx28_fec_gpio_pads[i]),
92 PAD_PIN(tx28_fec_gpio_pads[i]), ret);
93 goto free_gpios;
94 }
95 ret = gpio_direction_output(gpio, 0);
96 if (ret) {
97 pr_err("Failed to set direction of GPIO_%d_%d to output: %d\n",
98 gpio / 32 + 1, gpio % 32, ret);
99 goto free_gpios;
100 }
101 }
102
103 /* Power up fec phy */
104 pr_debug("%s: Switching FEC PHY power on\n", __func__);
105 ret = gpio_direction_output(TX28_FEC_PHY_POWER, 1);
106 if (ret) {
107 pr_err("Failed to power on PHY: %d\n", ret);
108 goto free_gpios;
109 }
110 mdelay(26); /* 25ms according to data sheet */
111
112 /* nINT */
113 gpio_direction_input(MXS_GPIO_NR(4, 5));
114 /* Mode strap pins */
115 gpio_direction_output(MXS_GPIO_NR(4, 2), 1);
116 gpio_direction_output(MXS_GPIO_NR(4, 3), 1);
117 gpio_direction_output(MXS_GPIO_NR(4, 4), 1);
118
119 udelay(100); /* minimum assertion time for nRST */
120
121 pr_debug("%s: Deasserting FEC PHY RESET\n", __func__);
122 gpio_set_value(TX28_FEC_PHY_RESET, 1);
123
124 ret = mxs_iomux_setup_multiple_pads(tx28_fec0_pads,
125 ARRAY_SIZE(tx28_fec0_pads));
126 if (ret) {
127 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n",
128 __func__, ret);
129 goto free_gpios;
130 }
131 pr_debug("%s: Registering FEC0 device\n", __func__);
132 mx28_add_fec(0, &tx28_fec0_data);
133 return 0;
134
135free_gpios:
136 while (--i >= 0) {
137 unsigned int gpio = MXS_GPIO_NR(PAD_BANK(tx28_fec_gpio_pads[i]),
138 PAD_PIN(tx28_fec_gpio_pads[i]));
139
140 gpio_free(gpio);
141 }
142
143 return ret;
144}
145
146int __init tx28_add_fec1(void)
147{
148 int ret;
149
150 ret = mxs_iomux_setup_multiple_pads(tx28_fec1_pads,
151 ARRAY_SIZE(tx28_fec1_pads));
152 if (ret) {
153 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n",
154 __func__, ret);
155 return ret;
156 }
157 pr_debug("%s: Registering FEC1 device\n", __func__);
158 mx28_add_fec(1, &tx28_fec1_data);
159 return 0;
160}
diff --git a/arch/arm/mach-mxs/module-tx28.h b/arch/arm/mach-mxs/module-tx28.h
deleted file mode 100644
index 8ed425457d30..000000000000
--- a/arch/arm/mach-mxs/module-tx28.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9int __init tx28_add_fec0(void);
10int __init tx28_add_fec1(void);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 00:13:51 -0500