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-rw-r--r--arch/arm/mach-mx5/Kconfig50
-rw-r--r--arch/arm/mach-mx5/Makefile6
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51.c28
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51sd.c26
-rw-r--r--arch/arm/mach-mx5/board-mx50_rdp.c1
-rw-r--r--arch/arm/mach-mx5/board-mx51_3ds.c2
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c36
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikamx.c14
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikasb.c25
-rw-r--r--arch/arm/mach-mx5/board-mx53_ard.c18
-rw-r--r--arch/arm/mach-mx5/board-mx53_evk.c10
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c31
-rw-r--r--arch/arm/mach-mx5/board-mx53_smd.c26
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c72
-rw-r--r--arch/arm/mach-mx5/cpu.c74
-rw-r--r--arch/arm/mach-mx5/devices-imx51.h17
-rw-r--r--arch/arm/mach-mx5/devices-imx53.h6
-rw-r--r--arch/arm/mach-mx5/devices.c120
-rw-r--r--arch/arm/mach-mx5/devices.h5
-rw-r--r--arch/arm/mach-mx5/ehci.c2
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c3
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c6
-rw-r--r--arch/arm/mach-mx5/imx51-dt.c116
-rw-r--r--arch/arm/mach-mx5/imx53-dt.c126
-rw-r--r--arch/arm/mach-mx5/mm-mx50.c72
-rw-r--r--arch/arm/mach-mx5/mm.c90
-rw-r--r--arch/arm/mach-mx5/mx51_efika.c20
-rw-r--r--arch/arm/mach-mx5/pm-imx5.c18
-rw-r--r--arch/arm/mach-mx5/system.c1
29 files changed, 622 insertions, 399 deletions
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index b4e7c58bbb38..af0c212e3c7b 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -1,8 +1,9 @@
1if ARCH_MX503 || ARCH_MX51 1if ARCH_MX5
2
2# ARCH_MX5/50/53 are left to mark places where prevent multi-soc in single 3# ARCH_MX5/50/53 are left to mark places where prevent multi-soc in single
3# image. So for most time, SOC_IMX50/51/53 should be used. 4# image. So for most time, SOC_IMX50/51/53 should be used.
4 5
5config ARCH_MX5 6config ARCH_MX51
6 bool 7 bool
7 8
8config ARCH_MX50 9config ARCH_MX50
@@ -19,7 +20,6 @@ config SOC_IMX50
19 select ARCH_MXC_IOMUX_V3 20 select ARCH_MXC_IOMUX_V3
20 select ARCH_MXC_AUDMUX_V2 21 select ARCH_MXC_AUDMUX_V2
21 select ARCH_HAS_CPUFREQ 22 select ARCH_HAS_CPUFREQ
22 select ARCH_MX5
23 select ARCH_MX50 23 select ARCH_MX50
24 24
25config SOC_IMX51 25config SOC_IMX51
@@ -30,7 +30,7 @@ config SOC_IMX51
30 select ARCH_MXC_IOMUX_V3 30 select ARCH_MXC_IOMUX_V3
31 select ARCH_MXC_AUDMUX_V2 31 select ARCH_MXC_AUDMUX_V2
32 select ARCH_HAS_CPUFREQ 32 select ARCH_HAS_CPUFREQ
33 select ARCH_MX5 33 select ARCH_MX51
34 34
35config SOC_IMX53 35config SOC_IMX53
36 bool 36 bool
@@ -38,10 +38,8 @@ config SOC_IMX53
38 select ARM_L1_CACHE_SHIFT_6 38 select ARM_L1_CACHE_SHIFT_6
39 select MXC_TZIC 39 select MXC_TZIC
40 select ARCH_MXC_IOMUX_V3 40 select ARCH_MXC_IOMUX_V3
41 select ARCH_MX5
42 select ARCH_MX53 41 select ARCH_MX53
43 42
44if ARCH_MX50_SUPPORTED
45#comment "i.MX50 machines:" 43#comment "i.MX50 machines:"
46 44
47config MACH_MX50_RDP 45config MACH_MX50_RDP
@@ -52,22 +50,29 @@ config MACH_MX50_RDP
52 select IMX_HAVE_PLATFORM_IMX_UART 50 select IMX_HAVE_PLATFORM_IMX_UART
53 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 51 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
54 select IMX_HAVE_PLATFORM_SPI_IMX 52 select IMX_HAVE_PLATFORM_SPI_IMX
55 select IMX_HAVE_PLATFORM_FEC
56 help 53 help
57 Include support for MX50 reference design platform (RDP) board. This 54 Include support for MX50 reference design platform (RDP) board. This
58 includes specific configurations for the board and its peripherals. 55 includes specific configurations for the board and its peripherals.
59 56
60endif # ARCH_MX50_SUPPORTED
61
62if ARCH_MX51
63comment "i.MX51 machines:" 57comment "i.MX51 machines:"
64 58
59config MACH_IMX51_DT
60 bool "Support i.MX51 platforms from device tree"
61 select SOC_IMX51
62 select USE_OF
63 select MACH_MX51_BABBAGE
64 help
65 Include support for Freescale i.MX51 based platforms
66 using the device tree for discovery
67
65config MACH_MX51_BABBAGE 68config MACH_MX51_BABBAGE
66 bool "Support MX51 BABBAGE platforms" 69 bool "Support MX51 BABBAGE platforms"
67 select SOC_IMX51 70 select SOC_IMX51
71 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
68 select IMX_HAVE_PLATFORM_IMX2_WDT 72 select IMX_HAVE_PLATFORM_IMX2_WDT
69 select IMX_HAVE_PLATFORM_IMX_I2C 73 select IMX_HAVE_PLATFORM_IMX_I2C
70 select IMX_HAVE_PLATFORM_IMX_UART 74 select IMX_HAVE_PLATFORM_IMX_UART
75 select IMX_HAVE_PLATFORM_MXC_EHCI
71 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 76 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
72 select IMX_HAVE_PLATFORM_SPI_IMX 77 select IMX_HAVE_PLATFORM_SPI_IMX
73 help 78 help
@@ -91,8 +96,10 @@ config MACH_MX51_3DS
91config MACH_EUKREA_CPUIMX51 96config MACH_EUKREA_CPUIMX51
92 bool "Support Eukrea CPUIMX51 module" 97 bool "Support Eukrea CPUIMX51 module"
93 select SOC_IMX51 98 select SOC_IMX51
99 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
94 select IMX_HAVE_PLATFORM_IMX_I2C 100 select IMX_HAVE_PLATFORM_IMX_I2C
95 select IMX_HAVE_PLATFORM_IMX_UART 101 select IMX_HAVE_PLATFORM_IMX_UART
102 select IMX_HAVE_PLATFORM_MXC_EHCI
96 select IMX_HAVE_PLATFORM_MXC_NAND 103 select IMX_HAVE_PLATFORM_MXC_NAND
97 select IMX_HAVE_PLATFORM_SPI_IMX 104 select IMX_HAVE_PLATFORM_SPI_IMX
98 help 105 help
@@ -119,10 +126,12 @@ endchoice
119config MACH_EUKREA_CPUIMX51SD 126config MACH_EUKREA_CPUIMX51SD
120 bool "Support Eukrea CPUIMX51SD module" 127 bool "Support Eukrea CPUIMX51SD module"
121 select SOC_IMX51 128 select SOC_IMX51
129 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
122 select IMX_HAVE_PLATFORM_IMX_I2C 130 select IMX_HAVE_PLATFORM_IMX_I2C
123 select IMX_HAVE_PLATFORM_SPI_IMX
124 select IMX_HAVE_PLATFORM_IMX_UART 131 select IMX_HAVE_PLATFORM_IMX_UART
132 select IMX_HAVE_PLATFORM_MXC_EHCI
125 select IMX_HAVE_PLATFORM_MXC_NAND 133 select IMX_HAVE_PLATFORM_MXC_NAND
134 select IMX_HAVE_PLATFORM_SPI_IMX
126 help 135 help
127 Include support for Eukrea CPUIMX51SD platform. This includes 136 Include support for Eukrea CPUIMX51SD platform. This includes
128 specific configurations for the module and its peripherals. 137 specific configurations for the module and its peripherals.
@@ -147,6 +156,8 @@ config MX51_EFIKA_COMMON
147 bool 156 bool
148 select SOC_IMX51 157 select SOC_IMX51
149 select IMX_HAVE_PLATFORM_IMX_UART 158 select IMX_HAVE_PLATFORM_IMX_UART
159 select IMX_HAVE_PLATFORM_MXC_EHCI
160 select IMX_HAVE_PLATFORM_PATA_IMX
150 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 161 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
151 select IMX_HAVE_PLATFORM_SPI_IMX 162 select IMX_HAVE_PLATFORM_SPI_IMX
152 select MXC_ULPI if USB_ULPI 163 select MXC_ULPI if USB_ULPI
@@ -167,11 +178,20 @@ config MACH_MX51_EFIKASB
167 Include support for Genesi Efika Smartbook. This includes specific 178 Include support for Genesi Efika Smartbook. This includes specific
168 configurations for the board and its peripherals. 179 configurations for the board and its peripherals.
169 180
170endif # ARCH_MX51
171
172if ARCH_MX53_SUPPORTED
173comment "i.MX53 machines:" 181comment "i.MX53 machines:"
174 182
183config MACH_IMX53_DT
184 bool "Support i.MX53 platforms from device tree"
185 select SOC_IMX53
186 select USE_OF
187 select MACH_MX53_ARD
188 select MACH_MX53_EVK
189 select MACH_MX53_LOCO
190 select MACH_MX53_SMD
191 help
192 Include support for Freescale i.MX53 based platforms
193 using the device tree for discovery
194
175config MACH_MX53_EVK 195config MACH_MX53_EVK
176 bool "Support MX53 EVK platforms" 196 bool "Support MX53 EVK platforms"
177 select SOC_IMX53 197 select SOC_IMX53
@@ -221,6 +241,4 @@ config MACH_MX53_ARD
221 Include support for MX53 ARD platform. This includes specific 241 Include support for MX53 ARD platform. This includes specific
222 configurations for the board and its peripherals. 242 configurations for the board and its peripherals.
223 243
224endif # ARCH_MX53_SUPPORTED
225
226endif 244endif
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 383e7cd3fbcb..0fc60807fa2b 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -3,8 +3,7 @@
3# 3#
4 4
5# Object file lists. 5# Object file lists.
6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o 6obj-y := cpu.o mm.o clock-mx51-mx53.o ehci.o system.o
7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
8 7
9obj-$(CONFIG_PM) += pm-imx5.o 8obj-$(CONFIG_PM) += pm-imx5.o
10obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o 9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
@@ -22,3 +21,6 @@ obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
22obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o 21obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
23obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o 22obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o
24obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o 23obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o
24
25obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
26obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index e01af948e043..1fc110348040 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -22,21 +22,18 @@
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/irq.h>
26 25
27#include <mach/eukrea-baseboards.h> 26#include <mach/eukrea-baseboards.h>
28#include <mach/common.h> 27#include <mach/common.h>
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30#include <mach/iomux-mx51.h> 29#include <mach/iomux-mx51.h>
31 30
32#include <asm/irq.h>
33#include <asm/setup.h> 31#include <asm/setup.h>
34#include <asm/mach-types.h> 32#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
36#include <asm/mach/time.h> 34#include <asm/mach/time.h>
37 35
38#include "devices-imx51.h" 36#include "devices-imx51.h"
39#include "devices.h"
40 37
41#define CPUIMX51_USBH1_STP IMX_GPIO_NR(1, 27) 38#define CPUIMX51_USBH1_STP IMX_GPIO_NR(1, 27)
42#define CPUIMX51_QUARTA_GPIO IMX_GPIO_NR(3, 28) 39#define CPUIMX51_QUARTA_GPIO IMX_GPIO_NR(3, 28)
@@ -57,7 +54,7 @@
57static struct plat_serial8250_port serial_platform_data[] = { 54static struct plat_serial8250_port serial_platform_data[] = {
58 { 55 {
59 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000), 56 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),
60 .irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO), 57 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTA_GPIO),
61 .irqflags = IRQF_TRIGGER_HIGH, 58 .irqflags = IRQF_TRIGGER_HIGH,
62 .uartclk = CPUIMX51_QUART_XTAL, 59 .uartclk = CPUIMX51_QUART_XTAL,
63 .regshift = CPUIMX51_QUART_REGSHIFT, 60 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -65,7 +62,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
65 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 62 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
66 }, { 63 }, {
67 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000), 64 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),
68 .irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO), 65 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTB_GPIO),
69 .irqflags = IRQF_TRIGGER_HIGH, 66 .irqflags = IRQF_TRIGGER_HIGH,
70 .uartclk = CPUIMX51_QUART_XTAL, 67 .uartclk = CPUIMX51_QUART_XTAL,
71 .regshift = CPUIMX51_QUART_REGSHIFT, 68 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -73,7 +70,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
73 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 70 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
74 }, { 71 }, {
75 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000), 72 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),
76 .irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO), 73 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTC_GPIO),
77 .irqflags = IRQF_TRIGGER_HIGH, 74 .irqflags = IRQF_TRIGGER_HIGH,
78 .uartclk = CPUIMX51_QUART_XTAL, 75 .uartclk = CPUIMX51_QUART_XTAL,
79 .regshift = CPUIMX51_QUART_REGSHIFT, 76 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -81,7 +78,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
81 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, 78 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
82 }, { 79 }, {
83 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), 80 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
84 .irq = gpio_to_irq(CPUIMX51_QUARTD_GPIO), 81 .irq = IMX_GPIO_TO_IRQ(CPUIMX51_QUARTD_GPIO),
85 .irqflags = IRQF_TRIGGER_HIGH, 82 .irqflags = IRQF_TRIGGER_HIGH,
86 .uartclk = CPUIMX51_QUART_XTAL, 83 .uartclk = CPUIMX51_QUART_XTAL,
87 .regshift = CPUIMX51_QUART_REGSHIFT, 84 .regshift = CPUIMX51_QUART_REGSHIFT,
@@ -167,7 +164,7 @@ static int initialize_otg_port(struct platform_device *pdev)
167 void __iomem *usb_base; 164 void __iomem *usb_base;
168 void __iomem *usbother_base; 165 void __iomem *usbother_base;
169 166
170 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 167 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
171 if (!usb_base) 168 if (!usb_base)
172 return -ENOMEM; 169 return -ENOMEM;
173 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 170 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -190,7 +187,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
190 void __iomem *usb_base; 187 void __iomem *usb_base;
191 void __iomem *usbother_base; 188 void __iomem *usbother_base;
192 189
193 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 190 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
194 if (!usb_base) 191 if (!usb_base)
195 return -ENOMEM; 192 return -ENOMEM;
196 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 193 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -206,17 +203,17 @@ static int initialize_usbh1_port(struct platform_device *pdev)
206 MXC_EHCI_ITC_NO_THRESHOLD); 203 MXC_EHCI_ITC_NO_THRESHOLD);
207} 204}
208 205
209static struct mxc_usbh_platform_data dr_utmi_config = { 206static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
210 .init = initialize_otg_port, 207 .init = initialize_otg_port,
211 .portsc = MXC_EHCI_UTMI_16BIT, 208 .portsc = MXC_EHCI_UTMI_16BIT,
212}; 209};
213 210
214static struct fsl_usb2_platform_data usb_pdata = { 211static const struct fsl_usb2_platform_data usb_pdata __initconst = {
215 .operating_mode = FSL_USB2_DR_DEVICE, 212 .operating_mode = FSL_USB2_DR_DEVICE,
216 .phy_mode = FSL_USB2_PHY_UTMI_WIDE, 213 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
217}; 214};
218 215
219static struct mxc_usbh_platform_data usbh1_config = { 216static const struct mxc_usbh_platform_data usbh1_config __initconst = {
220 .init = initialize_usbh1_port, 217 .init = initialize_usbh1_port,
221 .portsc = MXC_EHCI_MODE_ULPI, 218 .portsc = MXC_EHCI_MODE_ULPI,
222}; 219};
@@ -270,12 +267,12 @@ static void __init eukrea_cpuimx51_init(void)
270 ARRAY_SIZE(eukrea_cpuimx51_i2c_devices)); 267 ARRAY_SIZE(eukrea_cpuimx51_i2c_devices));
271 268
272 if (otg_mode_host) 269 if (otg_mode_host)
273 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 270 imx51_add_mxc_ehci_otg(&dr_utmi_config);
274 else { 271 else {
275 initialize_otg_port(NULL); 272 initialize_otg_port(NULL);
276 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata); 273 imx51_add_fsl_usb2_udc(&usb_pdata);
277 } 274 }
278 mxc_register_device(&mxc_usbh1_device, &usbh1_config); 275 imx51_add_mxc_ehci_hs(1, &usbh1_config);
279 276
280#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD 277#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD
281 eukrea_mbimx51_baseboard_init(); 278 eukrea_mbimx51_baseboard_init();
@@ -297,6 +294,7 @@ MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")
297 .map_io = mx51_map_io, 294 .map_io = mx51_map_io,
298 .init_early = imx51_init_early, 295 .init_early = imx51_init_early,
299 .init_irq = mx51_init_irq, 296 .init_irq = mx51_init_irq,
297 .handle_irq = imx51_handle_irq,
300 .timer = &mxc_timer, 298 .timer = &mxc_timer,
301 .init_machine = eukrea_cpuimx51_init, 299 .init_machine = eukrea_cpuimx51_init,
302MACHINE_END 300MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c
index b41fc274a425..52a11c1898e6 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-mx5/board-cpuimx51sd.c
@@ -22,7 +22,6 @@
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/irq.h>
26#include <linux/i2c-gpio.h> 25#include <linux/i2c-gpio.h>
27#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
28#include <linux/can/platform/mcp251x.h> 27#include <linux/can/platform/mcp251x.h>
@@ -32,14 +31,12 @@
32#include <mach/hardware.h> 31#include <mach/hardware.h>
33#include <mach/iomux-mx51.h> 32#include <mach/iomux-mx51.h>
34 33
35#include <asm/irq.h>
36#include <asm/setup.h> 34#include <asm/setup.h>
37#include <asm/mach-types.h> 35#include <asm/mach-types.h>
38#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
39#include <asm/mach/time.h> 37#include <asm/mach/time.h>
40 38
41#include "devices-imx51.h" 39#include "devices-imx51.h"
42#include "devices.h"
43#include "cpu_op-mx51.h" 40#include "cpu_op-mx51.h"
44 41
45#define USBH1_RST IMX_GPIO_NR(2, 28) 42#define USBH1_RST IMX_GPIO_NR(2, 28)
@@ -108,7 +105,7 @@ static iomux_v3_cfg_t eukrea_cpuimx51sd_pads[] = {
108 105
109 /* Touchscreen */ 106 /* Touchscreen */
110 /* IRQ */ 107 /* IRQ */
111 _MX51_PAD_GPIO_NAND__GPIO_NAND | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP | 108 NEW_PAD_CTRL(MX51_PAD_GPIO_NAND__GPIO_NAND, PAD_CTL_PUS_22K_UP |
112 PAD_CTL_PKE | PAD_CTL_SRE_FAST | 109 PAD_CTL_PKE | PAD_CTL_SRE_FAST |
113 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS), 110 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
114}; 111};
@@ -129,7 +126,7 @@ static struct i2c_board_info eukrea_cpuimx51sd_i2c_devices[] = {
129 I2C_BOARD_INFO("tsc2007", 0x49), 126 I2C_BOARD_INFO("tsc2007", 0x49),
130 .type = "tsc2007", 127 .type = "tsc2007",
131 .platform_data = &tsc2007_info, 128 .platform_data = &tsc2007_info,
132 .irq = gpio_to_irq(TSC2007_IRQGPIO), 129 .irq = IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),
133 }, 130 },
134}; 131};
135 132
@@ -149,7 +146,7 @@ static int initialize_otg_port(struct platform_device *pdev)
149 void __iomem *usb_base; 146 void __iomem *usb_base;
150 void __iomem *usbother_base; 147 void __iomem *usbother_base;
151 148
152 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 149 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
153 if (!usb_base) 150 if (!usb_base)
154 return -ENOMEM; 151 return -ENOMEM;
155 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 152 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -172,7 +169,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
172 void __iomem *usb_base; 169 void __iomem *usb_base;
173 void __iomem *usbother_base; 170 void __iomem *usbother_base;
174 171
175 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 172 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
176 if (!usb_base) 173 if (!usb_base)
177 return -ENOMEM; 174 return -ENOMEM;
178 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 175 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -189,17 +186,17 @@ static int initialize_usbh1_port(struct platform_device *pdev)
189 MXC_EHCI_ITC_NO_THRESHOLD); 186 MXC_EHCI_ITC_NO_THRESHOLD);
190} 187}
191 188
192static struct mxc_usbh_platform_data dr_utmi_config = { 189static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
193 .init = initialize_otg_port, 190 .init = initialize_otg_port,
194 .portsc = MXC_EHCI_UTMI_16BIT, 191 .portsc = MXC_EHCI_UTMI_16BIT,
195}; 192};
196 193
197static struct fsl_usb2_platform_data usb_pdata = { 194static const struct fsl_usb2_platform_data usb_pdata __initconst = {
198 .operating_mode = FSL_USB2_DR_DEVICE, 195 .operating_mode = FSL_USB2_DR_DEVICE,
199 .phy_mode = FSL_USB2_PHY_UTMI_WIDE, 196 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
200}; 197};
201 198
202static struct mxc_usbh_platform_data usbh1_config = { 199static const struct mxc_usbh_platform_data usbh1_config __initconst = {
203 .init = initialize_usbh1_port, 200 .init = initialize_usbh1_port,
204 .portsc = MXC_EHCI_MODE_ULPI, 201 .portsc = MXC_EHCI_MODE_ULPI,
205}; 202};
@@ -245,7 +242,7 @@ static struct spi_board_info cpuimx51sd_spi_device[] = {
245 .mode = SPI_MODE_0, 242 .mode = SPI_MODE_0,
246 .chip_select = 0, 243 .chip_select = 0,
247 .platform_data = &mcp251x_info, 244 .platform_data = &mcp251x_info,
248 .irq = gpio_to_irq(CAN_IRQGPIO) 245 .irq = IMX_GPIO_TO_IRQ(CAN_IRQGPIO)
249 }, 246 },
250}; 247};
251 248
@@ -303,17 +300,17 @@ static void __init eukrea_cpuimx51sd_init(void)
303 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 300 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
304 301
305 if (otg_mode_host) 302 if (otg_mode_host)
306 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 303 imx51_add_mxc_ehci_otg(&dr_utmi_config);
307 else { 304 else {
308 initialize_otg_port(NULL); 305 initialize_otg_port(NULL);
309 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata); 306 imx51_add_fsl_usb2_udc(&usb_pdata);
310 } 307 }
311 308
312 gpio_request(USBH1_RST, "usb_rst"); 309 gpio_request(USBH1_RST, "usb_rst");
313 gpio_direction_output(USBH1_RST, 0); 310 gpio_direction_output(USBH1_RST, 0);
314 msleep(20); 311 msleep(20);
315 gpio_set_value(USBH1_RST, 1); 312 gpio_set_value(USBH1_RST, 1);
316 mxc_register_device(&mxc_usbh1_device, &usbh1_config); 313 imx51_add_mxc_ehci_hs(1, &usbh1_config);
317 314
318#ifdef CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD 315#ifdef CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD
319 eukrea_mbimxsd51_baseboard_init(); 316 eukrea_mbimxsd51_baseboard_init();
@@ -335,6 +332,7 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")
335 .map_io = mx51_map_io, 332 .map_io = mx51_map_io,
336 .init_early = imx51_init_early, 333 .init_early = imx51_init_early,
337 .init_irq = mx51_init_irq, 334 .init_irq = mx51_init_irq,
335 .handle_irq = imx51_handle_irq,
338 .timer = &mxc_timer, 336 .timer = &mxc_timer,
339 .init_machine = eukrea_cpuimx51sd_init, 337 .init_machine = eukrea_cpuimx51sd_init,
340MACHINE_END 338MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c
index 7de25c6712eb..fc3621d90bde 100644
--- a/arch/arm/mach-mx5/board-mx50_rdp.c
+++ b/arch/arm/mach-mx5/board-mx50_rdp.c
@@ -219,6 +219,7 @@ MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
219 .map_io = mx50_map_io, 219 .map_io = mx50_map_io,
220 .init_early = imx50_init_early, 220 .init_early = imx50_init_early,
221 .init_irq = mx50_init_irq, 221 .init_irq = mx50_init_irq,
222 .handle_irq = imx50_handle_irq,
222 .timer = &mx50_rdp_timer, 223 .timer = &mx50_rdp_timer,
223 .init_machine = mx50_rdp_board_init, 224 .init_machine = mx50_rdp_board_init,
224MACHINE_END 225MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c
index a50174e69e2f..05783906db2b 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -25,7 +25,6 @@
25#include <mach/3ds_debugboard.h> 25#include <mach/3ds_debugboard.h>
26 26
27#include "devices-imx51.h" 27#include "devices-imx51.h"
28#include "devices.h"
29 28
30#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 6)) 29#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 6))
31#define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) 30#define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28)
@@ -173,6 +172,7 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")
173 .map_io = mx51_map_io, 172 .map_io = mx51_map_io,
174 .init_early = imx51_init_early, 173 .init_early = imx51_init_early,
175 .init_irq = mx51_init_irq, 174 .init_irq = mx51_init_irq,
175 .handle_irq = imx51_handle_irq,
176 .timer = &mx51_3ds_timer, 176 .timer = &mx51_3ds_timer,
177 .init_machine = mx51_3ds_init, 177 .init_machine = mx51_3ds_init,
178MACHINE_END 178MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 468926a48fe0..5c837603ff0f 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -24,14 +24,12 @@
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <mach/iomux-mx51.h> 25#include <mach/iomux-mx51.h>
26 26
27#include <asm/irq.h>
28#include <asm/setup.h> 27#include <asm/setup.h>
29#include <asm/mach-types.h> 28#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
31#include <asm/mach/time.h> 30#include <asm/mach/time.h>
32 31
33#include "devices-imx51.h" 32#include "devices-imx51.h"
34#include "devices.h"
35#include "cpu_op-mx51.h" 33#include "cpu_op-mx51.h"
36 34
37#define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7) 35#define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7)
@@ -176,7 +174,7 @@ static const struct imxi2c_platform_data babbage_i2c_data __initconst = {
176 .bitrate = 100000, 174 .bitrate = 100000,
177}; 175};
178 176
179static struct imxi2c_platform_data babbage_hsi2c_data = { 177static const struct imxi2c_platform_data babbage_hsi2c_data __initconst = {
180 .bitrate = 400000, 178 .bitrate = 400000,
181}; 179};
182 180
@@ -249,7 +247,7 @@ static int initialize_otg_port(struct platform_device *pdev)
249 void __iomem *usb_base; 247 void __iomem *usb_base;
250 void __iomem *usbother_base; 248 void __iomem *usbother_base;
251 249
252 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 250 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
253 if (!usb_base) 251 if (!usb_base)
254 return -ENOMEM; 252 return -ENOMEM;
255 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 253 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -272,7 +270,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
272 void __iomem *usb_base; 270 void __iomem *usb_base;
273 void __iomem *usbother_base; 271 void __iomem *usbother_base;
274 272
275 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 273 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
276 if (!usb_base) 274 if (!usb_base)
277 return -ENOMEM; 275 return -ENOMEM;
278 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; 276 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
@@ -288,17 +286,17 @@ static int initialize_usbh1_port(struct platform_device *pdev)
288 MXC_EHCI_ITC_NO_THRESHOLD); 286 MXC_EHCI_ITC_NO_THRESHOLD);
289} 287}
290 288
291static struct mxc_usbh_platform_data dr_utmi_config = { 289static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
292 .init = initialize_otg_port, 290 .init = initialize_otg_port,
293 .portsc = MXC_EHCI_UTMI_16BIT, 291 .portsc = MXC_EHCI_UTMI_16BIT,
294}; 292};
295 293
296static struct fsl_usb2_platform_data usb_pdata = { 294static const struct fsl_usb2_platform_data usb_pdata __initconst = {
297 .operating_mode = FSL_USB2_DR_DEVICE, 295 .operating_mode = FSL_USB2_DR_DEVICE,
298 .phy_mode = FSL_USB2_PHY_UTMI_WIDE, 296 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
299}; 297};
300 298
301static struct mxc_usbh_platform_data usbh1_config = { 299static const struct mxc_usbh_platform_data usbh1_config __initconst = {
302 .init = initialize_usbh1_port, 300 .init = initialize_usbh1_port,
303 .portsc = MXC_EHCI_MODE_ULPI, 301 .portsc = MXC_EHCI_MODE_ULPI,
304}; 302};
@@ -351,22 +349,27 @@ static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = {
351 .wp_type = ESDHC_WP_GPIO, 349 .wp_type = ESDHC_WP_GPIO,
352}; 350};
353 351
352void __init imx51_babbage_common_init(void)
353{
354 mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
355 ARRAY_SIZE(mx51babbage_pads));
356}
357
354/* 358/*
355 * Board specific initialization. 359 * Board specific initialization.
356 */ 360 */
357static void __init mx51_babbage_init(void) 361static void __init mx51_babbage_init(void)
358{ 362{
359 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; 363 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
360 iomux_v3_cfg_t power_key = _MX51_PAD_EIM_A27__GPIO2_21 | 364 iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21,
361 MUX_PAD_CTRL(PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); 365 PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP);
362 366
363 imx51_soc_init(); 367 imx51_soc_init();
364 368
365#if defined(CONFIG_CPU_FREQ_IMX) 369#if defined(CONFIG_CPU_FREQ_IMX)
366 get_cpu_op = mx51_get_cpu_op; 370 get_cpu_op = mx51_get_cpu_op;
367#endif 371#endif
368 mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, 372 imx51_babbage_common_init();
369 ARRAY_SIZE(mx51babbage_pads));
370 373
371 imx51_add_imx_uart(0, &uart_pdata); 374 imx51_add_imx_uart(0, &uart_pdata);
372 imx51_add_imx_uart(1, NULL); 375 imx51_add_imx_uart(1, NULL);
@@ -381,17 +384,17 @@ static void __init mx51_babbage_init(void)
381 384
382 imx51_add_imx_i2c(0, &babbage_i2c_data); 385 imx51_add_imx_i2c(0, &babbage_i2c_data);
383 imx51_add_imx_i2c(1, &babbage_i2c_data); 386 imx51_add_imx_i2c(1, &babbage_i2c_data);
384 mxc_register_device(&mxc_hsi2c_device, &babbage_hsi2c_data); 387 imx51_add_hsi2c(&babbage_hsi2c_data);
385 388
386 if (otg_mode_host) 389 if (otg_mode_host)
387 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 390 imx51_add_mxc_ehci_otg(&dr_utmi_config);
388 else { 391 else {
389 initialize_otg_port(NULL); 392 initialize_otg_port(NULL);
390 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata); 393 imx51_add_fsl_usb2_udc(&usb_pdata);
391 } 394 }
392 395
393 gpio_usbh1_active(); 396 gpio_usbh1_active();
394 mxc_register_device(&mxc_usbh1_device, &usbh1_config); 397 imx51_add_mxc_ehci_hs(1, &usbh1_config);
395 /* setback USBH1_STP to be function */ 398 /* setback USBH1_STP to be function */
396 mxc_iomux_v3_setup_pad(usbh1stp); 399 mxc_iomux_v3_setup_pad(usbh1stp);
397 babbage_usbhub_reset(); 400 babbage_usbhub_reset();
@@ -420,6 +423,7 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
420 .map_io = mx51_map_io, 423 .map_io = mx51_map_io,
421 .init_early = imx51_init_early, 424 .init_early = imx51_init_early,
422 .init_irq = mx51_init_irq, 425 .init_irq = mx51_init_irq,
426 .handle_irq = imx51_handle_irq,
423 .timer = &mx51_babbage_timer, 427 .timer = &mx51_babbage_timer,
424 .init_machine = mx51_babbage_init, 428 .init_machine = mx51_babbage_init,
425MACHINE_END 429MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index c36880da03f0..a9e48662cf75 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -32,14 +32,12 @@
32#include <mach/hardware.h> 32#include <mach/hardware.h>
33#include <mach/iomux-mx51.h> 33#include <mach/iomux-mx51.h>
34 34
35#include <asm/irq.h>
36#include <asm/setup.h> 35#include <asm/setup.h>
37#include <asm/mach-types.h> 36#include <asm/mach-types.h>
38#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
39#include <asm/mach/time.h> 38#include <asm/mach/time.h>
40 39
41#include "devices-imx51.h" 40#include "devices-imx51.h"
42#include "devices.h"
43#include "efika.h" 41#include "efika.h"
44 42
45#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16) 43#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16)
@@ -163,6 +161,11 @@ static const struct gpio_led_platform_data
163 .num_leds = ARRAY_SIZE(mx51_efikamx_leds), 161 .num_leds = ARRAY_SIZE(mx51_efikamx_leds),
164}; 162};
165 163
164static struct esdhc_platform_data sd_pdata = {
165 .cd_type = ESDHC_CD_CONTROLLER,
166 .wp_type = ESDHC_WP_CONTROLLER,
167};
168
166static struct gpio_keys_button mx51_efikamx_powerkey[] = { 169static struct gpio_keys_button mx51_efikamx_powerkey[] = {
167 { 170 {
168 .code = KEY_POWER, 171 .code = KEY_POWER,
@@ -239,9 +242,11 @@ static void __init mx51_efikamx_init(void)
239 242
240 /* on < 1.2 boards both SD controllers are used */ 243 /* on < 1.2 boards both SD controllers are used */
241 if (system_rev < 0x12) { 244 if (system_rev < 0x12) {
242 imx51_add_sdhci_esdhc_imx(1, NULL); 245 imx51_add_sdhci_esdhc_imx(0, NULL);
246 imx51_add_sdhci_esdhc_imx(1, &sd_pdata);
243 mx51_efikamx_leds[2].default_trigger = "mmc1"; 247 mx51_efikamx_leds[2].default_trigger = "mmc1";
244 } 248 } else
249 imx51_add_sdhci_esdhc_imx(0, &sd_pdata);
245 250
246 gpio_led_register_device(-1, &mx51_efikamx_leds_data); 251 gpio_led_register_device(-1, &mx51_efikamx_leds_data);
247 imx_add_gpio_keys(&mx51_efikamx_powerkey_data); 252 imx_add_gpio_keys(&mx51_efikamx_powerkey_data);
@@ -284,6 +289,7 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
284 .map_io = mx51_map_io, 289 .map_io = mx51_map_io,
285 .init_early = imx51_init_early, 290 .init_early = imx51_init_early,
286 .init_irq = mx51_init_irq, 291 .init_irq = mx51_init_irq,
292 .handle_irq = imx51_handle_irq,
287 .timer = &mx51_efikamx_timer, 293 .timer = &mx51_efikamx_timer,
288 .init_machine = mx51_efikamx_init, 294 .init_machine = mx51_efikamx_init,
289MACHINE_END 295MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index ba5436a9fb1a..38c4a3e28d3c 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -35,14 +35,12 @@
35#include <mach/hardware.h> 35#include <mach/hardware.h>
36#include <mach/iomux-mx51.h> 36#include <mach/iomux-mx51.h>
37 37
38#include <asm/irq.h>
39#include <asm/setup.h> 38#include <asm/setup.h>
40#include <asm/mach-types.h> 39#include <asm/mach-types.h>
41#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
42#include <asm/mach/time.h> 41#include <asm/mach/time.h>
43 42
44#include "devices-imx51.h" 43#include "devices-imx51.h"
45#include "devices.h"
46#include "efika.h" 44#include "efika.h"
47 45
48#define EFIKASB_USBH2_STP IMX_GPIO_NR(2, 20) 46#define EFIKASB_USBH2_STP IMX_GPIO_NR(2, 20)
@@ -56,6 +54,7 @@
56#define EFIKASB_RFKILL IMX_GPIO_NR(3, 1) 54#define EFIKASB_RFKILL IMX_GPIO_NR(3, 1)
57 55
58#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE) 56#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
57#define MX51_PAD_SD1_CD IOMUX_PAD(0x47c, 0x0e8, 1, __NA_, 0, MX51_ESDHC_PAD_CTRL)
59 58
60static iomux_v3_cfg_t mx51efikasb_pads[] = { 59static iomux_v3_cfg_t mx51efikasb_pads[] = {
61 /* USB HOST2 */ 60 /* USB HOST2 */
@@ -97,6 +96,8 @@ static iomux_v3_cfg_t mx51efikasb_pads[] = {
97 96
98 /* BT */ 97 /* BT */
99 MX51_PAD_EIM_A17__GPIO2_11, 98 MX51_PAD_EIM_A17__GPIO2_11,
99
100 MX51_PAD_SD1_CD,
100}; 101};
101 102
102static int initialize_usbh2_port(struct platform_device *pdev) 103static int initialize_usbh2_port(struct platform_device *pdev)
@@ -119,7 +120,7 @@ static int initialize_usbh2_port(struct platform_device *pdev)
119 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD); 120 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD);
120} 121}
121 122
122static struct mxc_usbh_platform_data usbh2_config = { 123static struct mxc_usbh_platform_data usbh2_config __initdata = {
123 .init = initialize_usbh2_port, 124 .init = initialize_usbh2_port,
124 .portsc = MXC_EHCI_MODE_ULPI, 125 .portsc = MXC_EHCI_MODE_ULPI,
125}; 126};
@@ -129,7 +130,7 @@ static void __init mx51_efikasb_usb(void)
129 usbh2_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | 130 usbh2_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
130 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND); 131 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND);
131 if (usbh2_config.otg) 132 if (usbh2_config.otg)
132 mxc_register_device(&mxc_usbh2_device, &usbh2_config); 133 imx51_add_mxc_ehci_hs(2, &usbh2_config);
133} 134}
134 135
135static const struct gpio_led mx51_efikasb_leds[] __initconst = { 136static const struct gpio_led mx51_efikasb_leds[] __initconst = {
@@ -182,6 +183,18 @@ static const struct gpio_keys_platform_data mx51_efikasb_keys_data __initconst =
182 .nbuttons = ARRAY_SIZE(mx51_efikasb_keys), 183 .nbuttons = ARRAY_SIZE(mx51_efikasb_keys),
183}; 184};
184 185
186static struct esdhc_platform_data sd0_pdata = {
187#define EFIKASB_SD1_CD IMX_GPIO_NR(2, 27)
188 .cd_gpio = EFIKASB_SD1_CD,
189 .cd_type = ESDHC_CD_GPIO,
190 .wp_type = ESDHC_WP_CONTROLLER,
191};
192
193static struct esdhc_platform_data sd1_pdata = {
194 .cd_type = ESDHC_CD_CONTROLLER,
195 .wp_type = ESDHC_WP_CONTROLLER,
196};
197
185static struct regulator *pwgt1, *pwgt2; 198static struct regulator *pwgt1, *pwgt2;
186 199
187static void mx51_efikasb_power_off(void) 200static void mx51_efikasb_power_off(void)
@@ -250,7 +263,8 @@ static void __init efikasb_board_init(void)
250 263
251 mx51_efikasb_board_id(); 264 mx51_efikasb_board_id();
252 mx51_efikasb_usb(); 265 mx51_efikasb_usb();
253 imx51_add_sdhci_esdhc_imx(1, NULL); 266 imx51_add_sdhci_esdhc_imx(0, &sd0_pdata);
267 imx51_add_sdhci_esdhc_imx(1, &sd1_pdata);
254 268
255 gpio_led_register_device(-1, &mx51_efikasb_leds_data); 269 gpio_led_register_device(-1, &mx51_efikasb_leds_data);
256 imx_add_gpio_keys(&mx51_efikasb_keys_data); 270 imx_add_gpio_keys(&mx51_efikasb_keys_data);
@@ -270,6 +284,7 @@ MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook")
270 .map_io = mx51_map_io, 284 .map_io = mx51_map_io,
271 .init_early = imx51_init_early, 285 .init_early = imx51_init_early,
272 .init_irq = mx51_init_irq, 286 .init_irq = mx51_init_irq,
287 .handle_irq = imx51_handle_irq,
273 .init_machine = efikasb_board_init, 288 .init_machine = efikasb_board_init,
274 .timer = &mx51_efikasb_timer, 289 .timer = &mx51_efikasb_timer,
275MACHINE_END 290MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
index 76a67c4a2a0b..0d7f0fffb23a 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -134,8 +134,8 @@ static struct resource ard_smsc911x_resources[] = {
134 .flags = IORESOURCE_MEM, 134 .flags = IORESOURCE_MEM,
135 }, 135 },
136 { 136 {
137 .start = gpio_to_irq(ARD_ETHERNET_INT_B), 137 .start = IMX_GPIO_TO_IRQ(ARD_ETHERNET_INT_B),
138 .end = gpio_to_irq(ARD_ETHERNET_INT_B), 138 .end = IMX_GPIO_TO_IRQ(ARD_ETHERNET_INT_B),
139 .flags = IORESOURCE_IRQ, 139 .flags = IORESOURCE_IRQ,
140 }, 140 },
141}; 141};
@@ -171,9 +171,6 @@ static struct imxi2c_platform_data mx53_ard_i2c3_data = {
171 171
172static void __init mx53_ard_io_init(void) 172static void __init mx53_ard_io_init(void)
173{ 173{
174 mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
175 ARRAY_SIZE(mx53_ard_pads));
176
177 gpio_request(ARD_ETHERNET_INT_B, "eth-int-b"); 174 gpio_request(ARD_ETHERNET_INT_B, "eth-int-b");
178 gpio_direction_input(ARD_ETHERNET_INT_B); 175 gpio_direction_input(ARD_ETHERNET_INT_B);
179 176
@@ -216,6 +213,13 @@ static int weim_cs_config(void)
216 return 0; 213 return 0;
217} 214}
218 215
216void __init imx53_ard_common_init(void)
217{
218 mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
219 ARRAY_SIZE(mx53_ard_pads));
220 weim_cs_config();
221}
222
219static struct platform_device *devices[] __initdata = { 223static struct platform_device *devices[] __initdata = {
220 &ard_smsc_lan9220_device, 224 &ard_smsc_lan9220_device,
221}; 225};
@@ -225,8 +229,8 @@ static void __init mx53_ard_board_init(void)
225 imx53_soc_init(); 229 imx53_soc_init();
226 imx53_add_imx_uart(0, NULL); 230 imx53_add_imx_uart(0, NULL);
227 231
232 imx53_ard_common_init();
228 mx53_ard_io_init(); 233 mx53_ard_io_init();
229 weim_cs_config();
230 platform_add_devices(devices, ARRAY_SIZE(devices)); 234 platform_add_devices(devices, ARRAY_SIZE(devices));
231 235
232 imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); 236 imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
@@ -234,6 +238,7 @@ static void __init mx53_ard_board_init(void)
234 imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); 238 imx53_add_imx_i2c(1, &mx53_ard_i2c2_data);
235 imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); 239 imx53_add_imx_i2c(2, &mx53_ard_i2c3_data);
236 imx_add_gpio_keys(&ard_button_data); 240 imx_add_gpio_keys(&ard_button_data);
241 imx53_add_ahci_imx();
237} 242}
238 243
239static void __init mx53_ard_timer_init(void) 244static void __init mx53_ard_timer_init(void)
@@ -249,6 +254,7 @@ MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
249 .map_io = mx53_map_io, 254 .map_io = mx53_map_io,
250 .init_early = imx53_init_early, 255 .init_early = imx53_init_early,
251 .init_irq = mx53_init_irq, 256 .init_irq = mx53_init_irq,
257 .handle_irq = imx53_handle_irq,
252 .timer = &mx53_ard_timer, 258 .timer = &mx53_ard_timer,
253 .init_machine = mx53_ard_board_init, 259 .init_machine = mx53_ard_board_init,
254MACHINE_END 260MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 1b417b06b736..6bea31ab8f85 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -131,12 +131,17 @@ static const struct spi_imx_master mx53_evk_spi_data __initconst = {
131 .num_chipselect = ARRAY_SIZE(mx53_evk_spi_cs), 131 .num_chipselect = ARRAY_SIZE(mx53_evk_spi_cs),
132}; 132};
133 133
134void __init imx53_evk_common_init(void)
135{
136 mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads,
137 ARRAY_SIZE(mx53_evk_pads));
138}
139
134static void __init mx53_evk_board_init(void) 140static void __init mx53_evk_board_init(void)
135{ 141{
136 imx53_soc_init(); 142 imx53_soc_init();
143 imx53_evk_common_init();
137 144
138 mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads,
139 ARRAY_SIZE(mx53_evk_pads));
140 mx53_evk_init_uart(); 145 mx53_evk_init_uart();
141 mx53_evk_fec_reset(); 146 mx53_evk_fec_reset();
142 imx53_add_fec(&mx53_evk_fec_pdata); 147 imx53_add_fec(&mx53_evk_fec_pdata);
@@ -167,6 +172,7 @@ MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board")
167 .map_io = mx53_map_io, 172 .map_io = mx53_map_io,
168 .init_early = imx53_init_early, 173 .init_early = imx53_init_early,
169 .init_irq = mx53_init_irq, 174 .init_irq = mx53_init_irq,
175 .handle_irq = imx53_handle_irq,
170 .timer = &mx53_evk_timer, 176 .timer = &mx53_evk_timer,
171 .init_machine = mx53_evk_board_init, 177 .init_machine = mx53_evk_board_init,
172MACHINE_END 178MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 4e1d51d252dc..7678f7734db6 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -22,6 +22,7 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/i2c.h>
25 26
26#include <mach/common.h> 27#include <mach/common.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
@@ -42,6 +43,7 @@
42#define LOCO_SD3_CD IMX_GPIO_NR(3, 11) 43#define LOCO_SD3_CD IMX_GPIO_NR(3, 11)
43#define LOCO_SD3_WP IMX_GPIO_NR(3, 12) 44#define LOCO_SD3_WP IMX_GPIO_NR(3, 12)
44#define LOCO_SD1_CD IMX_GPIO_NR(3, 13) 45#define LOCO_SD1_CD IMX_GPIO_NR(3, 13)
46#define LOCO_ACCEL_EN IMX_GPIO_NR(6, 14)
45 47
46static iomux_v3_cfg_t mx53_loco_pads[] = { 48static iomux_v3_cfg_t mx53_loco_pads[] = {
47 /* FEC */ 49 /* FEC */
@@ -64,6 +66,10 @@ static iomux_v3_cfg_t mx53_loco_pads[] = {
64 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD, 66 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD,
65 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS, 67 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS,
66 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD, 68 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD,
69 /* I2C1 */
70 MX53_PAD_CSI0_DAT8__I2C1_SDA,
71 MX53_PAD_CSI0_DAT9__I2C1_SCL,
72 MX53_PAD_NANDF_CS1__GPIO6_14, /* Accelerometer Enable */
67 /* I2C2 */ 73 /* I2C2 */
68 MX53_PAD_KEY_COL3__I2C2_SCL, 74 MX53_PAD_KEY_COL3__I2C2_SCL,
69 MX53_PAD_KEY_ROW3__I2C2_SDA, 75 MX53_PAD_KEY_ROW3__I2C2_SDA,
@@ -257,22 +263,42 @@ static const struct gpio_led_platform_data mx53loco_leds_data __initconst = {
257 .num_leds = ARRAY_SIZE(mx53loco_leds), 263 .num_leds = ARRAY_SIZE(mx53loco_leds),
258}; 264};
259 265
266void __init imx53_qsb_common_init(void)
267{
268 mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads,
269 ARRAY_SIZE(mx53_loco_pads));
270}
271
272static struct i2c_board_info mx53loco_i2c_devices[] = {
273 {
274 I2C_BOARD_INFO("mma8450", 0x1C),
275 },
276};
277
260static void __init mx53_loco_board_init(void) 278static void __init mx53_loco_board_init(void)
261{ 279{
280 int ret;
262 imx53_soc_init(); 281 imx53_soc_init();
282 imx53_qsb_common_init();
263 283
264 mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads,
265 ARRAY_SIZE(mx53_loco_pads));
266 imx53_add_imx_uart(0, NULL); 284 imx53_add_imx_uart(0, NULL);
267 mx53_loco_fec_reset(); 285 mx53_loco_fec_reset();
268 imx53_add_fec(&mx53_loco_fec_data); 286 imx53_add_fec(&mx53_loco_fec_data);
269 imx53_add_imx2_wdt(0, NULL); 287 imx53_add_imx2_wdt(0, NULL);
288
289 ret = gpio_request_one(LOCO_ACCEL_EN, GPIOF_OUT_INIT_HIGH, "accel_en");
290 if (ret)
291 pr_err("Cannot request ACCEL_EN pin: %d\n", ret);
292
293 i2c_register_board_info(0, mx53loco_i2c_devices,
294 ARRAY_SIZE(mx53loco_i2c_devices));
270 imx53_add_imx_i2c(0, &mx53_loco_i2c_data); 295 imx53_add_imx_i2c(0, &mx53_loco_i2c_data);
271 imx53_add_imx_i2c(1, &mx53_loco_i2c_data); 296 imx53_add_imx_i2c(1, &mx53_loco_i2c_data);
272 imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data); 297 imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data);
273 imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data); 298 imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data);
274 imx_add_gpio_keys(&loco_button_data); 299 imx_add_gpio_keys(&loco_button_data);
275 gpio_led_register_device(-1, &mx53loco_leds_data); 300 gpio_led_register_device(-1, &mx53loco_leds_data);
301 imx53_add_ahci_imx();
276} 302}
277 303
278static void __init mx53_loco_timer_init(void) 304static void __init mx53_loco_timer_init(void)
@@ -288,6 +314,7 @@ MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board")
288 .map_io = mx53_map_io, 314 .map_io = mx53_map_io,
289 .init_early = imx53_init_early, 315 .init_early = imx53_init_early,
290 .init_irq = mx53_init_irq, 316 .init_irq = mx53_init_irq,
317 .handle_irq = imx53_handle_irq,
291 .timer = &mx53_loco_timer, 318 .timer = &mx53_loco_timer,
292 .init_machine = mx53_loco_board_init, 319 .init_machine = mx53_loco_board_init,
293MACHINE_END 320MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index bc02894eafef..59c0845eb4a6 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -35,6 +35,7 @@
35#include "devices-imx53.h" 35#include "devices-imx53.h"
36 36
37#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) 37#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6)
38#define MX53_SMD_SATA_PWR_EN IMX_GPIO_NR(3, 3)
38 39
39static iomux_v3_cfg_t mx53_smd_pads[] = { 40static iomux_v3_cfg_t mx53_smd_pads[] = {
40 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, 41 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
@@ -111,12 +112,30 @@ static const struct imxi2c_platform_data mx53_smd_i2c_data __initconst = {
111 .bitrate = 100000, 112 .bitrate = 100000,
112}; 113};
113 114
115static inline void mx53_smd_ahci_pwr_on(void)
116{
117 int ret;
118
119 /* Enable SATA PWR */
120 ret = gpio_request_one(MX53_SMD_SATA_PWR_EN,
121 GPIOF_DIR_OUT | GPIOF_INIT_HIGH, "ahci-sata-pwr");
122 if (ret) {
123 pr_err("failed to enable SATA_PWR_EN: %d\n", ret);
124 return;
125 }
126}
127
128void __init imx53_smd_common_init(void)
129{
130 mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads,
131 ARRAY_SIZE(mx53_smd_pads));
132}
133
114static void __init mx53_smd_board_init(void) 134static void __init mx53_smd_board_init(void)
115{ 135{
116 imx53_soc_init(); 136 imx53_soc_init();
137 imx53_smd_common_init();
117 138
118 mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads,
119 ARRAY_SIZE(mx53_smd_pads));
120 mx53_smd_init_uart(); 139 mx53_smd_init_uart();
121 mx53_smd_fec_reset(); 140 mx53_smd_fec_reset();
122 imx53_add_fec(&mx53_smd_fec_data); 141 imx53_add_fec(&mx53_smd_fec_data);
@@ -125,6 +144,8 @@ static void __init mx53_smd_board_init(void)
125 imx53_add_sdhci_esdhc_imx(0, NULL); 144 imx53_add_sdhci_esdhc_imx(0, NULL);
126 imx53_add_sdhci_esdhc_imx(1, NULL); 145 imx53_add_sdhci_esdhc_imx(1, NULL);
127 imx53_add_sdhci_esdhc_imx(2, NULL); 146 imx53_add_sdhci_esdhc_imx(2, NULL);
147 mx53_smd_ahci_pwr_on();
148 imx53_add_ahci_imx();
128} 149}
129 150
130static void __init mx53_smd_timer_init(void) 151static void __init mx53_smd_timer_init(void)
@@ -140,6 +161,7 @@ MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board")
140 .map_io = mx53_map_io, 161 .map_io = mx53_map_io,
141 .init_early = imx53_init_early, 162 .init_early = imx53_init_early,
142 .init_irq = mx53_init_irq, 163 .init_irq = mx53_init_irq,
164 .handle_irq = imx53_handle_irq,
143 .timer = &mx53_smd_timer, 165 .timer = &mx53_smd_timer,
144 .init_machine = mx53_smd_board_init, 166 .init_machine = mx53_smd_board_init,
145MACHINE_END 167MACHINE_END
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index f7bf996f463b..2aacf41c48e7 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -15,6 +15,7 @@
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/clkdev.h> 17#include <linux/clkdev.h>
18#include <linux/of.h>
18 19
19#include <asm/div64.h> 20#include <asm/div64.h>
20 21
@@ -1401,6 +1402,22 @@ static struct clk esdhc4_mx53_clk = {
1401 .secondary = &esdhc4_ipg_clk, 1402 .secondary = &esdhc4_ipg_clk,
1402}; 1403};
1403 1404
1405static struct clk sata_clk = {
1406 .parent = &ipg_clk,
1407 .enable = _clk_max_enable,
1408 .enable_reg = MXC_CCM_CCGR4,
1409 .enable_shift = MXC_CCM_CCGRx_CG1_OFFSET,
1410 .disable = _clk_max_disable,
1411};
1412
1413static struct clk ahci_phy_clk = {
1414 .parent = &usb_phy1_clk,
1415};
1416
1417static struct clk ahci_dma_clk = {
1418 .parent = &ahb_clk,
1419};
1420
1404DEFINE_CLOCK(mipi_esc_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, NULL, &pll2_sw_clk); 1421DEFINE_CLOCK(mipi_esc_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG5_OFFSET, NULL, NULL, NULL, &pll2_sw_clk);
1405DEFINE_CLOCK(mipi_hsc2_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG4_OFFSET, NULL, NULL, &mipi_esc_clk, &pll2_sw_clk); 1422DEFINE_CLOCK(mipi_hsc2_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG4_OFFSET, NULL, NULL, &mipi_esc_clk, &pll2_sw_clk);
1406DEFINE_CLOCK(mipi_hsc1_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG3_OFFSET, NULL, NULL, &mipi_hsc2_clk, &pll2_sw_clk); 1423DEFINE_CLOCK(mipi_hsc1_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG3_OFFSET, NULL, NULL, &mipi_hsc2_clk, &pll2_sw_clk);
@@ -1418,6 +1435,10 @@ DEFINE_CLOCK(ipu_di0_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG5_OFFSET,
1418DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET, 1435DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET,
1419 NULL, NULL, &pll3_sw_clk, NULL); 1436 NULL, NULL, &pll3_sw_clk, NULL);
1420 1437
1438/* PATA */
1439DEFINE_CLOCK(pata_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG0_OFFSET,
1440 NULL, NULL, &ipg_clk, &spba_clk);
1441
1421#define _REGISTER_CLOCK(d, n, c) \ 1442#define _REGISTER_CLOCK(d, n, c) \
1422 { \ 1443 { \
1423 .dev_id = d, \ 1444 .dev_id = d, \
@@ -1474,6 +1495,7 @@ static struct clk_lookup mx51_lookups[] = {
1474 _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk) 1495 _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)
1475 _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk) 1496 _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)
1476 _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk) 1497 _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk)
1498 _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
1477}; 1499};
1478 1500
1479static struct clk_lookup mx53_lookups[] = { 1501static struct clk_lookup mx53_lookups[] = {
@@ -1507,6 +1529,10 @@ static struct clk_lookup mx53_lookups[] = {
1507 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) 1529 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
1508 _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) 1530 _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
1509 _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk) 1531 _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)
1532 _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
1533 _REGISTER_CLOCK("imx53-ahci.0", "ahci", sata_clk)
1534 _REGISTER_CLOCK("imx53-ahci.0", "ahci_phy", ahci_phy_clk)
1535 _REGISTER_CLOCK("imx53-ahci.0", "ahci_dma", ahci_dma_clk)
1510}; 1536};
1511 1537
1512static void clk_tree_init(void) 1538static void clk_tree_init(void)
@@ -1548,9 +1574,8 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
1548 clk_enable(&main_bus_clk); 1574 clk_enable(&main_bus_clk);
1549 1575
1550 clk_enable(&iim_clk); 1576 clk_enable(&iim_clk);
1551 mx51_revision(); 1577 imx_print_silicon_rev("i.MX51", mx51_revision());
1552 clk_disable(&iim_clk); 1578 clk_disable(&iim_clk);
1553 mx51_display_revision();
1554 1579
1555 /* move usb_phy_clk to 24MHz */ 1580 /* move usb_phy_clk to 24MHz */
1556 clk_set_parent(&usb_phy1_clk, &osc_clk); 1581 clk_set_parent(&usb_phy1_clk, &osc_clk);
@@ -1568,7 +1593,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
1568 1593
1569 /* System timer */ 1594 /* System timer */
1570 mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), 1595 mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),
1571 MX51_MXC_INT_GPT); 1596 MX51_INT_GPT);
1572 return 0; 1597 return 0;
1573} 1598}
1574 1599
@@ -1592,9 +1617,8 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
1592 clk_enable(&main_bus_clk); 1617 clk_enable(&main_bus_clk);
1593 1618
1594 clk_enable(&iim_clk); 1619 clk_enable(&iim_clk);
1595 mx53_revision(); 1620 imx_print_silicon_rev("i.MX53", mx53_revision());
1596 clk_disable(&iim_clk); 1621 clk_disable(&iim_clk);
1597 mx53_display_revision();
1598 1622
1599 /* Set SDHC parents to be PLL2 */ 1623 /* Set SDHC parents to be PLL2 */
1600 clk_set_parent(&esdhc1_clk, &pll2_sw_clk); 1624 clk_set_parent(&esdhc1_clk, &pll2_sw_clk);
@@ -1609,3 +1633,41 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
1609 MX53_INT_GPT); 1633 MX53_INT_GPT);
1610 return 0; 1634 return 0;
1611} 1635}
1636
1637static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,
1638 unsigned long *ckih1, unsigned long *ckih2)
1639{
1640 struct device_node *np;
1641
1642 /* retrieve the freqency of fixed clocks from device tree */
1643 for_each_compatible_node(np, NULL, "fixed-clock") {
1644 u32 rate;
1645 if (of_property_read_u32(np, "clock-frequency", &rate))
1646 continue;
1647
1648 if (of_device_is_compatible(np, "fsl,imx-ckil"))
1649 *ckil = rate;
1650 else if (of_device_is_compatible(np, "fsl,imx-osc"))
1651 *osc = rate;
1652 else if (of_device_is_compatible(np, "fsl,imx-ckih1"))
1653 *ckih1 = rate;
1654 else if (of_device_is_compatible(np, "fsl,imx-ckih2"))
1655 *ckih2 = rate;
1656 }
1657}
1658
1659int __init mx51_clocks_init_dt(void)
1660{
1661 unsigned long ckil, osc, ckih1, ckih2;
1662
1663 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
1664 return mx51_clocks_init(ckil, osc, ckih1, ckih2);
1665}
1666
1667int __init mx53_clocks_init_dt(void)
1668{
1669 unsigned long ckil, osc, ckih1, ckih2;
1670
1671 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
1672 return mx53_clocks_init(ckil, osc, ckih1, ckih2);
1673}
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 86f87da59c64..5c5328257dca 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -18,7 +18,7 @@
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19#include <asm/io.h> 19#include <asm/io.h>
20 20
21static int cpu_silicon_rev = -1; 21static int mx5_cpu_rev = -1;
22 22
23#define IIM_SREV 0x24 23#define IIM_SREV 0x24
24#define MX50_HW_ADADIG_DIGPROG 0xB0 24#define MX50_HW_ADADIG_DIGPROG 0xB0
@@ -28,11 +28,14 @@ static int get_mx51_srev(void)
28 void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR); 28 void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR);
29 u32 rev = readl(iim_base + IIM_SREV) & 0xff; 29 u32 rev = readl(iim_base + IIM_SREV) & 0xff;
30 30
31 if (rev == 0x0) 31 switch (rev) {
32 case 0x0:
32 return IMX_CHIP_REVISION_2_0; 33 return IMX_CHIP_REVISION_2_0;
33 else if (rev == 0x10) 34 case 0x10:
34 return IMX_CHIP_REVISION_3_0; 35 return IMX_CHIP_REVISION_3_0;
35 return 0; 36 default:
37 return IMX_CHIP_REVISION_UNKNOWN;
38 }
36} 39}
37 40
38/* 41/*
@@ -45,33 +48,13 @@ int mx51_revision(void)
45 if (!cpu_is_mx51()) 48 if (!cpu_is_mx51())
46 return -EINVAL; 49 return -EINVAL;
47 50
48 if (cpu_silicon_rev == -1) 51 if (mx5_cpu_rev == -1)
49 cpu_silicon_rev = get_mx51_srev(); 52 mx5_cpu_rev = get_mx51_srev();
50 53
51 return cpu_silicon_rev; 54 return mx5_cpu_rev;
52} 55}
53EXPORT_SYMBOL(mx51_revision); 56EXPORT_SYMBOL(mx51_revision);
54 57
55void mx51_display_revision(void)
56{
57 int rev;
58 char *srev;
59 rev = mx51_revision();
60
61 switch (rev) {
62 case IMX_CHIP_REVISION_2_0:
63 srev = IMX_CHIP_REVISION_2_0_STRING;
64 break;
65 case IMX_CHIP_REVISION_3_0:
66 srev = IMX_CHIP_REVISION_3_0_STRING;
67 break;
68 default:
69 srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
70 }
71 printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev);
72}
73EXPORT_SYMBOL(mx51_display_revision);
74
75#ifdef CONFIG_NEON 58#ifdef CONFIG_NEON
76 59
77/* 60/*
@@ -121,10 +104,10 @@ int mx53_revision(void)
121 if (!cpu_is_mx53()) 104 if (!cpu_is_mx53())
122 return -EINVAL; 105 return -EINVAL;
123 106
124 if (cpu_silicon_rev == -1) 107 if (mx5_cpu_rev == -1)
125 cpu_silicon_rev = get_mx53_srev(); 108 mx5_cpu_rev = get_mx53_srev();
126 109
127 return cpu_silicon_rev; 110 return mx5_cpu_rev;
128} 111}
129EXPORT_SYMBOL(mx53_revision); 112EXPORT_SYMBOL(mx53_revision);
130 113
@@ -134,7 +117,7 @@ static int get_mx50_srev(void)
134 u32 rev; 117 u32 rev;
135 118
136 if (!anatop) { 119 if (!anatop) {
137 cpu_silicon_rev = -EINVAL; 120 mx5_cpu_rev = -EINVAL;
138 return 0; 121 return 0;
139 } 122 }
140 123
@@ -159,36 +142,13 @@ int mx50_revision(void)
159 if (!cpu_is_mx50()) 142 if (!cpu_is_mx50())
160 return -EINVAL; 143 return -EINVAL;
161 144
162 if (cpu_silicon_rev == -1) 145 if (mx5_cpu_rev == -1)
163 cpu_silicon_rev = get_mx50_srev(); 146 mx5_cpu_rev = get_mx50_srev();
164 147
165 return cpu_silicon_rev; 148 return mx5_cpu_rev;
166} 149}
167EXPORT_SYMBOL(mx50_revision); 150EXPORT_SYMBOL(mx50_revision);
168 151
169void mx53_display_revision(void)
170{
171 int rev;
172 char *srev;
173 rev = mx53_revision();
174
175 switch (rev) {
176 case IMX_CHIP_REVISION_1_0:
177 srev = IMX_CHIP_REVISION_1_0_STRING;
178 break;
179 case IMX_CHIP_REVISION_2_0:
180 srev = IMX_CHIP_REVISION_2_0_STRING;
181 break;
182 case IMX_CHIP_REVISION_2_1:
183 srev = IMX_CHIP_REVISION_2_1_STRING;
184 break;
185 default:
186 srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
187 }
188 printk(KERN_INFO "CPU identified as i.MX53, silicon rev %s\n", srev);
189}
190EXPORT_SYMBOL(mx53_display_revision);
191
192static int __init post_cpu_init(void) 152static int __init post_cpu_init(void)
193{ 153{
194 unsigned int reg; 154 unsigned int reg;
diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h
index e11bc0e0ec49..af488bc0e225 100644
--- a/arch/arm/mach-mx5/devices-imx51.h
+++ b/arch/arm/mach-mx5/devices-imx51.h
@@ -13,9 +13,15 @@ extern const struct imx_fec_data imx51_fec_data;
13#define imx51_add_fec(pdata) \ 13#define imx51_add_fec(pdata) \
14 imx_add_fec(&imx51_fec_data, pdata) 14 imx_add_fec(&imx51_fec_data, pdata)
15 15
16extern const struct imx_fsl_usb2_udc_data imx51_fsl_usb2_udc_data;
17#define imx51_add_fsl_usb2_udc(pdata) \
18 imx_add_fsl_usb2_udc(&imx51_fsl_usb2_udc_data, pdata)
19
16extern const struct imx_imx_i2c_data imx51_imx_i2c_data[]; 20extern const struct imx_imx_i2c_data imx51_imx_i2c_data[];
17#define imx51_add_imx_i2c(id, pdata) \ 21#define imx51_add_imx_i2c(id, pdata) \
18 imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata) 22 imx_add_imx_i2c(&imx51_imx_i2c_data[id], pdata)
23#define imx51_add_hsi2c(pdata) \
24 imx51_add_imx_i2c(2, pdata)
19 25
20extern const struct imx_imx_ssi_data imx51_imx_ssi_data[]; 26extern const struct imx_imx_ssi_data imx51_imx_ssi_data[];
21#define imx51_add_imx_ssi(id, pdata) \ 27#define imx51_add_imx_ssi(id, pdata) \
@@ -25,6 +31,13 @@ extern const struct imx_imx_uart_1irq_data imx51_imx_uart_data[];
25#define imx51_add_imx_uart(id, pdata) \ 31#define imx51_add_imx_uart(id, pdata) \
26 imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata) 32 imx_add_imx_uart_1irq(&imx51_imx_uart_data[id], pdata)
27 33
34extern const struct imx_mxc_ehci_data imx51_mxc_ehci_otg_data;
35#define imx51_add_mxc_ehci_otg(pdata) \
36 imx_add_mxc_ehci(&imx51_mxc_ehci_otg_data, pdata)
37extern const struct imx_mxc_ehci_data imx51_mxc_ehci_hs_data[];
38#define imx51_add_mxc_ehci_hs(id, pdata) \
39 imx_add_mxc_ehci(&imx51_mxc_ehci_hs_data[id - 1], pdata)
40
28extern const struct imx_mxc_nand_data imx51_mxc_nand_data; 41extern const struct imx_mxc_nand_data imx51_mxc_nand_data;
29#define imx51_add_mxc_nand(pdata) \ 42#define imx51_add_mxc_nand(pdata) \
30 imx_add_mxc_nand(&imx51_mxc_nand_data, pdata) 43 imx_add_mxc_nand(&imx51_mxc_nand_data, pdata)
@@ -52,3 +65,7 @@ extern const struct imx_mxc_pwm_data imx51_mxc_pwm_data[];
52extern const struct imx_imx_keypad_data imx51_imx_keypad_data; 65extern const struct imx_imx_keypad_data imx51_imx_keypad_data;
53#define imx51_add_imx_keypad(pdata) \ 66#define imx51_add_imx_keypad(pdata) \
54 imx_add_imx_keypad(&imx51_imx_keypad_data, pdata) 67 imx_add_imx_keypad(&imx51_imx_keypad_data, pdata)
68
69extern const struct imx_pata_imx_data imx51_pata_imx_data;
70#define imx51_add_pata_imx() \
71 imx_add_pata_imx(&imx51_pata_imx_data)
diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h
index c27fe8bb4762..6e1e5d1f8c3a 100644
--- a/arch/arm/mach-mx5/devices-imx53.h
+++ b/arch/arm/mach-mx5/devices-imx53.h
@@ -40,3 +40,9 @@ extern const struct imx_imx_ssi_data imx53_imx_ssi_data[];
40extern const struct imx_imx_keypad_data imx53_imx_keypad_data; 40extern const struct imx_imx_keypad_data imx53_imx_keypad_data;
41#define imx53_add_imx_keypad(pdata) \ 41#define imx53_add_imx_keypad(pdata) \
42 imx_add_imx_keypad(&imx53_imx_keypad_data, pdata) 42 imx_add_imx_keypad(&imx53_imx_keypad_data, pdata)
43
44extern const struct imx_pata_imx_data imx53_pata_imx_data;
45#define imx53_add_pata_imx() \
46 imx_add_pata_imx(&imx53_pata_imx_data)
47
48extern struct platform_device *__init imx53_add_ahci_imx(void);
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
deleted file mode 100644
index 371ca8c8414c..000000000000
--- a/arch/arm/mach-mx5/devices.c
+++ /dev/null
@@ -1,120 +0,0 @@
1/*
2 * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
15#include <mach/hardware.h>
16#include <mach/imx-uart.h>
17#include <mach/irqs.h>
18
19static struct resource mxc_hsi2c_resources[] = {
20 {
21 .start = MX51_HSI2C_DMA_BASE_ADDR,
22 .end = MX51_HSI2C_DMA_BASE_ADDR + SZ_16K - 1,
23 .flags = IORESOURCE_MEM,
24 },
25 {
26 .start = MX51_MXC_INT_HS_I2C,
27 .end = MX51_MXC_INT_HS_I2C,
28 .flags = IORESOURCE_IRQ,
29 },
30};
31
32struct platform_device mxc_hsi2c_device = {
33 .name = "imx-i2c",
34 .id = 2,
35 .num_resources = ARRAY_SIZE(mxc_hsi2c_resources),
36 .resource = mxc_hsi2c_resources
37};
38
39static u64 usb_dma_mask = DMA_BIT_MASK(32);
40
41static struct resource usbotg_resources[] = {
42 {
43 .start = MX51_OTG_BASE_ADDR,
44 .end = MX51_OTG_BASE_ADDR + 0x1ff,
45 .flags = IORESOURCE_MEM,
46 },
47 {
48 .start = MX51_MXC_INT_USB_OTG,
49 .flags = IORESOURCE_IRQ,
50 },
51};
52
53/* OTG gadget device */
54struct platform_device mxc_usbdr_udc_device = {
55 .name = "fsl-usb2-udc",
56 .id = -1,
57 .num_resources = ARRAY_SIZE(usbotg_resources),
58 .resource = usbotg_resources,
59 .dev = {
60 .dma_mask = &usb_dma_mask,
61 .coherent_dma_mask = DMA_BIT_MASK(32),
62 },
63};
64
65struct platform_device mxc_usbdr_host_device = {
66 .name = "mxc-ehci",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(usbotg_resources),
69 .resource = usbotg_resources,
70 .dev = {
71 .dma_mask = &usb_dma_mask,
72 .coherent_dma_mask = DMA_BIT_MASK(32),
73 },
74};
75
76static struct resource usbh1_resources[] = {
77 {
78 .start = MX51_OTG_BASE_ADDR + 0x200,
79 .end = MX51_OTG_BASE_ADDR + 0x200 + 0x1ff,
80 .flags = IORESOURCE_MEM,
81 },
82 {
83 .start = MX51_MXC_INT_USB_H1,
84 .flags = IORESOURCE_IRQ,
85 },
86};
87
88struct platform_device mxc_usbh1_device = {
89 .name = "mxc-ehci",
90 .id = 1,
91 .num_resources = ARRAY_SIZE(usbh1_resources),
92 .resource = usbh1_resources,
93 .dev = {
94 .dma_mask = &usb_dma_mask,
95 .coherent_dma_mask = DMA_BIT_MASK(32),
96 },
97};
98
99static struct resource usbh2_resources[] = {
100 {
101 .start = MX51_OTG_BASE_ADDR + 0x400,
102 .end = MX51_OTG_BASE_ADDR + 0x400 + 0x1ff,
103 .flags = IORESOURCE_MEM,
104 },
105 {
106 .start = MX51_MXC_INT_USB_H2,
107 .flags = IORESOURCE_IRQ,
108 },
109};
110
111struct platform_device mxc_usbh2_device = {
112 .name = "mxc-ehci",
113 .id = 2,
114 .num_resources = ARRAY_SIZE(usbh2_resources),
115 .resource = usbh2_resources,
116 .dev = {
117 .dma_mask = &usb_dma_mask,
118 .coherent_dma_mask = DMA_BIT_MASK(32),
119 },
120};
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
deleted file mode 100644
index 55a5129bc29f..000000000000
--- a/arch/arm/mach-mx5/devices.h
+++ /dev/null
@@ -1,5 +0,0 @@
1extern struct platform_device mxc_usbdr_host_device;
2extern struct platform_device mxc_usbh1_device;
3extern struct platform_device mxc_usbh2_device;
4extern struct platform_device mxc_usbdr_udc_device;
5extern struct platform_device mxc_hsi2c_device;
diff --git a/arch/arm/mach-mx5/ehci.c b/arch/arm/mach-mx5/ehci.c
index 7ce12c804a32..c17fa131728b 100644
--- a/arch/arm/mach-mx5/ehci.c
+++ b/arch/arm/mach-mx5/ehci.c
@@ -52,7 +52,7 @@ int mx51_initialize_usb_hw(int port, unsigned int flags)
52 void __iomem *usbother_base; 52 void __iomem *usbother_base;
53 int ret = 0; 53 int ret = 0;
54 54
55 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 55 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
56 if (!usb_base) { 56 if (!usb_base) {
57 printk(KERN_ERR "%s(): ioremap failed\n", __func__); 57 printk(KERN_ERR "%s(): ioremap failed\n", __func__);
58 return -ENOMEM; 58 return -ENOMEM;
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
index bbf4564bd050..a6a3ab8f1b1c 100644
--- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
@@ -28,7 +28,6 @@
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29 29
30#include "devices-imx51.h" 30#include "devices-imx51.h"
31#include "devices.h"
32 31
33#define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30) 32#define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30)
34#define MBIMX51_LED0 IMX_GPIO_NR(3, 5) 33#define MBIMX51_LED0 IMX_GPIO_NR(3, 5)
@@ -160,7 +159,7 @@ struct tsc2007_platform_data tsc2007_data = {
160static struct i2c_board_info mbimx51_i2c_devices[] = { 159static struct i2c_board_info mbimx51_i2c_devices[] = {
161 { 160 {
162 I2C_BOARD_INFO("tsc2007", 0x49), 161 I2C_BOARD_INFO("tsc2007", 0x49),
163 .irq = gpio_to_irq(MBIMX51_TSC2007_GPIO), 162 .irq = IMX_GPIO_TO_IRQ(MBIMX51_TSC2007_GPIO),
164 .platform_data = &tsc2007_data, 163 .platform_data = &tsc2007_data,
165 }, { 164 }, {
166 I2C_BOARD_INFO("tlv320aic23", 0x1a), 165 I2C_BOARD_INFO("tlv320aic23", 0x1a),
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
index 261923997643..d817fc80b986 100644
--- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
@@ -24,7 +24,6 @@
24 24
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/irq.h>
28#include <linux/leds.h> 27#include <linux/leds.h>
29#include <linux/platform_device.h> 28#include <linux/platform_device.h>
30#include <linux/input.h> 29#include <linux/input.h>
@@ -41,13 +40,12 @@
41#include <mach/audmux.h> 40#include <mach/audmux.h>
42 41
43#include "devices-imx51.h" 42#include "devices-imx51.h"
44#include "devices.h"
45 43
46static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { 44static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
47 /* LED */ 45 /* LED */
48 MX51_PAD_NANDF_D10__GPIO3_30, 46 MX51_PAD_NANDF_D10__GPIO3_30,
49 /* SWITCH */ 47 /* SWITCH */
50 _MX51_PAD_NANDF_D9__GPIO3_31 | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP | 48 NEW_PAD_CTRL(MX51_PAD_NANDF_D9__GPIO3_31, PAD_CTL_PUS_22K_UP |
51 PAD_CTL_PKE | PAD_CTL_SRE_FAST | 49 PAD_CTL_PKE | PAD_CTL_SRE_FAST |
52 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS), 50 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
53 /* UART2 */ 51 /* UART2 */
@@ -66,7 +64,7 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
66 MX51_PAD_SD1_DATA2__SD1_DATA2, 64 MX51_PAD_SD1_DATA2__SD1_DATA2,
67 MX51_PAD_SD1_DATA3__SD1_DATA3, 65 MX51_PAD_SD1_DATA3__SD1_DATA3,
68 /* SD1 CD */ 66 /* SD1 CD */
69 _MX51_PAD_GPIO1_0__SD1_CD | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP | 67 NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_PUS_22K_UP |
70 PAD_CTL_PKE | PAD_CTL_SRE_FAST | 68 PAD_CTL_PKE | PAD_CTL_SRE_FAST |
71 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS), 69 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
72}; 70};
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
new file mode 100644
index 000000000000..ccc61585659b
--- /dev/null
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -0,0 +1,116 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/irq.h>
14#include <linux/irqdomain.h>
15#include <linux/of_irq.h>
16#include <linux/of_platform.h>
17#include <asm/mach/arch.h>
18#include <asm/mach/time.h>
19#include <mach/common.h>
20#include <mach/mx51.h>
21
22/*
23 * Lookup table for attaching a specific name and platform_data pointer to
24 * devices as they get created by of_platform_populate(). Ideally this table
25 * would not exist, but the current clock implementation depends on some devices
26 * having a specific name.
27 */
28static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
29 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART1_BASE_ADDR, "imx21-uart.0", NULL),
30 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART2_BASE_ADDR, "imx21-uart.1", NULL),
31 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART3_BASE_ADDR, "imx21-uart.2", NULL),
32 OF_DEV_AUXDATA("fsl,imx51-fec", MX51_FEC_BASE_ADDR, "imx27-fec.0", NULL),
33 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx51.0", NULL),
34 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx51.1", NULL),
35 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx51.2", NULL),
36 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx51.3", NULL),
37 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
38 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
39 OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
40 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
41 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
42 OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
43 OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
44 { /* sentinel */ }
45};
46
47static void __init imx51_tzic_add_irq_domain(struct device_node *np,
48 struct device_node *interrupt_parent)
49{
50 irq_domain_add_simple(np, 0);
51}
52
53static void __init imx51_gpio_add_irq_domain(struct device_node *np,
54 struct device_node *interrupt_parent)
55{
56 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
57 32 * 4; /* imx51 gets 4 gpio ports */
58
59 irq_domain_add_simple(np, gpio_irq_base);
60 gpio_irq_base += 32;
61}
62
63static const struct of_device_id imx51_irq_match[] __initconst = {
64 { .compatible = "fsl,imx51-tzic", .data = imx51_tzic_add_irq_domain, },
65 { .compatible = "fsl,imx51-gpio", .data = imx51_gpio_add_irq_domain, },
66 { /* sentinel */ }
67};
68
69static const struct of_device_id imx51_iomuxc_of_match[] __initconst = {
70 { .compatible = "fsl,imx51-iomuxc-babbage", .data = imx51_babbage_common_init, },
71 { /* sentinel */ }
72};
73
74static void __init imx51_dt_init(void)
75{
76 struct device_node *node;
77 const struct of_device_id *of_id;
78 void (*func)(void);
79
80 of_irq_init(imx51_irq_match);
81
82 node = of_find_matching_node(NULL, imx51_iomuxc_of_match);
83 if (node) {
84 of_id = of_match_node(imx51_iomuxc_of_match, node);
85 func = of_id->data;
86 func();
87 of_node_put(node);
88 }
89
90 of_platform_populate(NULL, of_default_bus_match_table,
91 imx51_auxdata_lookup, NULL);
92}
93
94static void __init imx51_timer_init(void)
95{
96 mx51_clocks_init_dt();
97}
98
99static struct sys_timer imx51_timer = {
100 .init = imx51_timer_init,
101};
102
103static const char *imx51_dt_board_compat[] __initdata = {
104 "fsl,imx51-babbage",
105 NULL
106};
107
108DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
109 .map_io = mx51_map_io,
110 .init_early = imx51_init_early,
111 .init_irq = mx51_init_irq,
112 .handle_irq = imx51_handle_irq,
113 .timer = &imx51_timer,
114 .init_machine = imx51_dt_init,
115 .dt_compat = imx51_dt_board_compat,
116MACHINE_END
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
new file mode 100644
index 000000000000..ccaa0b81b768
--- /dev/null
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -0,0 +1,126 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/io.h>
14#include <linux/irq.h>
15#include <linux/irqdomain.h>
16#include <linux/of_irq.h>
17#include <linux/of_platform.h>
18#include <asm/mach/arch.h>
19#include <asm/mach/time.h>
20#include <mach/common.h>
21#include <mach/mx53.h>
22
23/*
24 * Lookup table for attaching a specific name and platform_data pointer to
25 * devices as they get created by of_platform_populate(). Ideally this table
26 * would not exist, but the current clock implementation depends on some devices
27 * having a specific name.
28 */
29static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
30 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL),
31 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL),
32 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL),
33 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL),
34 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL),
35 OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL),
36 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL),
37 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL),
38 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL),
39 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL),
40 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
41 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
42 OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
43 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
44 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
45 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL),
46 OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
47 OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
48 { /* sentinel */ }
49};
50
51static void __init imx53_tzic_add_irq_domain(struct device_node *np,
52 struct device_node *interrupt_parent)
53{
54 irq_domain_add_simple(np, 0);
55}
56
57static void __init imx53_gpio_add_irq_domain(struct device_node *np,
58 struct device_node *interrupt_parent)
59{
60 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
61 32 * 7; /* imx53 gets 7 gpio ports */
62
63 irq_domain_add_simple(np, gpio_irq_base);
64 gpio_irq_base += 32;
65}
66
67static const struct of_device_id imx53_irq_match[] __initconst = {
68 { .compatible = "fsl,imx53-tzic", .data = imx53_tzic_add_irq_domain, },
69 { .compatible = "fsl,imx53-gpio", .data = imx53_gpio_add_irq_domain, },
70 { /* sentinel */ }
71};
72
73static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {
74 { .compatible = "fsl,imx53-iomuxc-ard", .data = imx53_ard_common_init, },
75 { .compatible = "fsl,imx53-iomuxc-evk", .data = imx53_evk_common_init, },
76 { .compatible = "fsl,imx53-iomuxc-qsb", .data = imx53_qsb_common_init, },
77 { .compatible = "fsl,imx53-iomuxc-smd", .data = imx53_smd_common_init, },
78 { /* sentinel */ }
79};
80
81static void __init imx53_dt_init(void)
82{
83 struct device_node *node;
84 const struct of_device_id *of_id;
85 void (*func)(void);
86
87 of_irq_init(imx53_irq_match);
88
89 node = of_find_matching_node(NULL, imx53_iomuxc_of_match);
90 if (node) {
91 of_id = of_match_node(imx53_iomuxc_of_match, node);
92 func = of_id->data;
93 func();
94 of_node_put(node);
95 }
96
97 of_platform_populate(NULL, of_default_bus_match_table,
98 imx53_auxdata_lookup, NULL);
99}
100
101static void __init imx53_timer_init(void)
102{
103 mx53_clocks_init_dt();
104}
105
106static struct sys_timer imx53_timer = {
107 .init = imx53_timer_init,
108};
109
110static const char *imx53_dt_board_compat[] __initdata = {
111 "fsl,imx53-ard",
112 "fsl,imx53-evk",
113 "fsl,imx53-qsb",
114 "fsl,imx53-smd",
115 NULL
116};
117
118DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
119 .map_io = mx53_map_io,
120 .init_early = imx53_init_early,
121 .init_irq = mx53_init_irq,
122 .handle_irq = imx53_handle_irq,
123 .timer = &imx53_timer,
124 .init_machine = imx53_dt_init,
125 .dt_compat = imx53_dt_board_compat,
126MACHINE_END
diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c
deleted file mode 100644
index 77e374c726fa..000000000000
--- a/arch/arm/mach-mx5/mm-mx50.c
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 * Create static mapping between physical to virtual memory.
19 */
20
21#include <linux/mm.h>
22#include <linux/init.h>
23
24#include <asm/mach/map.h>
25
26#include <mach/hardware.h>
27#include <mach/common.h>
28#include <mach/iomux-v3.h>
29#include <mach/irqs.h>
30
31/*
32 * Define the MX50 memory map.
33 */
34static struct map_desc mx50_io_desc[] __initdata = {
35 imx_map_entry(MX50, TZIC, MT_DEVICE),
36 imx_map_entry(MX50, SPBA0, MT_DEVICE),
37 imx_map_entry(MX50, AIPS1, MT_DEVICE),
38 imx_map_entry(MX50, AIPS2, MT_DEVICE),
39};
40
41/*
42 * This function initializes the memory map. It is called during the
43 * system startup to create static physical to virtual memory mappings
44 * for the IO modules.
45 */
46void __init mx50_map_io(void)
47{
48 iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc));
49}
50
51void __init imx50_init_early(void)
52{
53 mxc_set_cpu_type(MXC_CPU_MX50);
54 mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR));
55 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
56}
57
58void __init mx50_init_irq(void)
59{
60 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
61}
62
63void __init imx50_soc_init(void)
64{
65 /* i.mx50 has the i.mx31 type gpio */
66 mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
67 mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
68 mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
69 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
70 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
71 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
72}
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index baea6e5cddd9..26eacc9d0d90 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -21,12 +21,27 @@
21#include <mach/devices-common.h> 21#include <mach/devices-common.h>
22#include <mach/iomux-v3.h> 22#include <mach/iomux-v3.h>
23 23
24static void imx5_idle(void)
25{
26 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
27}
28
29/*
30 * Define the MX50 memory map.
31 */
32static struct map_desc mx50_io_desc[] __initdata = {
33 imx_map_entry(MX50, TZIC, MT_DEVICE),
34 imx_map_entry(MX50, SPBA0, MT_DEVICE),
35 imx_map_entry(MX50, AIPS1, MT_DEVICE),
36 imx_map_entry(MX50, AIPS2, MT_DEVICE),
37};
38
24/* 39/*
25 * Define the MX51 memory map. 40 * Define the MX51 memory map.
26 */ 41 */
27static struct map_desc mx51_io_desc[] __initdata = { 42static struct map_desc mx51_io_desc[] __initdata = {
43 imx_map_entry(MX51, TZIC, MT_DEVICE),
28 imx_map_entry(MX51, IRAM, MT_DEVICE), 44 imx_map_entry(MX51, IRAM, MT_DEVICE),
29 imx_map_entry(MX51, DEBUG, MT_DEVICE),
30 imx_map_entry(MX51, AIPS1, MT_DEVICE), 45 imx_map_entry(MX51, AIPS1, MT_DEVICE),
31 imx_map_entry(MX51, SPBA0, MT_DEVICE), 46 imx_map_entry(MX51, SPBA0, MT_DEVICE),
32 imx_map_entry(MX51, AIPS2, MT_DEVICE), 47 imx_map_entry(MX51, AIPS2, MT_DEVICE),
@@ -36,6 +51,7 @@ static struct map_desc mx51_io_desc[] __initdata = {
36 * Define the MX53 memory map. 51 * Define the MX53 memory map.
37 */ 52 */
38static struct map_desc mx53_io_desc[] __initdata = { 53static struct map_desc mx53_io_desc[] __initdata = {
54 imx_map_entry(MX53, TZIC, MT_DEVICE),
39 imx_map_entry(MX53, AIPS1, MT_DEVICE), 55 imx_map_entry(MX53, AIPS1, MT_DEVICE),
40 imx_map_entry(MX53, SPBA0, MT_DEVICE), 56 imx_map_entry(MX53, SPBA0, MT_DEVICE),
41 imx_map_entry(MX53, AIPS2, MT_DEVICE), 57 imx_map_entry(MX53, AIPS2, MT_DEVICE),
@@ -46,21 +62,34 @@ static struct map_desc mx53_io_desc[] __initdata = {
46 * system startup to create static physical to virtual memory mappings 62 * system startup to create static physical to virtual memory mappings
47 * for the IO modules. 63 * for the IO modules.
48 */ 64 */
65void __init mx50_map_io(void)
66{
67 iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc));
68}
69
49void __init mx51_map_io(void) 70void __init mx51_map_io(void)
50{ 71{
51 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc)); 72 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
52} 73}
53 74
75void __init mx53_map_io(void)
76{
77 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
78}
79
80void __init imx50_init_early(void)
81{
82 mxc_set_cpu_type(MXC_CPU_MX50);
83 mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR));
84 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
85}
86
54void __init imx51_init_early(void) 87void __init imx51_init_early(void)
55{ 88{
56 mxc_set_cpu_type(MXC_CPU_MX51); 89 mxc_set_cpu_type(MXC_CPU_MX51);
57 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); 90 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
58 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); 91 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
59} 92 imx_idle = imx5_idle;
60
61void __init mx53_map_io(void)
62{
63 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
64} 93}
65 94
66void __init imx53_init_early(void) 95void __init imx53_init_early(void)
@@ -70,35 +99,19 @@ void __init imx53_init_early(void)
70 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); 99 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
71} 100}
72 101
73void __init mx51_init_irq(void) 102void __init mx50_init_irq(void)
74{ 103{
75 unsigned long tzic_addr; 104 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
76 void __iomem *tzic_virt; 105}
77
78 if (mx51_revision() < IMX_CHIP_REVISION_2_0)
79 tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
80 else
81 tzic_addr = MX51_TZIC_BASE_ADDR;
82
83 tzic_virt = ioremap(tzic_addr, SZ_16K);
84 if (!tzic_virt)
85 panic("unable to map TZIC interrupt controller\n");
86 106
87 tzic_init_irq(tzic_virt); 107void __init mx51_init_irq(void)
108{
109 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
88} 110}
89 111
90void __init mx53_init_irq(void) 112void __init mx53_init_irq(void)
91{ 113{
92 unsigned long tzic_addr; 114 tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR));
93 void __iomem *tzic_virt;
94
95 tzic_addr = MX53_TZIC_BASE_ADDR;
96
97 tzic_virt = ioremap(tzic_addr, SZ_16K);
98 if (!tzic_virt)
99 panic("unable to map TZIC interrupt controller\n");
100
101 tzic_init_irq(tzic_virt);
102} 115}
103 116
104static struct sdma_script_start_addrs imx51_sdma_script __initdata = { 117static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
@@ -138,13 +151,24 @@ static struct sdma_platform_data imx53_sdma_pdata __initdata = {
138 .script_addrs = &imx53_sdma_script, 151 .script_addrs = &imx53_sdma_script,
139}; 152};
140 153
154void __init imx50_soc_init(void)
155{
156 /* i.mx50 has the i.mx31 type gpio */
157 mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
158 mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
159 mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
160 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
161 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
162 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
163}
164
141void __init imx51_soc_init(void) 165void __init imx51_soc_init(void)
142{ 166{
143 /* i.mx51 has the i.mx31 type gpio */ 167 /* i.mx51 has the i.mx31 type gpio */
144 mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); 168 mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
145 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); 169 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
146 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); 170 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH);
147 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); 171 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH);
148 172
149 /* i.mx51 has the i.mx35 type sdma */ 173 /* i.mx51 has the i.mx35 type sdma */
150 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); 174 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
index c9209454807a..b004e178417d 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -34,14 +34,12 @@
34#include <linux/usb/ulpi.h> 34#include <linux/usb/ulpi.h>
35#include <mach/ulpi.h> 35#include <mach/ulpi.h>
36 36
37#include <asm/irq.h>
38#include <asm/setup.h> 37#include <asm/setup.h>
39#include <asm/mach-types.h> 38#include <asm/mach-types.h>
40#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
41#include <asm/mach/time.h> 40#include <asm/mach/time.h>
42 41
43#include "devices-imx51.h" 42#include "devices-imx51.h"
44#include "devices.h"
45#include "efika.h" 43#include "efika.h"
46#include "cpu_op-mx51.h" 44#include "cpu_op-mx51.h"
47 45
@@ -133,7 +131,7 @@ static int initialize_otg_port(struct platform_device *pdev)
133 u32 v; 131 u32 v;
134 void __iomem *usb_base; 132 void __iomem *usb_base;
135 void __iomem *usbother_base; 133 void __iomem *usbother_base;
136 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 134 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
137 if (!usb_base) 135 if (!usb_base)
138 return -ENOMEM; 136 return -ENOMEM;
139 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); 137 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
@@ -150,7 +148,7 @@ static int initialize_otg_port(struct platform_device *pdev)
150 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY); 148 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
151} 149}
152 150
153static struct mxc_usbh_platform_data dr_utmi_config = { 151static const struct mxc_usbh_platform_data dr_utmi_config __initconst = {
154 .init = initialize_otg_port, 152 .init = initialize_otg_port,
155 .portsc = MXC_EHCI_UTMI_16BIT, 153 .portsc = MXC_EHCI_UTMI_16BIT,
156}; 154};
@@ -170,7 +168,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
170 gpio_set_value(EFIKAMX_USBH1_STP, 1); 168 gpio_set_value(EFIKAMX_USBH1_STP, 1);
171 msleep(1); 169 msleep(1);
172 170
173 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); 171 usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K);
174 socregs_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); 172 socregs_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
175 173
176 /* The clock for the USBH1 ULPI port will come externally */ 174 /* The clock for the USBH1 ULPI port will come externally */
@@ -189,7 +187,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
189 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD); 187 return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD);
190} 188}
191 189
192static struct mxc_usbh_platform_data usbh1_config = { 190static struct mxc_usbh_platform_data usbh1_config __initdata = {
193 .init = initialize_usbh1_port, 191 .init = initialize_usbh1_port,
194 .portsc = MXC_EHCI_MODE_ULPI, 192 .portsc = MXC_EHCI_MODE_ULPI,
195}; 193};
@@ -217,9 +215,9 @@ static void __init mx51_efika_usb(void)
217 usbh1_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | 215 usbh1_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
218 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND); 216 ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND);
219 217
220 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 218 imx51_add_mxc_ehci_otg(&dr_utmi_config);
221 if (usbh1_config.otg) 219 if (usbh1_config.otg)
222 mxc_register_device(&mxc_usbh1_device, &usbh1_config); 220 imx51_add_mxc_ehci_hs(1, &usbh1_config);
223} 221}
224 222
225static struct mtd_partition mx51_efika_spi_nor_partitions[] = { 223static struct mtd_partition mx51_efika_spi_nor_partitions[] = {
@@ -589,7 +587,7 @@ static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
589 .bus_num = 0, 587 .bus_num = 0,
590 .chip_select = 0, 588 .chip_select = 0,
591 .platform_data = &mx51_efika_mc13892_data, 589 .platform_data = &mx51_efika_mc13892_data,
592 .irq = gpio_to_irq(EFIKAMX_PMIC), 590 .irq = IMX_GPIO_TO_IRQ(EFIKAMX_PMIC),
593 }, 591 },
594}; 592};
595 593
@@ -609,7 +607,6 @@ void __init efika_board_common_init(void)
609 ARRAY_SIZE(mx51efika_pads)); 607 ARRAY_SIZE(mx51efika_pads));
610 imx51_add_imx_uart(0, &uart_pdata); 608 imx51_add_imx_uart(0, &uart_pdata);
611 mx51_efika_usb(); 609 mx51_efika_usb();
612 imx51_add_sdhci_esdhc_imx(0, NULL);
613 610
614 /* FIXME: comes from original code. check this. */ 611 /* FIXME: comes from original code. check this. */
615 if (mx51_revision() < IMX_CHIP_REVISION_2_0) 612 if (mx51_revision() < IMX_CHIP_REVISION_2_0)
@@ -627,8 +624,9 @@ void __init efika_board_common_init(void)
627 ARRAY_SIZE(mx51_efika_spi_board_info)); 624 ARRAY_SIZE(mx51_efika_spi_board_info));
628 imx51_add_ecspi(0, &mx51_efika_spi_pdata); 625 imx51_add_ecspi(0, &mx51_efika_spi_pdata);
629 626
627 imx51_add_pata_imx();
628
630#if defined(CONFIG_CPU_FREQ_IMX) 629#if defined(CONFIG_CPU_FREQ_IMX)
631 get_cpu_op = mx51_get_cpu_op; 630 get_cpu_op = mx51_get_cpu_op;
632#endif 631#endif
633} 632}
634
diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c
index e4529af0da72..98052fc852c7 100644
--- a/arch/arm/mach-mx5/pm-imx5.c
+++ b/arch/arm/mach-mx5/pm-imx5.c
@@ -14,14 +14,19 @@
14#include <linux/err.h> 14#include <linux/err.h>
15#include <asm/cacheflush.h> 15#include <asm/cacheflush.h>
16#include <asm/tlbflush.h> 16#include <asm/tlbflush.h>
17#include <mach/system.h> 17#include <mach/common.h>
18#include <mach/hardware.h>
18#include "crm_regs.h" 19#include "crm_regs.h"
19 20
20static struct clk *gpc_dvfs_clk; 21static struct clk *gpc_dvfs_clk;
21 22
23static int mx5_suspend_prepare(void)
24{
25 return clk_enable(gpc_dvfs_clk);
26}
27
22static int mx5_suspend_enter(suspend_state_t state) 28static int mx5_suspend_enter(suspend_state_t state)
23{ 29{
24 clk_enable(gpc_dvfs_clk);
25 switch (state) { 30 switch (state) {
26 case PM_SUSPEND_MEM: 31 case PM_SUSPEND_MEM:
27 mx5_cpu_lp_set(STOP_POWER_OFF); 32 mx5_cpu_lp_set(STOP_POWER_OFF);
@@ -42,11 +47,14 @@ static int mx5_suspend_enter(suspend_state_t state)
42 __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR); 47 __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
43 } 48 }
44 cpu_do_idle(); 49 cpu_do_idle();
45 clk_disable(gpc_dvfs_clk);
46
47 return 0; 50 return 0;
48} 51}
49 52
53static void mx5_suspend_finish(void)
54{
55 clk_disable(gpc_dvfs_clk);
56}
57
50static int mx5_pm_valid(suspend_state_t state) 58static int mx5_pm_valid(suspend_state_t state)
51{ 59{
52 return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); 60 return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
@@ -54,7 +62,9 @@ static int mx5_pm_valid(suspend_state_t state)
54 62
55static const struct platform_suspend_ops mx5_suspend_ops = { 63static const struct platform_suspend_ops mx5_suspend_ops = {
56 .valid = mx5_pm_valid, 64 .valid = mx5_pm_valid,
65 .prepare = mx5_suspend_prepare,
57 .enter = mx5_suspend_enter, 66 .enter = mx5_suspend_enter,
67 .finish = mx5_suspend_finish,
58}; 68};
59 69
60static int __init mx5_pm_init(void) 70static int __init mx5_pm_init(void)
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
index 76ae8dc33e00..144ebebc4a61 100644
--- a/arch/arm/mach-mx5/system.c
+++ b/arch/arm/mach-mx5/system.c
@@ -13,6 +13,7 @@
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <mach/hardware.h> 15#include <mach/hardware.h>
16#include <mach/common.h>
16#include "crm_regs.h" 17#include "crm_regs.h"
17 18
18/* set cpu low power mode before WFI instruction. This function is called 19/* set cpu low power mode before WFI instruction. This function is called
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-06 00:51:55 -0500