2 files changed, 24 insertions, 0 deletions

diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index fdbc05ed5513..6b89c1bf4eb2 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1563,6 +1563,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
         clk_enable(&iim_clk);
         mx53_revision();
         clk_disable(&iim_clk);
+        mx53_display_revision();
 
         /* Set SDHC parents to be PLL2 */
         clk_set_parent(&esdhc1_clk, &pll2_sw_clk);
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 472bdfab2e55..86f87da59c64 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -166,6 +166,29 @@ int mx50_revision(void)
 }
 EXPORT_SYMBOL(mx50_revision);
 
+void mx53_display_revision(void)
+{
+        int rev;
+        char *srev;
+        rev = mx53_revision();
+
+        switch (rev) {
+        case IMX_CHIP_REVISION_1_0:
+                srev = IMX_CHIP_REVISION_1_0_STRING;
+                break;
+        case IMX_CHIP_REVISION_2_0:
+                srev = IMX_CHIP_REVISION_2_0_STRING;
+                break;
+        case IMX_CHIP_REVISION_2_1:
+                srev = IMX_CHIP_REVISION_2_1_STRING;
+                break;
+        default:
+                srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
+        }
+        printk(KERN_INFO "CPU identified as i.MX53, silicon rev %s\n", srev);
+}
+EXPORT_SYMBOL(mx53_display_revision);
+
 static int __init post_cpu_init(void)
 {
         unsigned int reg;