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-rw-r--r--arch/arm/mach-mx5/clock-mx51.c30
1 files changed, 16 insertions, 14 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index 57c10a9926cc..fe658bf5b490 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -41,34 +41,36 @@ static struct clk usboh3_clk;
41 41
42#define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */ 42#define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */
43 43
44static int _clk_ccgr_enable(struct clk *clk) 44static void _clk_ccgr_setclk(struct clk *clk, unsigned mode)
45{ 45{
46 u32 reg; 46 u32 reg = __raw_readl(clk->enable_reg);
47
48 reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift);
49 reg |= mode << clk->enable_shift;
47 50
48 reg = __raw_readl(clk->enable_reg);
49 reg |= MXC_CCM_CCGRx_MOD_ON << clk->enable_shift;
50 __raw_writel(reg, clk->enable_reg); 51 __raw_writel(reg, clk->enable_reg);
52}
51 53
54static int _clk_ccgr_enable(struct clk *clk)
55{
56 _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_ON);
52 return 0; 57 return 0;
53} 58}
54 59
55static void _clk_ccgr_disable(struct clk *clk) 60static void _clk_ccgr_disable(struct clk *clk)
56{ 61{
57 u32 reg; 62 _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_OFF);
58 reg = __raw_readl(clk->enable_reg); 63}
59 reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift);
60 __raw_writel(reg, clk->enable_reg);
61 64
65static int _clk_ccgr_enable_inrun(struct clk *clk)
66{
67 _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_IDLE);
68 return 0;
62} 69}
63 70
64static void _clk_ccgr_disable_inwait(struct clk *clk) 71static void _clk_ccgr_disable_inwait(struct clk *clk)
65{ 72{
66 u32 reg; 73 _clk_ccgr_setclk(clk, MXC_CCM_CCGRx_MOD_IDLE);
67
68 reg = __raw_readl(clk->enable_reg);
69 reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift);
70 reg |= MXC_CCM_CCGRx_MOD_IDLE << clk->enable_shift;
71 __raw_writel(reg, clk->enable_reg);
72} 74}
73 75
74/* 76/*