diff options
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r-- | arch/arm/mach-mx5/mm.c | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index c21e18be7af8..9fe7beb32dac 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c | |||
@@ -35,11 +35,6 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
35 | .length = MX51_DEBUG_SIZE, | 35 | .length = MX51_DEBUG_SIZE, |
36 | .type = MT_DEVICE | 36 | .type = MT_DEVICE |
37 | }, { | 37 | }, { |
38 | .virtual = MX51_TZIC_BASE_ADDR_VIRT, | ||
39 | .pfn = __phys_to_pfn(MX51_TZIC_BASE_ADDR), | ||
40 | .length = MX51_TZIC_SIZE, | ||
41 | .type = MT_DEVICE | ||
42 | }, { | ||
43 | .virtual = MX51_AIPS1_BASE_ADDR_VIRT, | 38 | .virtual = MX51_AIPS1_BASE_ADDR_VIRT, |
44 | .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR), | 39 | .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR), |
45 | .length = MX51_AIPS1_SIZE, | 40 | .length = MX51_AIPS1_SIZE, |
@@ -69,14 +64,6 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
69 | */ | 64 | */ |
70 | void __init mx51_map_io(void) | 65 | void __init mx51_map_io(void) |
71 | { | 66 | { |
72 | u32 tzic_addr; | ||
73 | |||
74 | if (mx51_revision() < MX51_CHIP_REV_2_0) | ||
75 | tzic_addr = 0x8FFFC000; | ||
76 | else | ||
77 | tzic_addr = 0xE0003000; | ||
78 | mxc_io_desc[2].pfn = __phys_to_pfn(tzic_addr); | ||
79 | |||
80 | mxc_set_cpu_type(MXC_CPU_MX51); | 67 | mxc_set_cpu_type(MXC_CPU_MX51); |
81 | mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); | 68 | mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); |
82 | mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR)); | 69 | mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR)); |
@@ -85,5 +72,17 @@ void __init mx51_map_io(void) | |||
85 | 72 | ||
86 | void __init mx51_init_irq(void) | 73 | void __init mx51_init_irq(void) |
87 | { | 74 | { |
88 | tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR)); | 75 | unsigned long tzic_addr; |
76 | void __iomem *tzic_virt; | ||
77 | |||
78 | if (mx51_revision() < MX51_CHIP_REV_2_0) | ||
79 | tzic_addr = MX51_TZIC_BASE_ADDR_TO1; | ||
80 | else | ||
81 | tzic_addr = MX51_TZIC_BASE_ADDR; | ||
82 | |||
83 | tzic_virt = ioremap(tzic_addr, SZ_16K); | ||
84 | if (!tzic_virt) | ||
85 | panic("unable to map TZIC interrupt controller\n"); | ||
86 | |||
87 | tzic_init_irq(tzic_virt); | ||
89 | } | 88 | } |