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-rw-r--r--arch/arm/mach-mx5/Kconfig27
-rw-r--r--arch/arm/mach-mx5/Makefile4
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51.c293
-rw-r--r--arch/arm/mach-mx5/board-mx51_3ds.c164
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c28
-rw-r--r--arch/arm/mach-mx5/clock-mx51.c16
-rw-r--r--arch/arm/mach-mx5/devices.c83
-rw-r--r--arch/arm/mach-mx5/devices.h4
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c200
-rw-r--r--arch/arm/mach-mx5/mm.c3
10 files changed, 819 insertions, 3 deletions
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 1576d51e676c..0848db5dd364 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -15,4 +15,31 @@ config MACH_MX51_BABBAGE
15 u-boot. This includes specific configurations for the board and its 15 u-boot. This includes specific configurations for the board and its
16 peripherals. 16 peripherals.
17 17
18config MACH_MX51_3DS
19 bool "Support MX51PDK (3DS)"
20 select MXC_DEBUG_BOARD
21 help
22 Include support for MX51PDK (3DS) platform. This includes specific
23 configurations for the board and its peripherals.
24
25config MACH_EUKREA_CPUIMX51
26 bool "Support Eukrea CPUIMX51 module"
27 help
28 Include support for Eukrea CPUIMX51 platform. This includes
29 specific configurations for the module and its peripherals.
30
31choice
32 prompt "Baseboard"
33 depends on MACH_EUKREA_CPUIMX51
34 default MACH_EUKREA_MBIMX51_BASEBOARD
35
36config MACH_EUKREA_MBIMX51_BASEBOARD
37 prompt "Eukrea MBIMX51 development board"
38 bool
39 help
40 This adds board specific devices that can be found on Eukrea's
41 MBIMX51 evaluation board.
42
43endchoice
44
18endif 45endif
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index bf23f869ef51..86c66e7f52f3 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -6,4 +6,6 @@
6obj-y := cpu.o mm.o clock-mx51.o devices.o 6obj-y := cpu.o mm.o clock-mx51.o devices.o
7 7
8obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o 8obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
9 9obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
10obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o
11obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
new file mode 100644
index 000000000000..623607a20f57
--- /dev/null
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -0,0 +1,293 @@
1/*
2 *
3 * Copyright (C) 2010 Eric Bénard <eric@eukrea.com>
4 *
5 * based on board-mx51_babbage.c which is
6 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
7 * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
8 *
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
12 *
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
15 */
16
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/serial_8250.h>
20#include <linux/i2c.h>
21#include <linux/gpio.h>
22#include <linux/delay.h>
23#include <linux/io.h>
24#include <linux/interrupt.h>
25#include <linux/irq.h>
26#include <linux/fsl_devices.h>
27
28#include <mach/eukrea-baseboards.h>
29#include <mach/common.h>
30#include <mach/hardware.h>
31#include <mach/imx-uart.h>
32#include <mach/iomux-mx51.h>
33#include <mach/i2c.h>
34#include <mach/mxc_ehci.h>
35
36#include <asm/irq.h>
37#include <asm/setup.h>
38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/time.h>
41
42#include "devices.h"
43
44#define CPUIMX51_USBH1_STP (0*32 + 27)
45#define CPUIMX51_QUARTA_GPIO (2*32 + 28)
46#define CPUIMX51_QUARTB_GPIO (2*32 + 25)
47#define CPUIMX51_QUARTC_GPIO (2*32 + 26)
48#define CPUIMX51_QUARTD_GPIO (2*32 + 27)
49#define CPUIMX51_QUARTA_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTA_GPIO)
50#define CPUIMX51_QUARTB_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTB_GPIO)
51#define CPUIMX51_QUARTC_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTC_GPIO)
52#define CPUIMX51_QUARTD_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTD_GPIO)
53#define CPUIMX51_QUART_XTAL 14745600
54#define CPUIMX51_QUART_REGSHIFT 17
55
56/* USB_CTRL_1 */
57#define MX51_USB_CTRL_1_OFFSET 0x10
58#define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
59
60#define MX51_USB_PLLDIV_12_MHZ 0x00
61#define MX51_USB_PLL_DIV_19_2_MHZ 0x01
62#define MX51_USB_PLL_DIV_24_MHZ 0x02
63
64#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
65static struct plat_serial8250_port serial_platform_data[] = {
66 {
67 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),
68 .irq = CPUIMX51_QUARTA_IRQ,
69 .irqflags = IRQF_TRIGGER_HIGH,
70 .uartclk = CPUIMX51_QUART_XTAL,
71 .regshift = CPUIMX51_QUART_REGSHIFT,
72 .iotype = UPIO_MEM,
73 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
74 }, {
75 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),
76 .irq = CPUIMX51_QUARTB_IRQ,
77 .irqflags = IRQF_TRIGGER_HIGH,
78 .uartclk = CPUIMX51_QUART_XTAL,
79 .regshift = CPUIMX51_QUART_REGSHIFT,
80 .iotype = UPIO_MEM,
81 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
82 }, {
83 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),
84 .irq = CPUIMX51_QUARTC_IRQ,
85 .irqflags = IRQF_TRIGGER_HIGH,
86 .uartclk = CPUIMX51_QUART_XTAL,
87 .regshift = CPUIMX51_QUART_REGSHIFT,
88 .iotype = UPIO_MEM,
89 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
90 }, {
91 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
92 .irq = CPUIMX51_QUARTD_IRQ,
93 .irqflags = IRQF_TRIGGER_HIGH,
94 .uartclk = CPUIMX51_QUART_XTAL,
95 .regshift = CPUIMX51_QUART_REGSHIFT,
96 .iotype = UPIO_MEM,
97 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
98 }, {
99 }
100};
101
102static struct platform_device serial_device = {
103 .name = "serial8250",
104 .id = 0,
105 .dev = {
106 .platform_data = serial_platform_data,
107 },
108};
109#endif
110
111static struct platform_device *devices[] __initdata = {
112 &mxc_fec_device,
113#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
114 &serial_device,
115#endif
116};
117
118static struct pad_desc eukrea_cpuimx51_pads[] = {
119 /* UART1 */
120 MX51_PAD_UART1_RXD__UART1_RXD,
121 MX51_PAD_UART1_TXD__UART1_TXD,
122 MX51_PAD_UART1_RTS__UART1_RTS,
123 MX51_PAD_UART1_CTS__UART1_CTS,
124
125 /* I2C2 */
126 MX51_PAD_GPIO_1_2__I2C2_SCL,
127 MX51_PAD_GPIO_1_3__I2C2_SDA,
128 MX51_PAD_NANDF_D10__GPIO_3_30,
129
130 /* QUART IRQ */
131 MX51_PAD_NANDF_D15__GPIO_3_25,
132 MX51_PAD_NANDF_D14__GPIO_3_26,
133 MX51_PAD_NANDF_D13__GPIO_3_27,
134 MX51_PAD_NANDF_D12__GPIO_3_28,
135
136 /* USB HOST1 */
137 MX51_PAD_USBH1_CLK__USBH1_CLK,
138 MX51_PAD_USBH1_DIR__USBH1_DIR,
139 MX51_PAD_USBH1_NXT__USBH1_NXT,
140 MX51_PAD_USBH1_DATA0__USBH1_DATA0,
141 MX51_PAD_USBH1_DATA1__USBH1_DATA1,
142 MX51_PAD_USBH1_DATA2__USBH1_DATA2,
143 MX51_PAD_USBH1_DATA3__USBH1_DATA3,
144 MX51_PAD_USBH1_DATA4__USBH1_DATA4,
145 MX51_PAD_USBH1_DATA5__USBH1_DATA5,
146 MX51_PAD_USBH1_DATA6__USBH1_DATA6,
147 MX51_PAD_USBH1_DATA7__USBH1_DATA7,
148 MX51_PAD_USBH1_STP__USBH1_STP,
149};
150
151static struct imxuart_platform_data uart_pdata = {
152 .flags = IMXUART_HAVE_RTSCTS,
153};
154
155static struct imxi2c_platform_data eukrea_cpuimx51_i2c_data = {
156 .bitrate = 100000,
157};
158
159static struct i2c_board_info eukrea_cpuimx51_i2c_devices[] = {
160 {
161 I2C_BOARD_INFO("pcf8563", 0x51),
162 },
163};
164
165/* This function is board specific as the bit mask for the plldiv will also
166be different for other Freescale SoCs, thus a common bitmask is not
167possible and cannot get place in /plat-mxc/ehci.c.*/
168static int initialize_otg_port(struct platform_device *pdev)
169{
170 u32 v;
171 void __iomem *usb_base;
172 void __iomem *usbother_base;
173
174 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
175 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
176
177 /* Set the PHY clock to 19.2MHz */
178 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
179 v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
180 v |= MX51_USB_PLL_DIV_19_2_MHZ;
181 __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
182 iounmap(usb_base);
183 return 0;
184}
185
186static int initialize_usbh1_port(struct platform_device *pdev)
187{
188 u32 v;
189 void __iomem *usb_base;
190 void __iomem *usbother_base;
191
192 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
193 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
194
195 /* The clock for the USBH1 ULPI port will come externally from the PHY. */
196 v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
197 __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
198 iounmap(usb_base);
199 return 0;
200}
201
202static struct mxc_usbh_platform_data dr_utmi_config = {
203 .init = initialize_otg_port,
204 .portsc = MXC_EHCI_UTMI_16BIT,
205 .flags = MXC_EHCI_INTERNAL_PHY,
206};
207
208static struct fsl_usb2_platform_data usb_pdata = {
209 .operating_mode = FSL_USB2_DR_DEVICE,
210 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
211};
212
213static struct mxc_usbh_platform_data usbh1_config = {
214 .init = initialize_usbh1_port,
215 .portsc = MXC_EHCI_MODE_ULPI,
216 .flags = (MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_ITC_NO_THRESHOLD),
217};
218
219static int otg_mode_host;
220
221static int __init eukrea_cpuimx51_otg_mode(char *options)
222{
223 if (!strcmp(options, "host"))
224 otg_mode_host = 1;
225 else if (!strcmp(options, "device"))
226 otg_mode_host = 0;
227 else
228 pr_info("otg_mode neither \"host\" nor \"device\". "
229 "Defaulting to device\n");
230 return 0;
231}
232__setup("otg_mode=", eukrea_cpuimx51_otg_mode);
233
234/*
235 * Board specific initialization.
236 */
237static void __init eukrea_cpuimx51_init(void)
238{
239 mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads,
240 ARRAY_SIZE(eukrea_cpuimx51_pads));
241
242 mxc_register_device(&mxc_uart_device0, &uart_pdata);
243 gpio_request(CPUIMX51_QUARTA_GPIO, "quarta_irq");
244 gpio_direction_input(CPUIMX51_QUARTA_GPIO);
245 gpio_free(CPUIMX51_QUARTA_GPIO);
246 gpio_request(CPUIMX51_QUARTB_GPIO, "quartb_irq");
247 gpio_direction_input(CPUIMX51_QUARTB_GPIO);
248 gpio_free(CPUIMX51_QUARTB_GPIO);
249 gpio_request(CPUIMX51_QUARTC_GPIO, "quartc_irq");
250 gpio_direction_input(CPUIMX51_QUARTC_GPIO);
251 gpio_free(CPUIMX51_QUARTC_GPIO);
252 gpio_request(CPUIMX51_QUARTD_GPIO, "quartd_irq");
253 gpio_direction_input(CPUIMX51_QUARTD_GPIO);
254 gpio_free(CPUIMX51_QUARTD_GPIO);
255
256 platform_add_devices(devices, ARRAY_SIZE(devices));
257
258 mxc_register_device(&mxc_i2c_device1, &eukrea_cpuimx51_i2c_data);
259 i2c_register_board_info(1, eukrea_cpuimx51_i2c_devices,
260 ARRAY_SIZE(eukrea_cpuimx51_i2c_devices));
261
262 if (otg_mode_host)
263 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
264 else {
265 initialize_otg_port(NULL);
266 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata);
267 }
268 mxc_register_device(&mxc_usbh1_device, &usbh1_config);
269
270#ifdef CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD
271 eukrea_mbimx51_baseboard_init();
272#endif
273}
274
275static void __init eukrea_cpuimx51_timer_init(void)
276{
277 mx51_clocks_init(32768, 24000000, 22579200, 0);
278}
279
280static struct sys_timer mxc_timer = {
281 .init = eukrea_cpuimx51_timer_init,
282};
283
284MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")
285 /* Maintainer: Eric Bénard <eric@eukrea.com> */
286 .phys_io = MX51_AIPS1_BASE_ADDR,
287 .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
288 .boot_params = PHYS_OFFSET + 0x100,
289 .map_io = mx51_map_io,
290 .init_irq = mx51_init_irq,
291 .init_machine = eukrea_cpuimx51_init,
292 .timer = &mxc_timer,
293MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c
new file mode 100644
index 000000000000..f95c2fd94667
--- /dev/null
+++ b/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -0,0 +1,164 @@
1/*
2 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2010 Jason Wang <jason77.wang@gmail.com>
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/irq.h>
14#include <linux/platform_device.h>
15#include <linux/input/matrix_keypad.h>
16
17#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
19#include <asm/mach/time.h>
20
21#include <mach/hardware.h>
22#include <mach/common.h>
23#include <mach/iomux-mx51.h>
24#include <mach/imx-uart.h>
25#include <mach/3ds_debugboard.h>
26
27#include "devices.h"
28
29#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 6)
30
31static struct pad_desc mx51_3ds_pads[] = {
32 /* UART1 */
33 MX51_PAD_UART1_RXD__UART1_RXD,
34 MX51_PAD_UART1_TXD__UART1_TXD,
35 MX51_PAD_UART1_RTS__UART1_RTS,
36 MX51_PAD_UART1_CTS__UART1_CTS,
37
38 /* UART2 */
39 MX51_PAD_UART2_RXD__UART2_RXD,
40 MX51_PAD_UART2_TXD__UART2_TXD,
41 MX51_PAD_EIM_D25__UART2_CTS,
42 MX51_PAD_EIM_D26__UART2_RTS,
43
44 /* UART3 */
45 MX51_PAD_UART3_RXD__UART3_RXD,
46 MX51_PAD_UART3_TXD__UART3_TXD,
47 MX51_PAD_EIM_D24__UART3_CTS,
48 MX51_PAD_EIM_D27__UART3_RTS,
49
50 /* CPLD PARENT IRQ PIN */
51 MX51_PAD_GPIO_1_6__GPIO_1_6,
52
53 /* KPP */
54 MX51_PAD_KEY_ROW0__KEY_ROW0,
55 MX51_PAD_KEY_ROW1__KEY_ROW1,
56 MX51_PAD_KEY_ROW2__KEY_ROW2,
57 MX51_PAD_KEY_ROW3__KEY_ROW3,
58 MX51_PAD_KEY_COL0__KEY_COL0,
59 MX51_PAD_KEY_COL1__KEY_COL1,
60 MX51_PAD_KEY_COL2__KEY_COL2,
61 MX51_PAD_KEY_COL3__KEY_COL3,
62 MX51_PAD_KEY_COL4__KEY_COL4,
63 MX51_PAD_KEY_COL5__KEY_COL5,
64};
65
66/* Serial ports */
67#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
68static struct imxuart_platform_data uart_pdata = {
69 .flags = IMXUART_HAVE_RTSCTS,
70};
71
72static inline void mxc_init_imx_uart(void)
73{
74 mxc_register_device(&mxc_uart_device0, &uart_pdata);
75 mxc_register_device(&mxc_uart_device1, &uart_pdata);
76 mxc_register_device(&mxc_uart_device2, &uart_pdata);
77}
78#else /* !SERIAL_IMX */
79static inline void mxc_init_imx_uart(void)
80{
81}
82#endif /* SERIAL_IMX */
83
84#if defined(CONFIG_KEYBOARD_IMX) || defined(CONFIG_KEYBOARD_IMX_MODULE)
85static int mx51_3ds_board_keymap[] = {
86 KEY(0, 0, KEY_1),
87 KEY(0, 1, KEY_2),
88 KEY(0, 2, KEY_3),
89 KEY(0, 3, KEY_F1),
90 KEY(0, 4, KEY_UP),
91 KEY(0, 5, KEY_F2),
92
93 KEY(1, 0, KEY_4),
94 KEY(1, 1, KEY_5),
95 KEY(1, 2, KEY_6),
96 KEY(1, 3, KEY_LEFT),
97 KEY(1, 4, KEY_SELECT),
98 KEY(1, 5, KEY_RIGHT),
99
100 KEY(2, 0, KEY_7),
101 KEY(2, 1, KEY_8),
102 KEY(2, 2, KEY_9),
103 KEY(2, 3, KEY_F3),
104 KEY(2, 4, KEY_DOWN),
105 KEY(2, 5, KEY_F4),
106
107 KEY(3, 0, KEY_0),
108 KEY(3, 1, KEY_OK),
109 KEY(3, 2, KEY_ESC),
110 KEY(3, 3, KEY_ENTER),
111 KEY(3, 4, KEY_MENU),
112 KEY(3, 5, KEY_BACK)
113};
114
115static struct matrix_keymap_data mx51_3ds_map_data = {
116 .keymap = mx51_3ds_board_keymap,
117 .keymap_size = ARRAY_SIZE(mx51_3ds_board_keymap),
118};
119
120static void mxc_init_keypad(void)
121{
122 mxc_register_device(&mxc_keypad_device, &mx51_3ds_map_data);
123}
124#else
125static inline void mxc_init_keypad(void)
126{
127}
128#endif
129
130/*
131 * Board specific initialization.
132 */
133static void __init mxc_board_init(void)
134{
135 mxc_iomux_v3_setup_multiple_pads(mx51_3ds_pads,
136 ARRAY_SIZE(mx51_3ds_pads));
137 mxc_init_imx_uart();
138
139 if (mxc_expio_init(MX51_CS5_BASE_ADDR, EXPIO_PARENT_INT))
140 printk(KERN_WARNING "Init of the debugboard failed, all "
141 "devices on the board are unusable.\n");
142
143 mxc_init_keypad();
144}
145
146static void __init mx51_3ds_timer_init(void)
147{
148 mx51_clocks_init(32768, 24000000, 22579200, 0);
149}
150
151static struct sys_timer mxc_timer = {
152 .init = mx51_3ds_timer_init,
153};
154
155MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")
156 /* Maintainer: Freescale Semiconductor, Inc. */
157 .phys_io = MX51_AIPS1_BASE_ADDR,
158 .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
159 .boot_params = PHYS_OFFSET + 0x100,
160 .map_io = mx51_map_io,
161 .init_irq = mx51_init_irq,
162 .init_machine = mxc_board_init,
163 .timer = &mxc_timer,
164MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index ed885f9d7b73..6e384d92e625 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -12,6 +12,7 @@
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/i2c.h>
15#include <linux/gpio.h> 16#include <linux/gpio.h>
16#include <linux/delay.h> 17#include <linux/delay.h>
17#include <linux/io.h> 18#include <linux/io.h>
@@ -21,6 +22,7 @@
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <mach/imx-uart.h> 23#include <mach/imx-uart.h>
23#include <mach/iomux-mx51.h> 24#include <mach/iomux-mx51.h>
25#include <mach/i2c.h>
24#include <mach/mxc_ehci.h> 26#include <mach/mxc_ehci.h>
25 27
26#include <asm/irq.h> 28#include <asm/irq.h>
@@ -64,6 +66,18 @@ static struct pad_desc mx51babbage_pads[] = {
64 MX51_PAD_EIM_D27__UART3_RTS, 66 MX51_PAD_EIM_D27__UART3_RTS,
65 MX51_PAD_EIM_D24__UART3_CTS, 67 MX51_PAD_EIM_D24__UART3_CTS,
66 68
69 /* I2C1 */
70 MX51_PAD_EIM_D16__I2C1_SDA,
71 MX51_PAD_EIM_D19__I2C1_SCL,
72
73 /* I2C2 */
74 MX51_PAD_KEY_COL4__I2C2_SCL,
75 MX51_PAD_KEY_COL5__I2C2_SDA,
76
77 /* HSI2C */
78 MX51_PAD_I2C1_CLK__HSI2C_CLK,
79 MX51_PAD_I2C1_DAT__HSI2C_DAT,
80
67 /* USB HOST1 */ 81 /* USB HOST1 */
68 MX51_PAD_USBH1_CLK__USBH1_CLK, 82 MX51_PAD_USBH1_CLK__USBH1_CLK,
69 MX51_PAD_USBH1_DIR__USBH1_DIR, 83 MX51_PAD_USBH1_DIR__USBH1_DIR,
@@ -78,7 +92,7 @@ static struct pad_desc mx51babbage_pads[] = {
78 MX51_PAD_USBH1_DATA7__USBH1_DATA7, 92 MX51_PAD_USBH1_DATA7__USBH1_DATA7,
79 93
80 /* USB HUB reset line*/ 94 /* USB HUB reset line*/
81 MX51_PAD_GPIO_1_7__GPIO1_7, 95 MX51_PAD_GPIO_1_7__GPIO_1_7,
82}; 96};
83 97
84/* Serial ports */ 98/* Serial ports */
@@ -99,6 +113,14 @@ static inline void mxc_init_imx_uart(void)
99} 113}
100#endif /* SERIAL_IMX */ 114#endif /* SERIAL_IMX */
101 115
116static struct imxi2c_platform_data babbage_i2c_data = {
117 .bitrate = 100000,
118};
119
120static struct imxi2c_platform_data babbage_hsi2c_data = {
121 .bitrate = 400000,
122};
123
102static int gpio_usbh1_active(void) 124static int gpio_usbh1_active(void)
103{ 125{
104 struct pad_desc usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO_1_27; 126 struct pad_desc usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO_1_27;
@@ -230,6 +252,10 @@ static void __init mxc_board_init(void)
230 mxc_init_imx_uart(); 252 mxc_init_imx_uart();
231 platform_add_devices(devices, ARRAY_SIZE(devices)); 253 platform_add_devices(devices, ARRAY_SIZE(devices));
232 254
255 mxc_register_device(&mxc_i2c_device0, &babbage_i2c_data);
256 mxc_register_device(&mxc_i2c_device1, &babbage_i2c_data);
257 mxc_register_device(&mxc_hsi2c_device, &babbage_hsi2c_data);
258
233 if (otg_mode_host) 259 if (otg_mode_host)
234 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); 260 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
235 else { 261 else {
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index d9f612d3370e..6af69def357f 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -758,6 +758,10 @@ static struct clk gpt_32k_clk = {
758 .parent = &ckil_clk, 758 .parent = &ckil_clk,
759}; 759};
760 760
761static struct clk kpp_clk = {
762 .id = 0,
763};
764
761#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \ 765#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \
762 static struct clk name = { \ 766 static struct clk name = { \
763 .id = i, \ 767 .id = i, \
@@ -798,6 +802,14 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
798DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, 802DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
799 NULL, NULL, &ipg_clk, NULL); 803 NULL, NULL, &ipg_clk, NULL);
800 804
805/* I2C */
806DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
807 NULL, NULL, &ipg_clk, NULL);
808DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET,
809 NULL, NULL, &ipg_clk, NULL);
810DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET,
811 NULL, NULL, &ipg_clk, NULL);
812
801/* FEC */ 813/* FEC */
802DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, 814DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET,
803 NULL, NULL, &ipg_clk, NULL); 815 NULL, NULL, &ipg_clk, NULL);
@@ -815,12 +827,16 @@ static struct clk_lookup lookups[] = {
815 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) 827 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
816 _REGISTER_CLOCK(NULL, "gpt", gpt_clk) 828 _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
817 _REGISTER_CLOCK("fec.0", NULL, fec_clk) 829 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
830 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
831 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
832 _REGISTER_CLOCK("imx-i2c.2", NULL, hsi2c_clk)
818 _REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk) 833 _REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk)
819 _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", ahb_clk) 834 _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", ahb_clk)
820 _REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk) 835 _REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk)
821 _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", ahb_clk) 836 _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", ahb_clk)
822 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk) 837 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk)
823 _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk) 838 _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk)
839 _REGISTER_CLOCK("imx-keypad.0", NULL, kpp_clk)
824}; 840};
825 841
826static void clk_tree_init(void) 842static void clk_tree_init(void)
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
index 7130449aacdc..1920ff4963b2 100644
--- a/arch/arm/mach-mx5/devices.c
+++ b/arch/arm/mach-mx5/devices.c
@@ -93,6 +93,64 @@ struct platform_device mxc_fec_device = {
93 .resource = mxc_fec_resources, 93 .resource = mxc_fec_resources,
94}; 94};
95 95
96static struct resource mxc_i2c0_resources[] = {
97 {
98 .start = MX51_I2C1_BASE_ADDR,
99 .end = MX51_I2C1_BASE_ADDR + SZ_4K - 1,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = MX51_MXC_INT_I2C1,
103 .end = MX51_MXC_INT_I2C1,
104 .flags = IORESOURCE_IRQ,
105 },
106};
107
108struct platform_device mxc_i2c_device0 = {
109 .name = "imx-i2c",
110 .id = 0,
111 .num_resources = ARRAY_SIZE(mxc_i2c0_resources),
112 .resource = mxc_i2c0_resources,
113};
114
115static struct resource mxc_i2c1_resources[] = {
116 {
117 .start = MX51_I2C2_BASE_ADDR,
118 .end = MX51_I2C2_BASE_ADDR + SZ_4K - 1,
119 .flags = IORESOURCE_MEM,
120 }, {
121 .start = MX51_MXC_INT_I2C2,
122 .end = MX51_MXC_INT_I2C2,
123 .flags = IORESOURCE_IRQ,
124 },
125};
126
127struct platform_device mxc_i2c_device1 = {
128 .name = "imx-i2c",
129 .id = 1,
130 .num_resources = ARRAY_SIZE(mxc_i2c1_resources),
131 .resource = mxc_i2c1_resources,
132};
133
134static struct resource mxc_hsi2c_resources[] = {
135 {
136 .start = MX51_HSI2C_DMA_BASE_ADDR,
137 .end = MX51_HSI2C_DMA_BASE_ADDR + SZ_16K - 1,
138 .flags = IORESOURCE_MEM,
139 },
140 {
141 .start = MX51_MXC_INT_HS_I2C,
142 .end = MX51_MXC_INT_HS_I2C,
143 .flags = IORESOURCE_IRQ,
144 },
145};
146
147struct platform_device mxc_hsi2c_device = {
148 .name = "imx-i2c",
149 .id = 2,
150 .num_resources = ARRAY_SIZE(mxc_hsi2c_resources),
151 .resource = mxc_hsi2c_resources
152};
153
96static u64 usb_dma_mask = DMA_BIT_MASK(32); 154static u64 usb_dma_mask = DMA_BIT_MASK(32);
97 155
98static struct resource usbotg_resources[] = { 156static struct resource usbotg_resources[] = {
@@ -168,34 +226,57 @@ struct platform_device mxc_wdt = {
168 .resource = mxc_wdt_resources, 226 .resource = mxc_wdt_resources,
169}; 227};
170 228
229static struct resource mxc_kpp_resources[] = {
230 {
231 .start = MX51_MXC_INT_KPP,
232 .end = MX51_MXC_INT_KPP,
233 .flags = IORESOURCE_IRQ,
234 } , {
235 .start = MX51_KPP_BASE_ADDR,
236 .end = MX51_KPP_BASE_ADDR + 0x8 - 1,
237 .flags = IORESOURCE_MEM,
238 },
239};
240
241struct platform_device mxc_keypad_device = {
242 .name = "imx-keypad",
243 .id = 0,
244 .num_resources = ARRAY_SIZE(mxc_kpp_resources),
245 .resource = mxc_kpp_resources,
246};
247
171static struct mxc_gpio_port mxc_gpio_ports[] = { 248static struct mxc_gpio_port mxc_gpio_ports[] = {
172 { 249 {
173 .chip.label = "gpio-0", 250 .chip.label = "gpio-0",
174 .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR), 251 .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR),
175 .irq = MX51_MXC_INT_GPIO1_LOW, 252 .irq = MX51_MXC_INT_GPIO1_LOW,
253 .irq_high = MX51_MXC_INT_GPIO1_HIGH,
176 .virtual_irq_start = MXC_GPIO_IRQ_START 254 .virtual_irq_start = MXC_GPIO_IRQ_START
177 }, 255 },
178 { 256 {
179 .chip.label = "gpio-1", 257 .chip.label = "gpio-1",
180 .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR), 258 .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR),
181 .irq = MX51_MXC_INT_GPIO2_LOW, 259 .irq = MX51_MXC_INT_GPIO2_LOW,
260 .irq_high = MX51_MXC_INT_GPIO2_HIGH,
182 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1 261 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1
183 }, 262 },
184 { 263 {
185 .chip.label = "gpio-2", 264 .chip.label = "gpio-2",
186 .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR), 265 .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR),
187 .irq = MX51_MXC_INT_GPIO3_LOW, 266 .irq = MX51_MXC_INT_GPIO3_LOW,
267 .irq_high = MX51_MXC_INT_GPIO3_HIGH,
188 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 268 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2
189 }, 269 },
190 { 270 {
191 .chip.label = "gpio-3", 271 .chip.label = "gpio-3",
192 .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR), 272 .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR),
193 .irq = MX51_MXC_INT_GPIO4_LOW, 273 .irq = MX51_MXC_INT_GPIO4_LOW,
274 .irq_high = MX51_MXC_INT_GPIO4_HIGH,
194 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 275 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
195 }, 276 },
196}; 277};
197 278
198int __init mxc_register_gpios(void) 279int __init imx51_register_gpios(void)
199{ 280{
200 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); 281 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
201} 282}
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
index c879ae71cd5b..e509cfaad1d4 100644
--- a/arch/arm/mach-mx5/devices.h
+++ b/arch/arm/mach-mx5/devices.h
@@ -6,3 +6,7 @@ extern struct platform_device mxc_usbdr_host_device;
6extern struct platform_device mxc_usbh1_device; 6extern struct platform_device mxc_usbh1_device;
7extern struct platform_device mxc_usbdr_udc_device; 7extern struct platform_device mxc_usbdr_udc_device;
8extern struct platform_device mxc_wdt; 8extern struct platform_device mxc_wdt;
9extern struct platform_device mxc_i2c_device0;
10extern struct platform_device mxc_i2c_device1;
11extern struct platform_device mxc_hsi2c_device;
12extern struct platform_device mxc_keypad_device;
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
new file mode 100644
index 000000000000..ffa93d1d6ef8
--- /dev/null
+++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
@@ -0,0 +1,200 @@
1/*
2 *
3 * Copyright (C) 2010 Eric Bénard <eric@eukrea.com>
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/serial_8250.h>
16#include <linux/i2c.h>
17#include <linux/gpio.h>
18#include <linux/io.h>
19#include <linux/interrupt.h>
20#include <linux/irq.h>
21#include <linux/fsl_devices.h>
22#include <linux/i2c/tsc2007.h>
23#include <linux/leds.h>
24#include <linux/input/matrix_keypad.h>
25
26#include <mach/common.h>
27#include <mach/hardware.h>
28#include <mach/imx-uart.h>
29#include <mach/iomux-mx51.h>
30
31#include <asm/mach/arch.h>
32
33#include "devices.h"
34
35#define MBIMX51_TSC2007_GPIO (2*32 + 30)
36#define MBIMX51_TSC2007_IRQ (MXC_INTERNAL_IRQS + MBIMX51_TSC2007_GPIO)
37#define MBIMX51_LED0 (2*32 + 5)
38#define MBIMX51_LED1 (2*32 + 6)
39#define MBIMX51_LED2 (2*32 + 7)
40#define MBIMX51_LED3 (2*32 + 8)
41
42static struct gpio_led mbimx51_leds[] = {
43 {
44 .name = "led0",
45 .default_trigger = "heartbeat",
46 .active_low = 1,
47 .gpio = MBIMX51_LED0,
48 },
49 {
50 .name = "led1",
51 .default_trigger = "nand-disk",
52 .active_low = 1,
53 .gpio = MBIMX51_LED1,
54 },
55 {
56 .name = "led2",
57 .default_trigger = "mmc0",
58 .active_low = 1,
59 .gpio = MBIMX51_LED2,
60 },
61 {
62 .name = "led3",
63 .default_trigger = "default-on",
64 .active_low = 1,
65 .gpio = MBIMX51_LED3,
66 },
67};
68
69static struct gpio_led_platform_data mbimx51_leds_info = {
70 .leds = mbimx51_leds,
71 .num_leds = ARRAY_SIZE(mbimx51_leds),
72};
73
74static struct platform_device mbimx51_leds_gpio = {
75 .name = "leds-gpio",
76 .id = -1,
77 .dev = {
78 .platform_data = &mbimx51_leds_info,
79 },
80};
81
82static struct platform_device *devices[] __initdata = {
83 &mbimx51_leds_gpio,
84};
85
86static struct pad_desc mbimx51_pads[] = {
87 /* UART2 */
88 MX51_PAD_UART2_RXD__UART2_RXD,
89 MX51_PAD_UART2_TXD__UART2_TXD,
90
91 /* UART3 */
92 MX51_PAD_UART3_RXD__UART3_RXD,
93 MX51_PAD_UART3_TXD__UART3_TXD,
94 MX51_PAD_KEY_COL4__UART3_RTS,
95 MX51_PAD_KEY_COL5__UART3_CTS,
96
97 /* TSC2007 IRQ */
98 MX51_PAD_NANDF_D10__GPIO_3_30,
99
100 /* LEDS */
101 MX51_PAD_DISPB2_SER_DIN__GPIO_3_5,
102 MX51_PAD_DISPB2_SER_DIO__GPIO_3_6,
103 MX51_PAD_DISPB2_SER_CLK__GPIO_3_7,
104 MX51_PAD_DISPB2_SER_RS__GPIO_3_8,
105
106 /* KPP */
107 MX51_PAD_KEY_ROW0__KEY_ROW0,
108 MX51_PAD_KEY_ROW1__KEY_ROW1,
109 MX51_PAD_KEY_ROW2__KEY_ROW2,
110 MX51_PAD_KEY_ROW3__KEY_ROW3,
111 MX51_PAD_KEY_COL0__KEY_COL0,
112 MX51_PAD_KEY_COL1__KEY_COL1,
113 MX51_PAD_KEY_COL2__KEY_COL2,
114 MX51_PAD_KEY_COL3__KEY_COL3,
115};
116
117static struct imxuart_platform_data uart_pdata = {
118 .flags = IMXUART_HAVE_RTSCTS,
119};
120
121static int mbimx51_keymap[] = {
122 KEY(0, 0, KEY_1),
123 KEY(0, 1, KEY_2),
124 KEY(0, 2, KEY_3),
125 KEY(0, 3, KEY_UP),
126
127 KEY(1, 0, KEY_4),
128 KEY(1, 1, KEY_5),
129 KEY(1, 2, KEY_6),
130 KEY(1, 3, KEY_LEFT),
131
132 KEY(2, 0, KEY_7),
133 KEY(2, 1, KEY_8),
134 KEY(2, 2, KEY_9),
135 KEY(2, 3, KEY_RIGHT),
136
137 KEY(3, 0, KEY_0),
138 KEY(3, 1, KEY_DOWN),
139 KEY(3, 2, KEY_ESC),
140 KEY(3, 3, KEY_ENTER),
141};
142
143static struct matrix_keymap_data mbimx51_map_data = {
144 .keymap = mbimx51_keymap,
145 .keymap_size = ARRAY_SIZE(mbimx51_keymap),
146};
147
148static int tsc2007_get_pendown_state(void)
149{
150 return !gpio_get_value(MBIMX51_TSC2007_GPIO);
151}
152
153struct tsc2007_platform_data tsc2007_data = {
154 .model = 2007,
155 .x_plate_ohms = 180,
156 .get_pendown_state = tsc2007_get_pendown_state,
157};
158
159static struct i2c_board_info mbimx51_i2c_devices[] = {
160 {
161 I2C_BOARD_INFO("tsc2007", 0x48),
162 .irq = MBIMX51_TSC2007_IRQ,
163 .platform_data = &tsc2007_data,
164 },
165};
166
167/*
168 * baseboard initialization.
169 */
170void __init eukrea_mbimx51_baseboard_init(void)
171{
172 mxc_iomux_v3_setup_multiple_pads(mbimx51_pads,
173 ARRAY_SIZE(mbimx51_pads));
174
175 mxc_register_device(&mxc_uart_device1, NULL);
176 mxc_register_device(&mxc_uart_device2, &uart_pdata);
177
178 gpio_request(MBIMX51_LED0, "LED0");
179 gpio_direction_output(MBIMX51_LED0, 1);
180 gpio_free(MBIMX51_LED0);
181 gpio_request(MBIMX51_LED1, "LED1");
182 gpio_direction_output(MBIMX51_LED1, 1);
183 gpio_free(MBIMX51_LED1);
184 gpio_request(MBIMX51_LED2, "LED2");
185 gpio_direction_output(MBIMX51_LED2, 1);
186 gpio_free(MBIMX51_LED2);
187 gpio_request(MBIMX51_LED3, "LED3");
188 gpio_direction_output(MBIMX51_LED3, 1);
189 gpio_free(MBIMX51_LED3);
190
191 platform_add_devices(devices, ARRAY_SIZE(devices));
192
193 mxc_register_device(&mxc_keypad_device, &mbimx51_map_data);
194
195 gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
196 gpio_direction_input(MBIMX51_TSC2007_GPIO);
197 set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING);
198 i2c_register_board_info(1, mbimx51_i2c_devices,
199 ARRAY_SIZE(mbimx51_i2c_devices));
200}
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index b7677ef80cc4..bc3f30db8d9a 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -65,6 +65,8 @@ void __init mx51_map_io(void)
65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 65 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
66} 66}
67 67
68int imx51_register_gpios(void);
69
68void __init mx51_init_irq(void) 70void __init mx51_init_irq(void)
69{ 71{
70 unsigned long tzic_addr; 72 unsigned long tzic_addr;
@@ -80,4 +82,5 @@ void __init mx51_init_irq(void)
80 panic("unable to map TZIC interrupt controller\n"); 82 panic("unable to map TZIC interrupt controller\n");
81 83
82 tzic_init_irq(tzic_virt); 84 tzic_init_irq(tzic_virt);
85 imx51_register_gpios();
83} 86}