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-rw-r--r--arch/arm/mach-mx5/mx51_efika.c357
1 files changed, 357 insertions, 0 deletions
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
index c08ec63415e5..b4d5ae913ff8 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -23,6 +23,9 @@
23#include <linux/fsl_devices.h> 23#include <linux/fsl_devices.h>
24#include <linux/spi/flash.h> 24#include <linux/spi/flash.h>
25#include <linux/spi/spi.h> 25#include <linux/spi/spi.h>
26#include <linux/mfd/mc13892.h>
27#include <linux/regulator/machine.h>
28#include <linux/regulator/consumer.h>
26 29
27#include <mach/common.h> 30#include <mach/common.h>
28#include <mach/hardware.h> 31#include <mach/hardware.h>
@@ -39,6 +42,7 @@
39#include <asm/mach-types.h> 42#include <asm/mach-types.h>
40#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
41#include <asm/mach/time.h> 44#include <asm/mach/time.h>
45#include <asm/mach-types.h>
42 46
43#include "devices-imx51.h" 47#include "devices-imx51.h"
44#include "devices.h" 48#include "devices.h"
@@ -54,6 +58,8 @@
54#define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24) 58#define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24)
55#define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25) 59#define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25)
56 60
61#define EFIKAMX_PMIC IMX_GPIO_NR(1, 6)
62
57static iomux_v3_cfg_t mx51efika_pads[] = { 63static iomux_v3_cfg_t mx51efika_pads[] = {
58 /* UART1 */ 64 /* UART1 */
59 MX51_PAD_UART1_RXD__UART1_RXD, 65 MX51_PAD_UART1_RXD__UART1_RXD,
@@ -90,6 +96,7 @@ static iomux_v3_cfg_t mx51efika_pads[] = {
90 MX51_PAD_CSPI1_SS1__GPIO4_25, 96 MX51_PAD_CSPI1_SS1__GPIO4_25,
91 MX51_PAD_CSPI1_RDY__ECSPI1_RDY, 97 MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
92 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, 98 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
99 MX51_PAD_GPIO1_6__GPIO1_6,
93 100
94 /* USB HOST1 */ 101 /* USB HOST1 */
95 MX51_PAD_USBH1_CLK__USBH1_CLK, 102 MX51_PAD_USBH1_CLK__USBH1_CLK,
@@ -238,6 +245,336 @@ static struct flash_platform_data mx51_efika_spi_flash_data = {
238 .type = "sst25vf032b", 245 .type = "sst25vf032b",
239}; 246};
240 247
248static struct regulator_consumer_supply sw1_consumers[] = {
249 {
250 .supply = "cpu_vcc",
251 }
252};
253
254static struct regulator_consumer_supply vdig_consumers[] = {
255 /* sgtl5000 */
256 REGULATOR_SUPPLY("VDDA", "1-000a"),
257 REGULATOR_SUPPLY("VDDD", "1-000a"),
258};
259
260static struct regulator_consumer_supply vvideo_consumers[] = {
261 /* sgtl5000 */
262 REGULATOR_SUPPLY("VDDIO", "1-000a"),
263};
264
265static struct regulator_consumer_supply vsd_consumers[] = {
266 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.0"),
267 REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"),
268};
269
270static struct regulator_consumer_supply pwgt1_consumer[] = {
271 {
272 .supply = "pwgt1",
273 }
274};
275
276static struct regulator_consumer_supply pwgt2_consumer[] = {
277 {
278 .supply = "pwgt2",
279 }
280};
281
282static struct regulator_consumer_supply coincell_consumer[] = {
283 {
284 .supply = "coincell",
285 }
286};
287
288static struct regulator_init_data sw1_init = {
289 .constraints = {
290 .name = "SW1",
291 .min_uV = 600000,
292 .max_uV = 1375000,
293 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
294 .valid_modes_mask = 0,
295 .always_on = 1,
296 .boot_on = 1,
297 .state_mem = {
298 .uV = 850000,
299 .mode = REGULATOR_MODE_NORMAL,
300 .enabled = 1,
301 },
302 },
303 .num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
304 .consumer_supplies = sw1_consumers,
305};
306
307static struct regulator_init_data sw2_init = {
308 .constraints = {
309 .name = "SW2",
310 .min_uV = 900000,
311 .max_uV = 1850000,
312 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
313 .always_on = 1,
314 .boot_on = 1,
315 .state_mem = {
316 .uV = 950000,
317 .mode = REGULATOR_MODE_NORMAL,
318 .enabled = 1,
319 },
320 }
321};
322
323static struct regulator_init_data sw3_init = {
324 .constraints = {
325 .name = "SW3",
326 .min_uV = 1100000,
327 .max_uV = 1850000,
328 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
329 .always_on = 1,
330 .boot_on = 1,
331 }
332};
333
334static struct regulator_init_data sw4_init = {
335 .constraints = {
336 .name = "SW4",
337 .min_uV = 1100000,
338 .max_uV = 1850000,
339 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
340 .always_on = 1,
341 .boot_on = 1,
342 }
343};
344
345static struct regulator_init_data viohi_init = {
346 .constraints = {
347 .name = "VIOHI",
348 .boot_on = 1,
349 .always_on = 1,
350 }
351};
352
353static struct regulator_init_data vusb_init = {
354 .constraints = {
355 .name = "VUSB",
356 .boot_on = 1,
357 .always_on = 1,
358 }
359};
360
361static struct regulator_init_data swbst_init = {
362 .constraints = {
363 .name = "SWBST",
364 }
365};
366
367static struct regulator_init_data vdig_init = {
368 .constraints = {
369 .name = "VDIG",
370 .min_uV = 1050000,
371 .max_uV = 1800000,
372 .valid_ops_mask =
373 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
374 .boot_on = 1,
375 .always_on = 1,
376 },
377 .num_consumer_supplies = ARRAY_SIZE(vdig_consumers),
378 .consumer_supplies = vdig_consumers,
379};
380
381static struct regulator_init_data vpll_init = {
382 .constraints = {
383 .name = "VPLL",
384 .min_uV = 1050000,
385 .max_uV = 1800000,
386 .valid_ops_mask =
387 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
388 .boot_on = 1,
389 .always_on = 1,
390 }
391};
392
393static struct regulator_init_data vusb2_init = {
394 .constraints = {
395 .name = "VUSB2",
396 .min_uV = 2400000,
397 .max_uV = 2775000,
398 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
399 .boot_on = 1,
400 .always_on = 1,
401 }
402};
403
404static struct regulator_init_data vvideo_init = {
405 .constraints = {
406 .name = "VVIDEO",
407 .min_uV = 2775000,
408 .max_uV = 2775000,
409 .valid_ops_mask =
410 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
411 .boot_on = 1,
412 .apply_uV = 1,
413 },
414 .num_consumer_supplies = ARRAY_SIZE(vvideo_consumers),
415 .consumer_supplies = vvideo_consumers,
416};
417
418static struct regulator_init_data vaudio_init = {
419 .constraints = {
420 .name = "VAUDIO",
421 .min_uV = 2300000,
422 .max_uV = 3000000,
423 .valid_ops_mask =
424 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
425 .boot_on = 1,
426 }
427};
428
429static struct regulator_init_data vsd_init = {
430 .constraints = {
431 .name = "VSD",
432 .min_uV = 1800000,
433 .max_uV = 3150000,
434 .valid_ops_mask =
435 REGULATOR_CHANGE_VOLTAGE,
436 .boot_on = 1,
437 },
438 .num_consumer_supplies = ARRAY_SIZE(vsd_consumers),
439 .consumer_supplies = vsd_consumers,
440};
441
442static struct regulator_init_data vcam_init = {
443 .constraints = {
444 .name = "VCAM",
445 .min_uV = 2500000,
446 .max_uV = 3000000,
447 .valid_ops_mask =
448 REGULATOR_CHANGE_VOLTAGE |
449 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
450 .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
451 .boot_on = 1,
452 }
453};
454
455static struct regulator_init_data vgen1_init = {
456 .constraints = {
457 .name = "VGEN1",
458 .min_uV = 1200000,
459 .max_uV = 3150000,
460 .valid_ops_mask =
461 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
462 .boot_on = 1,
463 .always_on = 1,
464 }
465};
466
467static struct regulator_init_data vgen2_init = {
468 .constraints = {
469 .name = "VGEN2",
470 .min_uV = 1200000,
471 .max_uV = 3150000,
472 .valid_ops_mask =
473 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
474 .boot_on = 1,
475 .always_on = 1,
476 }
477};
478
479static struct regulator_init_data vgen3_init = {
480 .constraints = {
481 .name = "VGEN3",
482 .min_uV = 1800000,
483 .max_uV = 2900000,
484 .valid_ops_mask =
485 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
486 .boot_on = 1,
487 .always_on = 1,
488 }
489};
490
491static struct regulator_init_data gpo1_init = {
492 .constraints = {
493 .name = "GPO1",
494 }
495};
496
497static struct regulator_init_data gpo2_init = {
498 .constraints = {
499 .name = "GPO2",
500 }
501};
502
503static struct regulator_init_data gpo3_init = {
504 .constraints = {
505 .name = "GPO3",
506 }
507};
508
509static struct regulator_init_data gpo4_init = {
510 .constraints = {
511 .name = "GPO4",
512 }
513};
514
515static struct regulator_init_data pwgt1_init = {
516 .constraints = {
517 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
518 .boot_on = 1,
519 },
520 .num_consumer_supplies = ARRAY_SIZE(pwgt1_consumer),
521 .consumer_supplies = pwgt1_consumer,
522};
523
524static struct regulator_init_data pwgt2_init = {
525 .constraints = {
526 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
527 .boot_on = 1,
528 },
529 .num_consumer_supplies = ARRAY_SIZE(pwgt2_consumer),
530 .consumer_supplies = pwgt2_consumer,
531};
532
533static struct regulator_init_data vcoincell_init = {
534 .constraints = {
535 .name = "COINCELL",
536 .min_uV = 3000000,
537 .max_uV = 3000000,
538 .valid_ops_mask =
539 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS,
540 },
541 .num_consumer_supplies = ARRAY_SIZE(coincell_consumer),
542 .consumer_supplies = coincell_consumer,
543};
544
545static struct mc13xxx_regulator_init_data mx51_efika_regulators[] = {
546 { .id = MC13892_SW1, .init_data = &sw1_init },
547 { .id = MC13892_SW2, .init_data = &sw2_init },
548 { .id = MC13892_SW3, .init_data = &sw3_init },
549 { .id = MC13892_SW4, .init_data = &sw4_init },
550 { .id = MC13892_SWBST, .init_data = &swbst_init },
551 { .id = MC13892_VIOHI, .init_data = &viohi_init },
552 { .id = MC13892_VPLL, .init_data = &vpll_init },
553 { .id = MC13892_VDIG, .init_data = &vdig_init },
554 { .id = MC13892_VSD, .init_data = &vsd_init },
555 { .id = MC13892_VUSB2, .init_data = &vusb2_init },
556 { .id = MC13892_VVIDEO, .init_data = &vvideo_init },
557 { .id = MC13892_VAUDIO, .init_data = &vaudio_init },
558 { .id = MC13892_VCAM, .init_data = &vcam_init },
559 { .id = MC13892_VGEN1, .init_data = &vgen1_init },
560 { .id = MC13892_VGEN2, .init_data = &vgen2_init },
561 { .id = MC13892_VGEN3, .init_data = &vgen3_init },
562 { .id = MC13892_VUSB, .init_data = &vusb_init },
563 { .id = MC13892_GPO1, .init_data = &gpo1_init },
564 { .id = MC13892_GPO2, .init_data = &gpo2_init },
565 { .id = MC13892_GPO3, .init_data = &gpo3_init },
566 { .id = MC13892_GPO4, .init_data = &gpo4_init },
567 { .id = MC13892_PWGT1SPI, .init_data = &pwgt1_init },
568 { .id = MC13892_PWGT2SPI, .init_data = &pwgt2_init },
569 { .id = MC13892_VCOINCELL, .init_data = &vcoincell_init },
570};
571
572static struct mc13xxx_platform_data mx51_efika_mc13892_data = {
573 .flags = MC13XXX_USE_RTC | MC13XXX_USE_REGULATOR,
574 .num_regulators = ARRAY_SIZE(mx51_efika_regulators),
575 .regulators = mx51_efika_regulators,
576};
577
241static struct spi_board_info mx51_efika_spi_board_info[] __initdata = { 578static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
242 { 579 {
243 .modalias = "m25p80", 580 .modalias = "m25p80",
@@ -247,6 +584,14 @@ static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
247 .platform_data = &mx51_efika_spi_flash_data, 584 .platform_data = &mx51_efika_spi_flash_data,
248 .irq = -1, 585 .irq = -1,
249 }, 586 },
587 {
588 .modalias = "mc13892",
589 .max_speed_hz = 1000000,
590 .bus_num = 0,
591 .chip_select = 0,
592 .platform_data = &mx51_efika_mc13892_data,
593 .irq = gpio_to_irq(EFIKAMX_PMIC),
594 },
250}; 595};
251 596
252static int mx51_efika_spi_cs[] = { 597static int mx51_efika_spi_cs[] = {
@@ -267,6 +612,18 @@ void __init efika_board_common_init(void)
267 mx51_efika_usb(); 612 mx51_efika_usb();
268 imx51_add_sdhci_esdhc_imx(0, NULL); 613 imx51_add_sdhci_esdhc_imx(0, NULL);
269 614
615 /* FIXME: comes from original code. check this. */
616 if (mx51_revision() < IMX_CHIP_REVISION_2_0)
617 sw2_init.constraints.state_mem.uV = 1100000;
618 else if (mx51_revision() == IMX_CHIP_REVISION_2_0) {
619 sw2_init.constraints.state_mem.uV = 1250000;
620 sw1_init.constraints.state_mem.uV = 1000000;
621 }
622 if (machine_is_mx51_efikasb())
623 vgen1_init.constraints.max_uV = 1200000;
624
625 gpio_request(EFIKAMX_PMIC, "pmic irq");
626 gpio_direction_input(EFIKAMX_PMIC);
270 spi_register_board_info(mx51_efika_spi_board_info, 627 spi_register_board_info(mx51_efika_spi_board_info,
271 ARRAY_SIZE(mx51_efika_spi_board_info)); 628 ARRAY_SIZE(mx51_efika_spi_board_info));
272 imx51_add_ecspi(0, &mx51_efika_spi_pdata); 629 imx51_add_ecspi(0, &mx51_efika_spi_pdata);